Design of Bandgap voltage reference (BGR) - 3 : CTAT simulation in Cadence

This series of tutorials will discuss the design of Bandgap reference in detail. This video explains how to make diode in cmos process. The simulation of CTAT is also included

[@NaaJeevitham500]

9:02, PDK comes with this special diode model? or we can use any BJT model just like that?

[@thusharakc2586]

sir thanks for your tutorials.. can u tell the bjt model n mosfet model..I want to design a bgr in gpdk 180

[@valli931]

Sir,can you please tell us where we can find the pnp transistor you were using.

[@tirthr5469]

Hafeez, private videos 4,5,6 are they related to layout.. ? or are you going to post them later?

[@hafeezkt]

they are not related to layout.

[@anut730]

Hey can you please tell me which BJT model are you using in cadence? Also I am currently working on 0.25u technology, can you tell me from where can I get the model file?

[@bipulpal7719]

sir, in this design why we have used a power supply of 3.3v, why not less or more then this,
please answer it quickly .

[@maansterminator]

please guys can some one help ? i have a question . is that bjt in this cmos technology doesn't mean that i need bicmos technology it's enough cmos only

[@Gamer_2047_]

hafeez, at 0:28 it should be per kelvin

[@aadharverma]

can we use mosfet instead of bjt?

[@EngRamyRady]

please MR. can you share with us the remaninig lectures parts 4 , 5 , 6

[@bipulpal7719]

may we expect the video of layout for this design?