Any thoughts how on Chisel or Spinal HDL? For example isn't VexRiscv for litex written in SpinalHDL? Would love to know the history behind Enjoy-Digital , Catherine/Whitequark and AmaranthHDL! From what I understand, Travis Goodspeed originally commissioned Enjoy-Digital to make LiteX, which is described in Migen... this later became nMigen, but there was a fork to Amaranth HDL... and there seems to be a dispute between M-Labs and whitequark (former affiliate of M-Labs?) over the direction/brand of nMigen? I'd like to do an SoC based design for a Trenz SMF2000 board.. using either LambdaSoc (Amaranth HDL) or LiteX (m-labs or whitequark's Migen/MiSoc). Ideally, I'd like to leverage off-the-shelf IPs (litescope, , ValentyUSB, minerva or VexRiscV). The goal is a bridge that allows a CPU master to access AHB-Lite and APB3 slaves, all from the Cortex-M3's AHB Fabric-Interface-Controller. (BTW, there's a great blog post on CrowdSupply for Cynthion titled "Moondancer: A Facedancer backend for Cynthion") Also, the debugging tools available for software development have become very sophisticated.. with advanced breakpoint capability, stepping, realt-time variable watching (swv), etc.. with HDLs, it seems the process of debugging hasn't changed and still requires manually writing thousands of test-benches! (Altera's old Max+Plus II Waveform Editor you can could draw your waveforms, then simulate!) Do you know if there's been any development in the area debugging of logic? Everything I've seen still uses test-benches (Icarus Verilog, Verilator/signalflip-js, Aldec Active-HDL, Metrics Cloud Simulator, GHDL for VHDL)!
Thks & just what I was looking for.
Any thoughts how on Chisel or Spinal HDL? For example isn't VexRiscv for litex written in SpinalHDL?
Would love to know the history behind Enjoy-Digital , Catherine/Whitequark and AmaranthHDL! From what I understand, Travis Goodspeed originally commissioned Enjoy-Digital to make LiteX, which is described in Migen... this later became nMigen, but there was a fork to Amaranth HDL... and there seems to be a dispute between M-Labs and whitequark (former affiliate of M-Labs?) over the direction/brand of nMigen?
I'd like to do an SoC based design for a Trenz SMF2000 board.. using either LambdaSoc (Amaranth HDL) or LiteX (m-labs or whitequark's Migen/MiSoc). Ideally, I'd like to leverage off-the-shelf IPs (litescope, , ValentyUSB, minerva or VexRiscV).
The goal is a bridge that allows a CPU master to access AHB-Lite and APB3 slaves, all from the Cortex-M3's AHB Fabric-Interface-Controller.
(BTW, there's a great blog post on CrowdSupply for Cynthion titled "Moondancer: A Facedancer backend for Cynthion")
Also, the debugging tools available for software development have become very sophisticated.. with advanced breakpoint capability, stepping, realt-time variable watching (swv), etc.. with HDLs, it seems the process of debugging hasn't changed and still requires manually writing thousands of test-benches!
(Altera's old Max+Plus II Waveform Editor you can could draw your waveforms, then simulate!)
Do you know if there's been any development in the area debugging of logic? Everything I've seen still uses test-benches (Icarus Verilog, Verilator/signalflip-js, Aldec Active-HDL, Metrics Cloud Simulator, GHDL for VHDL)!