Terasic DE10-Standard Tutorial -- 4. First Qsys Project

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  • Опубліковано 17 січ 2025

КОМЕНТАРІ • 35

  • @alamuru420123
    @alamuru420123 4 роки тому +1

    Thank you so much, this is by far the most helpful resource online. I got it to work on DE10-Nano-SoC using Quartus 20.1 by following your video closely. This video is definitely study level, thank you so much!

    • @huzaifasajid6830
      @huzaifasajid6830 4 роки тому +1

      I'd like to add for people using newer versions, Qsys is now named as Platform Designer. Might save someone's time.

  • @saheradam8029
    @saheradam8029 5 років тому +1

    Thank you very much for such valuable tutorial. please keep it up and continue. Thank you.

  • @ronaldvictor8911
    @ronaldvictor8911 11 місяців тому

    Thanks for the this video! Which datasheet did you refer to, to figure out that the gpio pin 35 needs to be exported? (mentioned it at 8:28 - Configuration section of the video)

  • @jagumiel
    @jagumiel 6 років тому +1

    I have followed your tutorial and I understood everything you made. It worked for me.
    But only one doubt, when you assign parameters to the DDR3 memory in the HPS, how do you do it? Why do you choose those values and no others?
    I have taken a look at the GHRD, but they are different. I would like to understand the logic.
    Thank you.

    • @bskull3232
      @bskull3232  6 років тому +1

      GRHD has a reference project. I assigned based on those sets of values. Maybe they revised it, but my video was using data that was available at the time it was filmed.

    • @jagumiel
      @jagumiel 6 років тому +1

      @@bskull3232 I will check it again tomorrow, maybe I opened a different design. Thank you very much for your response. And thanks for this tutorial, I hope to use it as the base to develop bigger projects.

  • @masterhost
    @masterhost 6 років тому +1

    Hi.. Thanks for the tutorial. But where actually do you program de FPGA? .. What I really want to ask is how to add VHDL or Verilog code and run it? for example if I have a VHDL code that control the LEDs depending of the state of the switches.. or say I want to get the info at HPS from a specific periferal conected to the FPGA and then change the state of the LEDs depending of that info.. where in the Qsys ot quatus should I introduce that VHDL code? THanks in advance..

  • @OKeefeist
    @OKeefeist 6 років тому

    Amazing video

  • @mohammedshobaky5067
    @mohammedshobaky5067 21 день тому

    I have a qeustion for this tuturial do I have to configure the sdram part like u did? or if anyone can help me I don't understand the most of these things in that part thank you in advance.

  • @ngocmanprocoder
    @ngocmanprocoder Рік тому

    I am making a project about communication between gsensor and lcd, I see that tutorials guide how to implement with linux OS, but implementing on Windows is ok, right? Thank you so much.

  • @ranchu7083
    @ranchu7083 5 років тому

    Thank you for this video !
    Isn't hps configured clock depends on some input clock to hps ? Thx

  • @laggggggggg3
    @laggggggggg3 4 роки тому

    Is it possible to run NIOS II to control HPS? Also can you make a video about the HPS booting process?

  • @masterhost
    @masterhost 6 років тому

    Thank for the video.
    Maybe I missed this somewhere.. but where do you get all the setting parameter of the devices on the board? I mean the parameters that you manually have to put when configuring in the Qsys... Thanks

    • @bskull3232
      @bskull3232  6 років тому +1

      I pulled a lot of numbers from the reference design from Terasic. They are in the CD that came with your board. You can also download the iso from their website.

  • @timchiang5315
    @timchiang5315 7 років тому +1

    Hi, it's really a perfect tutorial.
    I have some question about using both HPS and FPGA. I want to use HPS to display the GUI interface, but when I program the FPGA, HDMI display is missing(I also can control my DE10 with router), is that a correct process? or did I need to write HDMI IP in FPGA?? is there a solution to display GUI interface with HPS instead of using FPGA IP??
    thank you !

    • @bskull3232
      @bskull3232  7 років тому +1

      DE10-Standard doesn't have an HDMI. It does have an RGB interface, which is used to connect to an ADI video encoder to generate VGA and RCA outputs. This is an FPGA peripheral, not HPS peripheral, so you need an FPGA QSYS IP block to get it to work, and in the meantime you need a Linux driver to talk to the QSYS peripheral and use it as a framebuffer.
      I've never dived into the LXDE image provided by Terasic, so I don't want to talk too much about it. I'm no where expert in FPGAs, I did this video just as a casual demonstration of this FPGA's capability, mostly just for fun. If you need a definitive answer, you need to ask someone else. You can write to Terasic and see how they can help you.

    • @timchiang5315
      @timchiang5315 7 років тому +1

      Thanks for your reply! It's helpful, I'll ask Terasic for helping~
      Your channel and videos is really nice! ^^

  • @Nicolnareff06
    @Nicolnareff06 6 років тому +1

    Hello, as already said : very good tutorial, congratulation and thank you !
    I have some issue trying to boot with the sd card : I installed the linux image (console mode) on the card using Win32DiskImager. But when I start the board, I get a "unknow usb device" instead of the virtual COM port that I use to access the linux OS via SSH (using putty). I don't get the problem when I use the original content of the sd card.
    Would you have an idea how to fix this problem please ?

    • @draconi1992
      @draconi1992 6 років тому +1

      You have to install the driver for the FTDI chip (the chip that is responsible for the virtual com port) present on your board.

  • @lizgonzalez1238
    @lizgonzalez1238 4 роки тому

    Great tutorial ! Thanks a lot :)

  • @masterhost
    @masterhost 6 років тому

    Hi thanks for your video. I followed in details all the video steps but the code at the end doesn't run as expected. It seems that it get stuck when opening the dev/mem. When I put "dd if=dev/mem" the board DE10 start to send (into the COM) to the putty a long series of unrecognized data (like lot of minutes) that never ends. Why the memory is so big? is this happen to you? I mean The code run, it i just tha the fd=open... last forever and the the code never continue.. help please. Very much apreciated.

  • @nimame78
    @nimame78 6 років тому

    sigo esperando el 5.- vídeo mi chavo :| :| por cierto buen vídeo sigue así

  • @niltongaviao8749
    @niltongaviao8749 6 років тому

    Nice and easy, thank you.

  • @eivann22
    @eivann22 7 років тому

    Hi, i'm working on a DE10-Nano by Terasic and i only need the Ethernet port to conect the board with the PC. I've be configured the Qsys system with an Ethernet TSE susbsystem to use the port and a HPS Cyclone V subsystem to connect the FPGA with the HPS.
    I just wanna know if i need program something in linux or in the SD Card, cause i've found a tutorial and nothing else is necessary but it doesn't work.

    • @bskull3232
      @bskull3232  7 років тому

      If you enabled the CPU peripheral and napped the pins correctly, and it doesn't work, then check your DTB. I would use Terasic official console Linux, and so far it worked for me on DE10.

  • @小野寺つさき
    @小野寺つさき 7 років тому

    Hi Bo,
    I using the DE10-nano board and want to develop FPGA and HPS SoC on it, but I have some problems.
    I can only configure the FPGA without HPS or only run C programs(Hello world) on the HPS, when I use QSys to generate a HPS+FPGA system, I can't understand how to configure it into the SoC. If I use programmer to program the .sof file into FPGA directly, the HPS will not work. And if I replace the .rbf file in the SD card use the .rbf file which I generate by the .sof file, the HPS linux OS will not startup (I says it haven't ethernet device, etc.). So what should I do for the QSys then I can configure the SoC correctly and run the program on the HPS to control the FPGA?
    Thank you in advance.

    • @bskull3232
      @bskull3232  7 років тому

      Dmitri Abramovic There are 2 official hps images, one requires all peripherals (the graphics one), while the console one doesn't require any fpga resources, therefore you can boot the console only image with your own fpga design.

    • @小野寺つさき
      @小野寺つさき 7 років тому

      Thanks a lot! It means when I boot my HPS with only console, I can still use the FPGA peripherals? Will this cause me to be unable to use peripherals such as Ethernet on HPS?

    • @bskull3232
      @bskull3232  7 років тому

      Dmitri Abramovic It all depends on device tree configuration.

    • @小野寺つさき
      @小野寺つさき 7 років тому

      Oh! It means if I configured the peripherals in the Qsys, then HPS can access them, is it?

    • @bskull3232
      @bskull3232  7 років тому

      What do you mean peripherals? Do you mean HPS peripherals (Ethernet, I2S, etc.) or FPGA peripherals? For FPGA peripherals (your own Qsys components), the component will have an address, and you just map the address and write/read it. For HPS peripherals, Qsys configuration simply sets corresponding IO mux, and the memory address of those are already in HPS address space, and you only need to tell Linux kernel to use it (either use device tree blob or dynamic device manager, aka cape manager).