In test bench the delay timings are nit correct I think so , u have to delay the inputs in partion like 1,2,4 but u declared there 2,3,4, I think the dealys will not get all the inputs ,only few inputs can be possible. Iam beginner i don't know much About it. Please reply for this comment , which is crt
Wire c,t,k; in24 c is missing
Is it gate level modelling
Please do video on Wallace tree multiplier pls...
In test bench the delay timings are nit correct I think so , u have to delay the inputs in partion like 1,2,4 but u declared there 2,3,4, I think the dealys will not get all the inputs ,only few inputs can be possible. Iam beginner i don't know much About it. Please reply for this comment , which is crt
can I do the synthesize process if I don't have the hardware board??
Yes synthesis doesn't require hardware board.
Can use subtractor
*Synthesizing full adder is not found
*Module half not found
*Failed synthesizing module full adder
If a module is instantiated then it's respective .v files should be added in file list check of they are included