Love these videos! I really appreciate this type of material as it applies directly to the work I am currently doing. Very concise, clear and direct explanations. I'm genuinely surprised that Altium Academy has only 25k subs... I expected it to be in the range of 500k+... In any case, please keep these coming. They are worth more than gold!
My thesis required designing an in-house HTRB/HTOL system capable of picoammeter measurements for GaN reliability testing. The majority of the research I did was on noise mitigation-what a monster! The front-end PCB itself utilized point-to-point wired differential inputs on PTFE insulated terminals, a via fence around the inputs to the first stage of my 2-stage transimpedance amplifier/high order LPF, isolated planes, massive ground planes, a shielding guard trace, and an RF shield electrically attached to it. It was a humbling introduction to the world of highly sensitive measurements and RF engineering!
For me (audio electronics hobbyist dabbling in logic signal control) the example given at 20:14 is the rule, not the exception; I'm sure this holds for any modern audio electronics, which is hardy a niche field. Consider any Class D amplifier. (What about elevating one of the ground planes with a resistive divider, which was fairly common in valve amplifiers to keep filament hum out of the signal?) About shielding: At a signal level, there are options beyond the PCB level that designers use. For critical low-current signals, rigid coax is common for unbalanced signals, especially high-end test equipment, and shielded twisted pair is de rigueur for balanced signals. The latter has been used for stage cable snakes for many decades.
Yeah I get what you're saying. I think the main thing that designers forget is that the logic signals have to be isolated within those grounds. This is one of those big things about isolated systems, you can't route anything across those gaps otherwise they aren't isolated anymore! About the ground plane potential elevation, are you referring to setting a definite ground plane potential difference between two floating grounds using a resistor divider? About shielding, you also have stuff like elastomeric shielding compounds, meshes, gaskets, and even the enclosure.
@@Zachariah-Peterson I was thinking about filament elevation in valve electronics, typically using either the cathode resistor of a power valve or a tapped bleeder resistor on the power supply to set a floating DC reference. The DC offset reduces leakage current between the cathodes and filaments. Something similar might be useful in mixed signal layouts where it might be impractical to physically isolate an analog signal from digital switching. I'm sure we've all heard switching hash from integrated audio on PC motherboards. I've seen a few early preamplifier designs where there's a low value resistor between the ground of the first gain stage and the rest of the circuit ground. I realize this is typically frowned upon nowadays, but it was apparently done to because ground current reasons.
Some more detail on types of filtering, cavities, attenuation etc would be cool... if you don't have them already, haven't had a chance to watch all the videos yet
Hi Zach, Thanks for the great video. Could we also cover some topics about ESD protection? I have read some of your articles and known about ESD protection components, but still like to know ESD protection from PCB layout aspect, and how to deal with ESD in different scenarios, such as bench devices and handheld battery devices with metallic or plastic enclosures. Is the rule of thumb directing ESD current to ground as early as possible? And besides physically testing with an ESD gun, what kind of software tools or hardware equipment can be used for analyzing ESD tolerance or simulating ESD current flows?
Good idea, sure I can look at putting together some stuff on ESD. I've talked about it before with connectors and chassis grounding but not yet with ESD protection circuits.
Well that would be galvanic isolation and you would have noise coupling between two galvanically isolated regions mostly through switching noise. You have to minimize noise in each region. Also don't route signals directly between two regions, you would have to use optical coupling to get across the two regions.
How effective would a...I'm calling it a trench shield for now...be vs other kinds of shielding? Like deliberately making a gap of maybe 1/3 wavelength wide between noise source and receiver? I'm thinking that if you tuned it right it'd be really quite good. Mill a slot and plate the edges maybe? Couldn't always use it for structural reasons but for shorter distances that might be worth trying.
@@Zachariah-Peterson I'd love to! To where shall I send it? Thinking about it some more it'd probably be really impractical for all but the highest frequencies. 5GHz has a wavelength of about 60mm, if we go for a 1/4 wavelength wide gap that's still 15mm, which is a LOT of board real estate. My gut feeling is that effectiveness would drop off pretty quickly below 1/4 wavelength but I'm still very much a newb in this area.
@@DanBowkley Look me up on Linkedin and send me a message, I have the same profile pic. If you wanted to examine this type of structure as shielding against 20 GHz or higher you're now talking about 3.75 mm for quarter wavelength, so it's more manageable. Maybe there is something fun to do with K-band radar here.
Hello Zach, thanks for your podcasts - these are absolutely amazing :) But I have problem, which give me sleepless night. I have stackup TOP Layer, GND, Inner layer 1 (...) and I have RF traces on the TOP (GPS) and digital signal traces on IN1 (>>100kHz). Beetwen those layers is a GND plane, so signals on the IN1 and on the TOP layer have return paths on the same GND layer. If the return paths can affect with each other and cause problems ? In this case, the traces on TOP and IN1 should be routing ortogonally ? Thanks and regards from Poland !
Dammit Zach! After watching several of these videos, I was just getting comfortable with the idea that all this ground-splitting I'm seeing in my audio devices is just an old, antiquated practice of a time when we didn't know better, and then you throw in this curveball that audio maybe should be split! 😫 Would love a bit of a deep-dive on noise and grounding for audio systems some time. 🙂 Finding reliable information is hard because there are so many differing opinions.
LOL.... I will admit that I don't do a lot of audio and most of the info I present is in the context of digital and higher frequency RF. With audio in mid-range frequencies you might need the splits at minimum for noise control but I am careful to generalize on this. If you do have splits you also need to be careful with EMI because more ground is generally better for EMI. You also need to make sure that any splits do not have traces routing over them. Sounds like I will need to do a video on designing at audio frequencies!
We covered some of these aspects in our regulator tutorial, here are links to the videos: Part 1: ua-cam.com/video/6AEUxY9QipI/v-deo.html Part 2: ua-cam.com/video/5q4on8L1vKo/v-deo.html
Great content and very helpful. I want to know one thing that is related to capacitor coupling between traces. When two transmission lines are near each other and are at different potentials. The aggressor line will cause current in the victim trace due to electric field. The thing that is causing me confusion is that when current flows through a conductor magnetic field surrounds it so how can the coupling happens due to electrostatic force because charges are not at rest they are moving so even if they are making a capacitor still there are magnetic field lines. If there are electric field lines then it means that line is storing some signal charges but the impedance of line is very low so I think it is not that.Can you explain how this is happening. Thanks
Both effects happen simultaneously. You have both magnetic coupling and electric coupling between the transmission lines. This is because the two lines have some mutual inductance between them; the changing magnetic field generated by one line induces a signal in the victim line. There is also electrical coupling that produces a current through the parasitic capacitance between the two lines. I talked about this in the crosstalk video, you can watch it here: ua-cam.com/video/hv_gHRK-fGc/v-deo.html
Hi Zach, about the split GND, in which cases is it advisable to split it? What about the components (ADCs) that have AGND and DGND, must they be connected to a GND plane? Thanks for your videos!
This is a good question and I have seen differing opinions on this. I am not an expert on designing ADC integrated circuits, but my understanding of the construction of ADC chips is that the AGND and DGND pins should not have some offset between them because a large offset can cause a quantization error by changing the reference voltage. So the AGND and DGND pins need to be bridged outside on the PCB so that everything is at the same reference potential. One way I have seen to do this is to use a uniform ground plane and just tie it all to GND. I think the main challenge here is isolating any noise near the digital interface and any other pins from inducing a current on the AGND pin or the analog input pin. So this is why people say to use totally separate AGND and DGND plane regions. The problem with this is that you inevitably route something across that split; the exception is if you use an inductive coupling method (transformer) or an optocoupler to get across that gap between those regions. Since most people are just routing traces they will usually be forced to route something across that gap and that will create a potential EMI problem. The other way to do it is to use two separate AGND and DGND regions and connect them at one point very near to the ADC. If you do this, then you cannot route anything across that gap and you should only route the analog signal over the AGND region. This is good for ensuring there is shielding for a low-SNR low-frequency analog signal.
You should take a look at some RF PCBs, plenty of board-level shielding in there. Smartphone PCBs from the mid-2010's were full of shielding cans mounted onto the PCB.
There is always that troll who thinks to know it better. Let it be me today. I disagree not using "filter" for digital signal. E.g. using a series resistor of 10-33 Ohms in digital lines will build a filter with the input capacitance and removes unwanted upper noise and/or ringing. Yet, glad to see you did not try to promote blindly splitting GND planes...
On higher logic levels with large noise margins a 22 Ohm resistor to dampen ringing might be just fine, I see a lot of people on stackexchange saying to do this on SPI when it is running too fast and you have noise (ringing). Problem is you lose some power across that resistor, so more elegant methods are needed with higher speed, lower level signals.
Thanks for the video, right now I'm facing a lot of painful hardware issues in my asrs project, Im going to buy an osciloscope and a logic analyzer, but I really dont know how could I use it to identify the source of noise, and identify its frequency in order to eliminate noise... Could you help me whit any link on how to use the osciloscope to identify the problem?? I'm not quite sure what to look for
Hi Zach, great job as ever. you only told us the low pass does not work for digital noise elimination because of its wide bandwidth. but you did not propose anything for a workaround. @Zachariah Peterson
Love these videos! I really appreciate this type of material as it applies directly to the work I am currently doing. Very concise, clear and direct explanations. I'm genuinely surprised that Altium Academy has only 25k subs... I expected it to be in the range of 500k+... In any case, please keep these coming. They are worth more than gold!
Thank you very much, we're working on getting that sub number up!
My thesis required designing an in-house HTRB/HTOL system capable of picoammeter measurements for GaN reliability testing. The majority of the research I did was on noise mitigation-what a monster!
The front-end PCB itself utilized point-to-point wired differential inputs on PTFE insulated terminals, a via fence around the inputs to the first stage of my 2-stage transimpedance amplifier/high order LPF, isolated planes, massive ground planes, a shielding guard trace, and an RF shield electrically attached to it.
It was a humbling introduction to the world of highly sensitive measurements and RF engineering!
You should send in the design for a 1-minute design review
@@Zachariah-Peterson what files would you need exactly?
@@richardramos5124 Just the PCB design files would be fine
Thanks Zach. Very helpful, especially the part on split ground planes.
Glad you enjoyed it!
Very educative, I enjoyed seeing this
For me (audio electronics hobbyist dabbling in logic signal control) the example given at 20:14 is the rule, not the exception; I'm sure this holds for any modern audio electronics, which is hardy a niche field. Consider any Class D amplifier. (What about elevating one of the ground planes with a resistive divider, which was fairly common in valve amplifiers to keep filament hum out of the signal?)
About shielding: At a signal level, there are options beyond the PCB level that designers use. For critical low-current signals, rigid coax is common for unbalanced signals, especially high-end test equipment, and shielded twisted pair is de rigueur for balanced signals. The latter has been used for stage cable snakes for many decades.
Yeah I get what you're saying. I think the main thing that designers forget is that the logic signals have to be isolated within those grounds. This is one of those big things about isolated systems, you can't route anything across those gaps otherwise they aren't isolated anymore! About the ground plane potential elevation, are you referring to setting a definite ground plane potential difference between two floating grounds using a resistor divider? About shielding, you also have stuff like elastomeric shielding compounds, meshes, gaskets, and even the enclosure.
@@Zachariah-Peterson I was thinking about filament elevation in valve electronics, typically using either the cathode resistor of a power valve or a tapped bleeder resistor on the power supply to set a floating DC reference. The DC offset reduces leakage current between the cathodes and filaments. Something similar might be useful in mixed signal layouts where it might be impractical to physically isolate an analog signal from digital switching. I'm sure we've all heard switching hash from integrated audio on PC motherboards.
I've seen a few early preamplifier designs where there's a low value resistor between the ground of the first gain stage and the rest of the circuit ground. I realize this is typically frowned upon nowadays, but it was apparently done to because ground current reasons.
This was so helpful!! Thank you
Glad it was helpful!
I just accepted a position and these videos will come greatly in hand, thank you for the hard work guys!
Congratulations, glad that these are very helpful!
Thanks for the tips, I am new to this and your videos are really giving me a lot of knowledge to work with.
You are so welcome!
Hi Zach, what a nice video ! Thank’ s a lot Zach !
Glad you liked it!
Some more detail on types of filtering, cavities, attenuation etc would be cool... if you don't have them already, haven't had a chance to watch all the videos yet
whoa! another lesson. thanks!
You're very welcome!
I have just completed my first design with ddr4 memory. Thank you for all the gold info
Very nice video
So nice
Hi Zach,
Thanks for the great video.
Could we also cover some topics about ESD protection?
I have read some of your articles and known about ESD protection components,
but still like to know ESD protection from PCB layout aspect,
and how to deal with ESD in different scenarios,
such as bench devices and handheld battery devices with metallic or plastic enclosures.
Is the rule of thumb directing ESD current to ground as early as possible?
And besides physically testing with an ESD gun,
what kind of software tools or hardware equipment can be used for analyzing ESD tolerance or simulating ESD current flows?
Good idea, sure I can look at putting together some stuff on ESD. I've talked about it before with connectors and chassis grounding but not yet with ESD protection circuits.
Could I know which commercial EDA tool now is used widely around the world for PCB substrate noise coupling analysis? thanks.
Regarding 'isolation", what if i have 3 totally different isolated voltage using a multiport flyback?
Well that would be galvanic isolation and you would have noise coupling between two galvanically isolated regions mostly through switching noise. You have to minimize noise in each region. Also don't route signals directly between two regions, you would have to use optical coupling to get across the two regions.
How effective would a...I'm calling it a trench shield for now...be vs other kinds of shielding? Like deliberately making a gap of maybe 1/3 wavelength wide between noise source and receiver? I'm thinking that if you tuned it right it'd be really quite good.
Mill a slot and plate the edges maybe? Couldn't always use it for structural reasons but for shorter distances that might be worth trying.
How about you send me a drawing and we do an HFSS simulation to validate it?
@@Zachariah-Peterson I'd love to! To where shall I send it?
Thinking about it some more it'd probably be really impractical for all but the highest frequencies. 5GHz has a wavelength of about 60mm, if we go for a 1/4 wavelength wide gap that's still 15mm, which is a LOT of board real estate. My gut feeling is that effectiveness would drop off pretty quickly below 1/4 wavelength but I'm still very much a newb in this area.
@@DanBowkley Look me up on Linkedin and send me a message, I have the same profile pic. If you wanted to examine this type of structure as shielding against 20 GHz or higher you're now talking about 3.75 mm for quarter wavelength, so it's more manageable. Maybe there is something fun to do with K-band radar here.
Hello Zach, thanks for your podcasts - these are absolutely amazing :) But I have problem, which give me sleepless night. I have stackup TOP Layer, GND, Inner layer 1 (...) and I have RF traces on the TOP (GPS) and digital signal traces on IN1 (>>100kHz). Beetwen those layers is a GND plane, so signals on the IN1 and on the TOP layer have return paths on the same GND layer. If the return paths can affect with each other and cause problems ? In this case, the traces on TOP and IN1 should be routing ortogonally ?
Thanks and regards from Poland !
Placing GND between these two layers prevents them from interfering with each other.
Dammit Zach! After watching several of these videos, I was just getting comfortable with the idea that all this ground-splitting I'm seeing in my audio devices is just an old, antiquated practice of a time when we didn't know better, and then you throw in this curveball that audio maybe should be split! 😫
Would love a bit of a deep-dive on noise and grounding for audio systems some time. 🙂 Finding reliable information is hard because there are so many differing opinions.
LOL.... I will admit that I don't do a lot of audio and most of the info I present is in the context of digital and higher frequency RF. With audio in mid-range frequencies you might need the splits at minimum for noise control but I am careful to generalize on this. If you do have splits you also need to be careful with EMI because more ground is generally better for EMI. You also need to make sure that any splits do not have traces routing over them. Sounds like I will need to do a video on designing at audio frequencies!
Hi Altium Academy: Is it possible to make a video using Altium to reduce noise in a PCB ?
We covered some of these aspects in our regulator tutorial, here are links to the videos:
Part 1: ua-cam.com/video/6AEUxY9QipI/v-deo.html
Part 2: ua-cam.com/video/5q4on8L1vKo/v-deo.html
Great content and very helpful. I want to know one thing that is related to capacitor coupling between traces. When two transmission lines are near each other and are at different potentials. The aggressor line will cause current in the victim trace due to electric field. The thing that is causing me confusion is that when current flows through a conductor magnetic field surrounds it so how can the coupling happens due to electrostatic force because charges are not at rest they are moving so even if they are making a capacitor still there are magnetic field lines. If there are electric field lines then it means that line is storing some signal charges but the impedance of line is very low so I think it is not that.Can you explain how this is happening. Thanks
Both effects happen simultaneously. You have both magnetic coupling and electric coupling between the transmission lines. This is because the two lines have some mutual inductance between them; the changing magnetic field generated by one line induces a signal in the victim line. There is also electrical coupling that produces a current through the parasitic capacitance between the two lines. I talked about this in the crosstalk video, you can watch it here: ua-cam.com/video/hv_gHRK-fGc/v-deo.html
Hi Zach, about the split GND, in which cases is it advisable to split it? What about the components (ADCs) that have AGND and DGND, must they be connected to a GND plane? Thanks for your videos!
This is a good question and I have seen differing opinions on this. I am not an expert on designing ADC integrated circuits, but my understanding of the construction of ADC chips is that the AGND and DGND pins should not have some offset between them because a large offset can cause a quantization error by changing the reference voltage. So the AGND and DGND pins need to be bridged outside on the PCB so that everything is at the same reference potential. One way I have seen to do this is to use a uniform ground plane and just tie it all to GND. I think the main challenge here is isolating any noise near the digital interface and any other pins from inducing a current on the AGND pin or the analog input pin. So this is why people say to use totally separate AGND and DGND plane regions. The problem with this is that you inevitably route something across that split; the exception is if you use an inductive coupling method (transformer) or an optocoupler to get across that gap between those regions. Since most people are just routing traces they will usually be forced to route something across that gap and that will create a potential EMI problem.
The other way to do it is to use two separate AGND and DGND regions and connect them at one point very near to the ADC. If you do this, then you cannot route anything across that gap and you should only route the analog signal over the AGND region. This is good for ensuring there is shielding for a low-SNR low-frequency analog signal.
Only thing needing shields is test equipment, and that is just to remove the variability of the minute.
You should take a look at some RF PCBs, plenty of board-level shielding in there. Smartphone PCBs from the mid-2010's were full of shielding cans mounted onto the PCB.
mashallah du bist der bester :-)
What magical office do you work in where all the markers are perfectly fresh and draw perfectly
What you don't see off screen is the big bag filled with fresh markers
There is always that troll who thinks to know it better. Let it be me today. I disagree not using "filter" for digital signal. E.g. using a series resistor of 10-33 Ohms in digital lines will build a filter with the input capacitance and removes unwanted upper noise and/or ringing.
Yet, glad to see you did not try to promote blindly splitting GND planes...
On higher logic levels with large noise margins a 22 Ohm resistor to dampen ringing might be just fine, I see a lot of people on stackexchange saying to do this on SPI when it is running too fast and you have noise (ringing). Problem is you lose some power across that resistor, so more elegant methods are needed with higher speed, lower level signals.
Thanks for the video, right now I'm facing a lot of painful hardware issues in my asrs project, Im going to buy an osciloscope and a logic analyzer, but I really dont know how could I use it to identify the source of noise, and identify its frequency in order to eliminate noise... Could you help me whit any link on how to use the osciloscope to identify the problem?? I'm not quite sure what to look for
Lot of the long tail coming in here.
Hi Zach, great job as ever.
you only told us the low pass does not work for digital noise elimination because of its wide bandwidth.
but you did not propose anything for a workaround. @Zachariah Peterson