Interview experience at Synopsys

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  • Опубліковано 11 гру 2024

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  • @ShivaniSharma-fs6fq
    @ShivaniSharma-fs6fq 4 роки тому +9

    Please continue making such videos. It would help students to get a job in a good company which they were unaware of.

  • @pavan_pelleti
    @pavan_pelleti Рік тому +11

    CMOS inverter - charging & discharging time
    Clock skew - adv & disadv
    Types of power dissipation in CMOS inverter
    Latch & flipflop where we use & o/p waveform
    Aspect Ratio of MOSFET changes parameters of MOSFET how?
    Order of priority of timing,power,area while designing IC
    3-types of inverters and comparing their performance
    Recents for Static & dynamic power dissipation and dependency on Threshold voltage
    Power dissipation reduction?
    Which parameters to vary to cover power dissipation for above
    Vlsi design flow
    Setup & hold time ( why,how,for latch too)
    Latch using mux
    Puzzles
    Resume

    • @sanu2602
      @sanu2602 Рік тому

      Did you attend the synopsys interview..?are you selected in the interview? Which type of technical amplitude questions are there in interview can you tell me about the your interview.....

  • @kollasivaramakrishna6732
    @kollasivaramakrishna6732 3 місяці тому +1

    Thank you😇 bro for sharing....

  • @radhikasingh4065
    @radhikasingh4065 4 роки тому +8

    Thanks a lot very beneficial your video, can you also make a video on how to do preparation? please

  • @jaisalashraf9536
    @jaisalashraf9536 3 роки тому +11

    Seems like you attended interview for Physical Design position

  • @PrateekSingh-wq4cr
    @PrateekSingh-wq4cr 23 дні тому

    👍👍 thanks

  • @AVINASHKUMAR-yd1gp
    @AVINASHKUMAR-yd1gp 3 роки тому +3

    I can't really understand the question at 4:45, Realize Adder using 2x1 mux then u said using single Adder. Can you please Explain

  • @joffinjoy555
    @joffinjoy555 3 роки тому +1

    Thanks, bro.

  • @elamparithiparithi3344
    @elamparithiparithi3344 4 роки тому +1

    Useful video bro.

  • @illuruvigneswarreddy9469
    @illuruvigneswarreddy9469 11 місяців тому

    Please suggest good resources to learn system verilog for design verification

  • @velmurugan47
    @velmurugan47 4 роки тому +2

    Thanks Bro!

  • @panther4495
    @panther4495 2 роки тому +1

    what is the academic eligibility criteria for synopsis

  • @dheerajchumble5602
    @dheerajchumble5602 4 роки тому +7

    Nice. However it would have been good if u had given the answers too.

  • @pavnisharma6929
    @pavnisharma6929 2 роки тому

    I wish you could also give answer

  • @sriharshakalmane
    @sriharshakalmane 2 роки тому

    What would a CAE engineer do at Synopsys?

  • @codecorn8030
    @codecorn8030 Рік тому

    For softaware CS what questions are possible ?

  • @shashwatrao6949
    @shashwatrao6949 3 роки тому +5

    Bro, can you give the answers for these questions? That will be helpful

  • @RipunjoyGoswami
    @RipunjoyGoswami 6 років тому +4

    thank you so much for sharing the video.can you share any topic related to STA...

    • @anantsingh12300
      @anantsingh12300 5 років тому +2

      Refer nptel lectures on physical design

  • @doglover927
    @doglover927 2 роки тому

    thanks bro....

  • @pavanbollimuntha2389
    @pavanbollimuntha2389 5 років тому

    What is the difference between inverters you told

  • @Rahuljain-hj9uk
    @Rahuljain-hj9uk 6 років тому +3

    I want to join in a core company ! I am thinking to take a training program .! Can you help me by suggesting few training centres!

    • @SPACE-vw4zh
      @SPACE-vw4zh  6 років тому

      I am sorry, i won't be the right person to answer this.

    • @GautamRana1995
      @GautamRana1995 4 роки тому +2

      Do a course from Cdac

  • @lisening
    @lisening 5 років тому +1

    Thank you

  • @nitindubey5472
    @nitindubey5472 5 років тому +6

    Does education gap matters during placements ?

  • @dheerajtiwari6155
    @dheerajtiwari6155 5 років тому +3

    will you plz give the answer of these question?

  • @harikrishnathokala207
    @harikrishnathokala207 5 років тому

    Thank u so much

  • @KishoreKumar-011
    @KishoreKumar-011 6 років тому +1

    How to apply campus drive for synopsys 2018 bro..

    • @SPACE-vw4zh
      @SPACE-vw4zh  6 років тому +5

      Most of the big companies do post job openings on LinkedIn. You can follow the companies you like and apply via LinkedIn itself.

    • @KishoreKumar-011
      @KishoreKumar-011 6 років тому

      @@SPACE-vw4zh okiee bro..

  • @T.Naresh625
    @T.Naresh625 4 роки тому

    Can you tell answers

  • @vatsala900
    @vatsala900 4 роки тому

    Thanks

  • @chayannath3686
    @chayannath3686 5 років тому

    thanks man

  • @basilek5299
    @basilek5299 6 років тому +3

    Congrats.. jeff...

  • @uniquepersonalityisshowsco7325
    @uniquepersonalityisshowsco7325 5 років тому

    tq ...brother....

  • @SandeepYadav-xv8dv
    @SandeepYadav-xv8dv 4 роки тому +2

    Hii bro I'm trying for job vlsi can you tell which resources are good to practice and reading

  • @PainAndPleasures
    @PainAndPleasures 4 роки тому

    In which city/state/country was the Synopsys office located ?

  • @akashnthampy3162
    @akashnthampy3162 6 років тому +1

    Can u refer me a standard text book...that describes..timing issues of latches...like setup and hold time for latches...not for flip flops

    • @SPACE-vw4zh
      @SPACE-vw4zh  6 років тому +8

      Hi, Digital Integrated Circuits by Jan M Rabaey is a standard textbook on the subject. you can refer the section "Timing Properties of Multiplexer-based Master-Slave Registers" in Chapter 7 - DESIGNING SEQUENTIAL LOGIC
      CIRCUITS, of Rabaey (page no. 308), to see why setup and hold time exist. You could extend similar reasoning for other circuits.

  • @ananthukrishnan9236
    @ananthukrishnan9236 4 роки тому +3

    Malayali...?

  • @sparshbadal3400
    @sparshbadal3400 5 років тому

    bro answers plz dire need

  • @SAhellenLily
    @SAhellenLily 7 місяців тому +1

    Thank you