my 90-year-old mother could program a module to turn on a single sseg display. Where it is tricky and I have not found a single example is to turn multiple on at the same time since they all share the same 8 LEDs. In theory, I know what needs to be done but I do not know how to put it into practice. I know I have to cycle through the anodes displaying a value with each corresponding anode but I can't figure out how to do it. I cannot make four instances of hex7seg because all four share the same 8-pin positions for the 7 segments plus the dp.
@@ElectroDeCODE currently working on 4 bit adder with result displayed on 2 7-segment displays would love to see a multiple 7 segment display video! (for example 1001 + 0110 printing 1 and 5 on 2 displays, showing the result to be 15)
I would suggest make more videos related to FPGA. Digital Clock, Stopwatch, and many more cool projects!
Noted.
my 90-year-old mother could program a module to turn on a single sseg display. Where it is tricky and I have not found a single example is to turn multiple on at the same time since they all share the same 8 LEDs. In theory, I know what needs to be done but I do not know how to put it into practice. I know I have to cycle through the anodes displaying a value with each corresponding anode but I can't figure out how to do it. I cannot make four instances of hex7seg because all four share the same 8-pin positions for the 7 segments plus the dp.
New video for using multiple 7 segment displays will be uploaded soon.
Thankyou sir, you helped me alot.
Thanks a Lot. It worked on Basys 3!
Great to know that.
Best explanation. How can we use multiple 7 segments ?
The video featuring multiple seven segments will be uploaded soon.
@@ElectroDeCODE Great.
@@ElectroDeCODE currently working on 4 bit adder with result displayed on 2 7-segment displays would love to see a multiple 7 segment display video! (for example 1001 + 0110 printing 1 and 5 on 2 displays, showing the result to be 15)
@@OkoIyae6 That video will be uploaded soon.
why mine is inverted
Check your connections carefully.
I had the same issue, the case statement here should actually make cathode output reg to be declared as [0:6].
@thymanbearpig7555 thanks for your input dear
Thank you sir
Hello sir
Can I get the source code
Please wait
Hello sir
Source code please
Source code