Live: 6502 Addressing Modes: Writing microcode for an FPGA 6502

Stream starts at 7-July-2024 at 5pm GMT.
The 6502 is a CISC 8 bit CPU. We'll be implementing it as a synchronous bus FPGA module. In this session the internal architecture is (hopefully) finished or almost finished, and all that's left is to write the microcode that implements the actual opcodes.
We'll continue implementing opcodes in the order in which the test program uses them, though we've skipped a few opcodes implemented offline to get to the interesting parts.
Next up is a region implementing the same opcode with all of its different addressing modes.
I'd like to thank my Patreon BBC Micro level supporter, Yehuda T. Deutsch.
You, too, can support my work on Patreon: / compusar
Discord server invite: / discord
Code written during the stream is available at github.com/Com...
6502 block diagram is at www.witwright....
visual6502 site: visual6502.org
WDC datasheet: www.westerndes...

[@pharaohpanda]

Thank you for making these videos! I was wondering if you have any FPGA development board recommendations that have good tooling support on Linux? Thanks for any help!

[@CompuSAR]

If all you're after is learning, I really recommend the QMTech board. They have a business model of waiting for deals on components, and then building boards based on the components they managed to source cheaply. This means that they sell development boards well below market price. Sadly, it also means their deals are fleeting. Once a board goes out of stock, it's unavailable.
As for tooling: Linux is a pretty standard environment for FPGA development. Pretty much all FPGA dev tools are available on Linux.