Hello Ahmed, There are three forms in the tutorial where you can enter your email address and receive the project in your inbox. Go to vhdlwhiz.com/pwm-controller/ and search for "GIVE ME THE FILES". :)
@@VHDLwhiz okay thank you sir.. I received it.. Sir please suggest me any video tutorials by which I can understand about generics, integer, array and keyword "type" in VHDL..
You have to assign the "clk" signal from the entity to an external pin on the FPGA. You can download the example project for Lattice iCEcube2 from the associated blog post. The link is in the video description.
this explained it better and more than my udemy vhdl course
Fight the good fight comrade, Verilog must never win.
Hello, thank you for this good tutorial. Please i need the entire VHDL code of the PWM controller. Thank you
You can download it from the VHDLwhiz shop for free: vhdlwhiz.com/product/vhdl-pwm-generator/
Hi nice tutorial thanks for this.. but I don't know from where I can download I checked there is no option to download.
Hello Ahmed,
There are three forms in the tutorial where you can enter your email address and receive the project in your inbox. Go to vhdlwhiz.com/pwm-controller/ and search for "GIVE ME THE FILES". :)
@@VHDLwhiz okay thank you sir.. I received it..
Sir please suggest me any video tutorials by which I can understand about generics, integer, array and keyword "type" in VHDL..
hello. how we can use the externel clock !
You have to assign the "clk" signal from the entity to an external pin on the FPGA. You can download the example project for Lattice iCEcube2 from the associated blog post. The link is in the video description.