EDT | compression | LFSR patterns | decompressor

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  • Опубліковано 8 лис 2024

КОМЕНТАРІ • 20

  • @sunilsuni9732
    @sunilsuni9732 6 років тому +4

    Good knowledgeable video on EDT.
    Thanks for the video

  • @said-sq8wq
    @said-sq8wq 5 років тому +2

    very detailed video thanks. Looking forward to more videos.

  • @RohitPatel-er3qw
    @RohitPatel-er3qw 9 місяців тому

    Good explanation sir. Thank you.

  • @kumarss6396
    @kumarss6396 2 роки тому

    LFSR exists in decompressor u changed the blocks but thanks for information and why we need edt clock and edt update in compressor?

  • @vamsikrishna-in9ps
    @vamsikrishna-in9ps 5 років тому +1

    In the Beginning u said Decompressor have a LFSR .but when you come to lock up latches both are reverse as you given by video wrong. first Decompressor will come. after that scan chain out will connect to the compressor logic,and you mentioned timing violation between Decompressor to scan chain,that y you given lock up latch.can you please explain the timing violation s in detail and LFSR inside the logic having flipflop and combo logic ( for this also we need explanation),can you please revise the video again.thanks for making video ,this one is really very help full.

  • @vlsi-techsiliconbyamal6399
    @vlsi-techsiliconbyamal6399 3 роки тому +1

    Good presentation👍

  • @lokeshreddydantla289
    @lokeshreddydantla289 5 років тому +2

    In this video i didn't understand what is the difference between 1 hot masking and how to detect fault aliasing patterns with mask patterns??

  • @Rishabh-be6uk
    @Rishabh-be6uk 7 місяців тому

    I have doubt
    How is LFSR is deciding which pattern will go in which scan chain ?...also does it change the ATPG Patterns?...then what will be use of ATPG ?

  • @minionsplanet2800
    @minionsplanet2800 6 років тому +4

    In the beginning u said decompressor will be having the lfsr logic, at the time of lock up latch u said compressor will be having lfsr logic.

  • @vamsikrishna-in9ps
    @vamsikrishna-in9ps 5 років тому +1

    1 hot masking and fault alising both are same right ?

  • @Alpha_Stammerer
    @Alpha_Stammerer 6 років тому +1

    I didnt understand why lockup latches are induced between scan chains and compactor and between two cells in scan chains

    • @pasupuletivinaykumar4408
      @pasupuletivinaykumar4408 5 років тому +2

      1. so the compressor/ decompressor used edt_clock and scan chains use different scan clock which might cause skew with timing violation. so we induce lockup latches when there is timing violation.
      2. Two different adjacent flip-flops might use two different clocks.
      ex. clock of launching flop may be scan clock directly
      clock of capturing flop might be derived from scan_clock.
      so there might be skew causing timing violation. so we induce lockup latch when there violation.

  • @vineetsharma7632
    @vineetsharma7632 Рік тому

    How we deal combinational logic with edt

  • @suryareddy2958
    @suryareddy2958 2 роки тому

    Thank you ❤️

  • @vlsi-techsiliconbyamal6399
    @vlsi-techsiliconbyamal6399 3 роки тому +1

    This vdo while explaining the lockup latch you mistaken.. Instead of compressor you are saying it as decompressor at that time you figure is also wrong.. Its actually not decompressor its a compressor

  • @Anilkumar-px2kd
    @Anilkumar-px2kd 5 років тому

    Is there any specific port for edt_clk while using EDT
    can you please conform

  • @abhishekpatil1203
    @abhishekpatil1203 6 років тому

    why edt_update signal is used to reset the decompression and compression whenever the new patterns are loaded