At 10:10 In the normal mode, there is only capture function and hence whatever the fault is stuck at, the flip flop is going to capture only that value. Hence it is difficult to detect stuck at fault in normal mode.
Hello Professor, Can you please make the playlist for each course? The numbering for lectures/videos is confusing. Moreover, it would be appreciated if titles reflect the course each video belong to and the order of the lecture. Thanks
On the last question, the FF2 will be stuck at 0 since after reset, output of FF2 will be cleared. This output then gets fed as an input to the only OR gate with a SA0 issue. As a result, FF2 output will never change; therefore, prevent the circuit from normal operation.
In normal mode, the input signal is an absolute means designer give standard combination of inputs and expects the output but never assumes one of the input stuck to either 0 or 1. But this stuck part happens during manufacturing...so it can be detected in test mode only. I hope this is the correct answer
I have one doubt....In the given examples, we can observe the FF output after 1 shift cycle, isn't it? As we already have good/faulty result at the output of FF2 after capture operation....then it should take only one shift cycle to propagate it to the output of FF1....please explain
I also thought the same.Only one cycle need to get FF2 at primary scan_output. But I think, it is a rule to follow-> # of load/unload cycles = # of scan flops in the scan chain
Actually the output that is under observation is output from the scan flip flop which is connected in serial chain. Hence two clock pulses are required to observe the values of SFF during shift out operation
Thank you professor for a great lecture. It makes clear what the scan test is than any other articles or videos. Does anyone know the answer for the question? Why can't stuck at zero fault be testable in normal mode?
Thank you so much professor for publishing this video. I am a semiconductor engineer from Singapore trying to learn more about logic design
At 10:10 In the normal mode, there is only capture function and hence whatever the fault is stuck at, the flip flop is going to capture only that value. Hence it is difficult to detect stuck at fault in normal mode.
Hello Professor,
Can you please make the playlist for each course? The numbering for lectures/videos is confusing. Moreover, it would be appreciated if titles reflect the course each video belong to and the order of the lecture. Thanks
great Lecture! professor .Thanks
Love from India 😍
what is the answer for the question
On the last question, the FF2 will be stuck at 0 since after reset, output of FF2 will be cleared. This output then gets fed as an input to the only OR gate with a SA0 issue. As a result, FF2 output will never change; therefore, prevent the circuit from normal operation.
very nice lecture, love from India
In normal mode, the input signal is an absolute means designer give standard combination of inputs and expects the output but never assumes one of the input stuck to either 0 or 1. But this stuck part happens during manufacturing...so it can be detected in test mode only. I hope this is the correct answer
I have one doubt....In the given examples, we can observe the FF output after 1 shift cycle, isn't it? As we already have good/faulty result at the output of FF2 after capture operation....then it should take only one shift cycle to propagate it to the output of FF1....please explain
I also thought the same.Only one cycle need to get FF2 at primary scan_output. But I think, it is a rule to follow-> # of load/unload cycles = # of scan flops in the scan chain
Actually the output that is under observation is output from the scan flip flop which is connected in serial chain. Hence two clock pulses are required to observe the values of SFF during shift out operation
Thank you professor for a great lecture. It makes clear what the scan test is than any other articles or videos.
Does anyone know the answer for the question? Why can't stuck at zero fault be testable in normal mode?
Because in Normal mode there is only a capture function, hence it is not observable. In test mode there is both shift and capture function.
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