@@AnnaVannieuwenhuyseхорошо вам, можете иметь несколько отцов, это у нас за желание иметь несколько пап можно отправиться в тюрьму, путинский режим ничего не поделаешь🤷😃
I think more UA-camrs should show their failures. It's part of experimenting and people need to understand that it's ok to fail. Learn from your mistakes.
You should've used a x10 divider on the probe. This is absolutely necessary to reduce the interaction of high frequency signals with the oscilloscope input.
Yes, and please set your scope to use more than 1 vertical division of range. Offset the trace downwards if necessary. The resolution for voltage measurements will be much better. Rather than free-running the trigger, it would also help to set the trigger level to, say, 1 V so you can see the waveforms properly. You could also move the trigger level up and down to see if different signal levels are apparent when DQx is is being driven by the RAM chip vs. the board. Finally, the measurement would be much cleaner and more reliable with a nearby connection to ground -- ideally a probe tip grounding spring if there's a nearby GND you can poke as you probe. This has been a great series!
I love that you and others are making new RAM modules for retro computers. Back in the early 90s having 64MB RAM on my 386 was only a dream as it was so expensive but now RAM is much less expensive
I hope that the new modules (PCB rev 3.x) will work flawlessly and I can get a 386 to 128MB! Haha, that would be cool! This amount of memory is most probably useless to a 386, but it is still a nice project - and I am learning so much from it! Thinking about a 386 multiple times the memory of Socket 7 and maybe even Slot 1 machines is ridiculous :D
@@bitsundboltsа что если более емкую и низковольтную память запустить через преобразователи уровня все управляющие сигналы, шину адреса, шину данных. Открываются тогда вобще заоблачные объемы доступной физической памяти🤔
Electronic engineer here, explanation for the 3.8v address line max would be due to driver voltage drop within the chipset driving those lines, with older 5v CMOS specs it was common to see a "Vhi in" spec of 3.5v to 5v and a "Vhi out" spec as low as 3.6v. With that in mind the added capacitance to the RAS/OE lines would delay that already low drive signal outside of the timing spec as you have seen, this _could_ be adjusted for in the bios to alter the timing slightly. Very cool project and has inspired me to dig out some of my old treasures to get living again, namely the Amstrad 8086 i have in storage. Thankyou
@@monad_tcp typically what happens is the extra capacitance on these lines will cause the rise/fall time to be delayed out of spec. There is a setup and hold time requirement between address lines changing to when the RAS/CAS lines are required to lock those values into the memory chips, should this be delayed at the chip end the address lines may change again before the memory has a chance to latch them resulting in address corruption. this delay is a result of the signal drivers output impedance and the stray capacitance of everything attached to these lines and it seems in this case the RAS/CAS drivers are quite high impedance comparatively to other lines and as such are more susceptible to error.
Grey-bearded electronics dude here. This was cringe to watch. I know, the dude is still learning and all that, but still. So many mistakes were made. But I am rooting for him. A like was given.
Brilliant work!!! Glad I could help! Regards the probe affecting the memory test when probing CAS - if you get a scope probe that supports x 10 impedence (or greater), and if you can set the scope into the same mode too, you should be able to scope the CAS and it shouldn't crash! This is one of your best videos btw!!!! Just signed up to support you for what I can on Patreon, it's not a lot but I do love every video you put out!
Thanks for the hint! I will try the 10X setting next time. Now I finally know why this feature is there on the probe! Thanks for all your input - I really appreciate it!
@@bitsundbolts ummm yeah ALWAYS use 10X otherwise it messes up the signal. Remember to multiply the signal height by 10 on the scope to get back the original reading. Also you can get a reading on a very sensitive pin by putting the signal into pin 1 of a 74LS04 which will output on pin 2 but inverted. So tie pin 2 to pin 3 and measure the correctly re-inverted signal on pin 4. To use the logic chip, pin 7 must be tied to ground and pin 14 to 5V. This can be used on very sensitive crystals that refuse to measure even on 10X.
Yeah, without using 10x setting, you're basically directly attaching your probe's meter or two of coax cable to whatever you're probing. Works okay for audio frequency signals but it will create undesirable ringing and reflections when used with fast digital signals
Great that you have tried my solder paste soldering suggestion. Also, never give up on projects and try as many times as you can. I for example tried to resurect a Seagate hardcard and after a week of soldering, hdd heads unsticking and sstor low level formatting was able to bring it back from the dead.
I learn so much from my audience! I won't be able to try every suggestion, but solder paste and stencil was definitely a great one! I absolutely love this technique. Once I get PCB 3.x verified, I am going to get gold plated PCBs and start making some memory kits! Thanks for your help, suggestions, comments, and your time!
Absolutely enjoyed the video more than your other “successful” ones. I learn way more from other people’s struggles than just their successes. So thank you for sharing your journey and also sharing your lack of knowledge. It is greatly appreciated.
Thanks for this feedback! Each time I post something, I learn something new from my audience! It is such a good community and I love the ideas and suggestions pouring in. That is why I am not afraid of posting failures.
A 386 can technically address 4GB of RAM. It can't be done due to chipsets and memory sockets, but it would be hilarious to see one POST and see how long it takes for _that_ memory count.
Hah, yes, that would be funny. I guess that would be a perfect topic for a "short" form video. I can measure how long it takes to get to 1MB (usually counts slower), and the rest. Then just extrapolate to 4 GB.
i love 24 bit wide memory address busses so much for some reason, 16 MB just seems like such a beautiful memory quantity, i would love any 16 MB content!!
@@bitsundboltsI concur with OP! There is almost never any reason to use the X1 setting, to the point that the probes included with high-end oscilloscopes (like the LeCroy and the Rohde&Schwarz that I have at work) don’t even have the switch - they’re always X10. Some people actually superglue the X1/X10 switch to X10 position (or put heat shrink tubing on it to prevent it from sliding), or pull off the switch cap entirely, to prevent accidentally switching to X1.
I hope it will help people create their own. But I will also try to prebuilt modules and sell those. This way anyone can get access to high capacity 30-pin SIMMs. It just takes a bit of time! I am happy to work for a nice retro community!
To avoid the crashing and for high frequency measurements you need to put your probe in x10 attenuation. Since your signals will never be negative, you can increase the resolution of your measurement by shifting your trace position downwards and reducing the V/div setting to 2v/div or 1V/div
Even thought you had a failure you did learn a lot from it. So in the end it wasn't really a failure it was a partial success! I still really enjoyed watching this and I'm excited to see how the final module turns out one day.
Those memory controllers had built in safeguards for parity on chip. Was wild back in the day that a server would have memory errors and if you just switched the SIMM that you thought was bad to the back and moved SIMMs up, it would work and the SIMM you thought was bad was now working again. Seeing as the SIMMs were always in parallel, if the first was out of spec but the rest were in spec, it would fail. If the first was in spec and the others were out of spec it would boot. Seems like the memory controller always trusted the first SIMM implicitly.
A passive resistor network works when it’s the only component in the chain. With more components, read more memory modules attached there is also current flowing to them. Better to use an active semiconductor circuit.
You've asked what we think about your project ☺ I personally love your videos and take it as a very trilling series for geeks. Hope you'll continue. Thank you a lot!
Glad that many people seem to agree with you! I am happy to share any project I am working on if it makes sense - success or failure. Thanks for watching my videos!
This is so good... All the details of what you tried and how it went..... The next video should be awesome. Going over all the things you fixed to get from 2.0 to the latest version. Can't wait.
Haha, learning by doing. I'm happy to hear that so many of my audience like this type of content - even if a project is unsuccessful. Well, we all hope that the project will end in success. I'm still waiting for the SMD components to arrive, but I am also looking forward to the next video!
I've been learning about level shifting and experimenting with it while doing a recent project, too, so this video was really good timing. Like you, I also quickly discovered that a voltage divider was not the correct solution to lower the voltage of unidirectional signal lines, but the solution I ended up finding was to use a 4000-series CMOS logic gate and power it with the output signal voltage I wanted, and it seems to have done the trick for me. (That being said, the signals I'm working with are a few orders of magnitude slower than yours; at 33MHz, I don't think it could keep up) Great video, by the way! Every part of this little memory series has been both entertaining and informative, and I'm looking forward to whatever's next
Thank you! I'm also learning and discovering new things along the way. The main problem is really the high frequency - even though signals are not necessarily arriving at 33MHz. There are wait states and delays everywhere. So, it is not that the logic circuit needs to switch that frequently. I believe the true frequency is somewhere between 3-5 MHz. Good that you found a solution to your problem! Thanks for watching!
This is why I am careful with ppl telling me they want to 'make some memories together' I want to do this, but we always end up in a theater or watching a sunset...
I love your stuff, for any voltage dividers at high-frequencies, you need to consider a 'feed-forward' capacitor(a capacitor from 5v_IN to 3v_OUT), this is the concept used by high-speed DCDC converters to stay on-top of transient conditions pulling the rail down so they can respond suddenly without RC delay, also used by instrumentation, the variable capacitor in oscilloscope probes is to set the ratio of cap divider to tune it's edge for square-wave response. For your PCBs you should ask for hard-gold fingers for edge connections/board, instead of HASL.
if your probing things like that you should have atleast x10 or better still x100 or x1000 probe. great work with the theory and im sure the end product will work.
Great vid, thanks for sharing your journey! One thing to think about - you could have probably kept the voltage dividers should you have used so-called "advancing network" or "sharpening network". Basically it is just a capacitor connected in parallel with the top resistance in the dividing network, which allows high frequencies to bypass the resistor and thus eliminates the low pass filter effect. IMO something like 47pF would work just fine.
Absolutely loved the video very informative. It’s also really cool because it shows that everybody makes mistakes when you’re learning something new. I have a theory as to why those ram sticks worked in the first three slots, as the ram sticks get further away from the cpu and chipset the signal integrity breakdowns further as the trace length increases not to mention additional stress the more sticks are added to the controller or maybe it has to do with the memory topology design of the board all just theories and things I’ve seen on newer boards.
Good point. It could be what you're suggesting. And the module seems to work for "light" load. I can extract a full Windows 3.1 and DOS copy into a 30MB RAM drive - and then boot into it. A heavy load like memtest causes the memory to fail. I hope the SMD components arrive soon so I can finish the other four modules and test PCB 3.x - hopefully everything works out!
Pretty cool. I have been looking for black PCB 72 pin FPM/EDO sticks for a couple Amiga motherboards, but everything is green PCB. I look forward to the conclusion to this video with your final design.
If you use a unidirectional level shifter for the address and control signals you can use one with push/pull outputs so you don't need the resistors as for the data bus there maybe level shifters that have direction en multiple enable pins so that way its possible to also have push/pull outputs eliminating any resistors on the back making it easier to assemble
Good point. I was looking for something, but so far, I didn't find a fast enough level shifter. You're right, at the moment I need pull-up resistors for any line that "sends" data away from the level shifter to get a strong signal.
The Address lines drive up to 64(72) IC when using 8 8/9 Chip Memory Modules. So they are more powerful than the data bits as this are only shared between two chips (each bank one).
Oh right, I do have 30-pin SIMM modules with 9 memory chips on them. Crazy to think of having each chip with a single data line (1-bit chip). So, each bank would drive 36 memory chips - that sounds insane :) And as you said, 72 chips if both banks are populated.
Cool stuff ! Aside, you likely already know, but for others, active oscilloscope probes are getting quite reasonable these days (even some open source versions), and provide a much lower capacatance load, so can be used for more sensitive measurements, which I find are quite useful when doing this type of investigative testing.
You should pick up some grounding spring clips for your scope probes. Trying to probe memory with that huge antenna ground lead is going to destroy the fidelity of your reading.
You should also see about designing an 8MB SIMM module. You are going to have to add the necessary components to convert the voltages, first, though. If you want to go into non-salvage chips, you can likely find new old stock in either electronic surplus or industrial electronics supply catalogues, but of course, also learning to do successful salvage is important.
Yes, it works quite well. The paste is a mix of very small solder balls and flux - and it works really well! This was my first attempt. I am sure if I make a couple of those, the results will be even better.
@@bitsundbolts I'm wondering if a dryer paste would be less likely to blur like that and reduce bridges. I watch a channel where he's complained multiple times about runny paste. He does professional data recovery. He can do head swaps, but most of his videos these days are like flash drives and memory cards and the ocasional NVME. And it requires a lot of soldering. He uses stencils for the NAND chips.
Thanks for the video. I've been wanting to make a socket 7 to socket 4 adapter for a long time. To install k6-2+ on a 1993 motherboard. It needs level shifters like these because early Pentiums are 5-volt level signal.
Most signals on the system bus often have a series resistor to prevent resonances from sharp transient edges. If there's more things connected to one line than another, there'll be more current through that resistor, and the voltage may drop a little. This effect is even seen in boards without that resistor, since the wires themselves will have a little resistance too, but a little less than if your board does have proper "termination". Traditionally most PCs work with TTL LS-type logic, which traditionally had reasonably high resistance for high level, and low resistance for low level. The acceptable voltage-range for a high level with those chips went all the way from 5V down towards 2V, since the high-level was a lot more susceptible to reading a bit lower due to the higher resistance. CMOS, however, does not have that bad of a problem, since both high and low are low resistance. As long as a line is above 3V or below 2V, it should not be a problem.
Address lines are likely showing a lower voltage on the oscilloscope due to fan out. Or at least this makes the most sense to me. The address bus goes to more devices than the data bus on average. It would track then on lower cost or older designs you will see a higher than average drop in voltage on the address bus due to extra current draw for things like address decoding. The data bus however is likely behind a buffer heading to the RAM and therefore would be closer to VCC. That being said someone may correct me but this is what makes the most sense to me.
Hey! First and foremost, thank you for the content! I enjoy watching all of your videos! Now... Dont know if you want the information or not, but I thought I would step in and leave you a comment about your approximation model you built utilizing the Falstad Circuit Simulator. The cap never fully discharges... via TTL, any standing voltage which is less than 2.15~2.35 is considered a 0, and anything above 2.75~2.95 is considered a 1. If you were to tie a voltage source to the cap with a 2.25 static level, you will see a difference in the output wave. Less than half the time to charge the circuit. This should also explain as to why you are not seeing higher voltages levels as you are expecting. Also, most all ChipSets (including back in the day) do utilize internal buffers as protection circuits for both TX/RX signals. Again, helps you see the voltages you are seeing on the O-Scope. It was found early on (1980-ish) that buffers and Schmitt triggers were necessary in order to protect other components, but it was lost (purse') because it was adopted as a standard. Little to no mention was made over the years. Hope this helps! Keep the videos coming!!!
I may not understand everything right away, but I am happy for any help and clarification I get from my audience. I must say, most of what I do originated from you guys in some form. So, thanks for sharing and thanks for watching my videos.
solder paste was a bit sloppy. tape the mask down to keep it a flat as you can . thanks for taking your time to make edit and upload entertainment for us lot :)
Yes, I agree. It was my second attempt. The first one was horrible and I had to reapply the solder paste. And then, I kept the PCB for too long resting on my desk until I prepared all the SMD components. It would be much better if I had everything ready. Live and learn
Awesome great video. The versatility of modern tech is impressive. So far if anybody would make a video on how to make and install 1 gigabyte of memory on Intel 440BX regular 'noname' system board, I will be grateful materially :) good luck and thank you so much
My 386 33MHz had 5MB of Ram, I coud run one of the firtst versions of photoshop. And had a 40MB hard drive, programs took ages to do some task. But they were very versatile, I had 3d studio and a lot of games in it, but there were no space to store programs, the were no cd recorders.
There is another option to level shifter and voltage deviders, Zener diodes, I had a project once where I'd clamp 5V to 3.6V using Zeners for 3.6V on the data lines, it works well and only uses a single diode per data line
Oh Lord! How I love this hacking old hardware channel. Hahahah. Beloved street dog hardware that nobody, except us, still love. Thanks, my friend! Great video!
To not affect the capacitance as much when probing, you can use 10x probes, which are much higher resistance and have lower capacitance required to balance the signal
Edit: The text below was BEFORE I'd watched the whole video... I now note that you're already SEEING the 'rounding' of the square wave with your resistive divider. I wonder if you'll end up using level shifters (very QUICK ones), or maybe just a couple of diode drops per line with a pulldown? The RAS and CAS lines of any DRAM are THE most critical lines and, generally speaking, will have the quickest pulse signals on them. (Let us know if you want to know why that is... DRAM is kinda 'complex'... LOL) Anyway, due to those facts, you should want to place the MINIMUM possible load on them when you probe them, so you SHOULD set your probe and scope to 10x. When you're in 1x mode, your probe + scope acts like a 1 megohm resistor and around 20 pF of capacitance on the circuit being probed. When you're in 10x mode, your probe + scope acts like a 10 megohm resistor and around 3 pF of capacitance on the circuit being probed. The ISSUE in this case isn't the resistance, but the capacitance. The higher the capacitive load, the more that it 'rounds off' the nice sharp edges of the square wave. As mentioned, the RAS and CAS signals are extremely 'time-sensitive', so when you 'round off' the CAS signal, you might be causing it to OVERLAP with the RAS signal thereby causing a memory crash.
Most input pin voltage maximum limits are because of the design of the chip there's a parasitic diode connecting the data pins to Vcc. This diode is also a major player in that 7pf at the pin. If the input voltage is 0.6 volts greater than the Vcc you can get too much current flowing from the data pin to Vcc. A series resistor to the pin should be enough to limit that current to a safe value while allowing the resistor to be small enough to not cause clock skewing (that's why you needed rather low resistors in your voltage divider idea). If we assume that the input pin will clamp at 3.3 volts (it can probably go higher but I'm taking a worse case maximum input voltage) and you have a 5 volt signal, that requires the resistor to drop 1.7 volts. Using ohm's law for a maximum current of around 5 ma, the resistor value should be 300 ohms. I'm only guessing what the maximum safe current is (5-ish ma is a safe bet). 300 ohms should give you a fast enough risetime to charge the 7pf capacitor to give you a proper square wave.
I also found myself with just a few FPM memory modules (most of which are low capacity). I might look into designing a 72-pin PCB which includes the EDO-2-FPM mod
The address lines just have a higher rate of toggling because it is multiplexed so there is no time for the voltage rise too much more than what you measured. But they are driven by the memory controller off a 5v rail.
Maybe if the bus frequency goes from 40 to 33, a different voltage would appear on the address pins. The board has a 40 MHz 386 on it. Thanks for the hint, I'll try to keep that in mind.
I hate it when I run out of components in the middle of a project! That's what usually ends up taking the most time in my projects, waiting for parts. But since I don't have videos to make, and I hate ordering just a small amount of components, I usually end up putting that project aside and working on another so I can order parts for that one too, then it takes me ages to get back to the first project. I had the same issue finding chips that weren't rated for 3.3V when I was looking at making 16MB SIMMs. I vaguely remember finding datasheets for one or two chips that were 5V parts, and I think I also found some that said they had 5V tolerant signal pins. That was years ago, but I'm pretty sure I saved the datasheets somewhere, probably on my old Windows PC where I originally designed those 4MB modules. Obviously those chips were impossible to actually buy from either genuine obsolete parts suppliers, or dodgy Chinese ebay/aliexpress stores. That's the main reason why I never bothered designing the 16MB SIMMs in the first place, I'd have no way of testing them, let alone actually building one.
Very true! You may end up with long delays waiting for new parts to arrive. I'm also working on a different project now since it will take at least two weeks before I can continue with the memory modules. Btw, someone suggested we check out the project SIMMBA-16. There is also a 72-pin version. However, I don't think those PCBs are freely available. Nevertheless, the author mentioned 5V tolerant memory chips. I'll just post them here for completeness: KM44C16100BK, K4E660411C, K4F640411B
An improvement idea: there are AMS1117-equivalent chips in SOT-89 package so you can get rid of that lump. Actually you may be able to squeeze a LM3671-3.3 with a 0805 surface mount inductor in there which is a fixed voltage DC-DC buck converter for lower power consumption. Also you can use resistor packs for the pull-ups/terminations.
@@bitsundbolts I wonder if you are okay with CPLDs and FPGAs? The Intel MAX II CPLDs are 3.3V parts with some 5V-tolerant I/O pins. Maybe you can do level translating using those? You can even terminate the FPM/EDO bus interface in the CPLD and use a SDRAM chip for actual data storage instead.
I will research your suggestion. But I would love to get these modules to work. I have access to many EDO memory chips and could make plenty of those modules with level translation - if I get it to work properly.
Modern ICs have clamp diodes on most pins to Vcc. I think the 3.8V is just Vcc (3,3V) + diode voltage (0.6Vish). This is done to protect your circuit from over voltage. It can be verified by connecting Vcc to ground an apply voltage to the pin. You should see it becoming conductive at about 0.6V. These clamp diodes are made for ultra low currents. So you might have destroyed them on the Cas cs pins already, in case they had any.
About your voltage divider example, there are two (plus one) things you missed. First, your memory module, or whatever circuit you have, not only has a capacitor but also a resistance that also consumes current and affects the output voltage of the voltage divider. To be more correct, your circuit has an input or output impedance (combination of a resistance and capacitor or resistance and inductance). That value is usually in the datasheet. The second thing is related to the first and that is that you forgot to account for the current needed to drive your memory. As an example, if the memory requires 10mA of minimum input current, you can not have less current driving the voltage divider than the sum of those 10mA with whatever current the voltage divider itself consumes. Last but not least, a small electronics tip (using a large amount of text :P ). Voltage always only sets a field (road/path) for the electrons to flow through but it is the current (the count of electrons flowing) that drives the (any) circuit. This is the reason why the wave form stopped being so nice and square when you reduced the current. You did not had enough current to drive the circuit fast enough for your target frequency. This is one of the reasons modern memory modules use lower voltages. With lower voltages you need less current to drive the circuit and at the same time allows to increase the frequency. Example: a short and thin water glass needs less water flow to completely fill it so you can increase the frequency at which you fill it. If you care to know a little more about the details, the wikipedia page about capacitors has the information, but in a nutshell: You probably know by now that capacitors do not conduct current (they are insulators) and they "store" voltage. Well, that storage happens because capacitors have their insulating material polarized. The greater the voltage, the more atoms of the insulating material are polarized (the storage amount is bigger) . But to polarize the material you need charge (electrons) near one of its terminals. This charge is usually calculated using voltages and the time constant of the circuit. So, the bigger the current, the bigger the charge on the terminal of the capacitor, the faster it will be polarized, which implies that it will reach its target voltage faster, allowing the frequency to be increased and give you a nice looking square wave :)
I would say that the total bus load on the parallel control and address signals lowers the effective voltage, while the data lines are connected point to point (or in this 32 bit 8 simm system only shares two loads, while the others are 4 to 8 loads). Also seeing the Vpp to go over 5V means your probe or scope is an inductive load to the line and it produces higher voltages that the system normally would have. If you were to properly setup the scope, to see an edge and its under-overshoots, that would be obvious.
Regarding the solder paste creating bridges, that paste looks far runnier than the paste I've used. You may try refrigerating the paste container before spreading it. It could also be the formulation of that brand.
It might have been the hot temperature in Dubai as well. I didn't immediately put the SMD components on the PCB and brought it to the heater. Might have been my fault.
TTL logic chips operate at 5 volts but there output levels will not reach 5 volts and are valid as low as 2.7 volts. CMOS output chips however will drive much closer to their power supply voltage. This means that CMOS outputs using 3.3 volts are often usable to driver 5 volt TTL logic inputs. Some CMOS chips are tolerant of being driven by a 5 volt signal even with a 3.3v power supply. Additionally some CMOS chips can tolerate being driver from a TTL signal level when operating at 5 volts while other will waste power if driven with TTL signal levels. The translator chips are a great solution that makes it simple to move between signal levels but often a 33 ohm resistor works fine to drive a 3.3v CMOS input from a TTL 5 voltage signal.
Отличная работа, заслуженный лайк👍 Я там прочитал, что ты планируешь заказывать платы с золочением. А не рассматривал ли ты вариант нанесения позолоты самостоятельно? Это должно быть выгодней чем нанесение позолоты на заводе. В продаже есть растворы для нанесения позолоты как в виде только растворов так и в виде маркера для нанесения позолоты. Это все будет достаточно дорого если покупать готовое, но можно сделать самостоятельно раствор для золочения из золотого лома. В качестве карандаша для золочения можно использовать промытый от остатков краски маркер в который вставлен графитовый электрод из простого карандаша. Расвор для золочения просто заливается в такой маркер. Приготовить раствор для золочения можно из золотого лома растворив его в царской водке (смесь азотной и соляной кислот 1:3) при кипячении делается перенасыщенный раствор, получается хлорауратная кислота. Второй электрод можно так же сделать из простого карандаша который будет минусовым электродом, а маркер с раствором плюсовым электродом. Наносить позолоту гальваническим методом от источника постоянного тока напряжением 3÷5v. Такое нанесение покрытия должно быть достаточно выгодным по деньгам, золотой лом можно вобще найти бесплатно в старых и нерабочих компонентах. Кислоты тоже не проблемма, азотная получается из смеси электролита с селитрой амиачной/калиевой а соляная из электролита и поваренной соли. Химическая чистота кислот решающего значения не имеет так как для гальваники от них достаточно растворить золото и нанести его на контакты печатной платы. Может быть есть еще методы получения растворов для золочения народ обязательно подскажет, я слышал что есть щелочные растворы, но как их получать пока не в курсе.
Replace “reliably” with “usually” and this statement becomes true, insofar as 3.3V logic doesn’t always reach 3.3V for a logic “high”, just like 5V doesn’t always reach 5V. Look at the voltage level specifications for the different logic families and you’ll see the problem. In other words, best-case 3.3V logic signals will work fine with 5V devices, but worst-case 3.3V logic signals will not. It’s better with 5V CMOS.
Thank you for the new video. Root-cause Analysis is a very good topic to present on, in my opinion. I like how it makes us have to think. Well, me at least. Gotta get that cranium in gear, and use it! I noticed that the title bar of the circuit emulation software was cut off. Can you tell us which program that is? Is it open-source, or reasonably cheap? Thanks!
A somewhat rude and simple way to interface 3v3 and 5V domains is just with resistors in series with the line. I have seen anything from 100 Ohms to several kOhm. The way it works is... where does the voltage tolerance of IC IO circuits come from? Generally there's fast diodes to VCC and ground on every IO pin that act as lightning rods for static electricity, ESD diodes, and once you exceed the VCC on the IO line by the diode threshold, the diode will conduct all the current that you can provide, but since it's made for low-energy burst loads only and not for sustained current, it's going to burn out short, leaving you with a no longer working IO pin which is always tied to VCC. But if you just add series resistors, this can prevent these diodes from taking too much immediate and permanent damage. I think voltage dividers shouldn't be used but given you figured out proper level shifting, well that's good.
@@VladoTThis. I've used resistive voltage dividers for all sorts of horrible things over the years, but things start going wrong when using one on a signal line. Save yourself the trouble and just get a €0.20 level shifter.
Yes but if you read between the lines of the Micron RAM datasheet, it's implied that there are no traditional ESD diodes to Vcc, only to ground. 4.6 volts max pin voltage when run at 3.3V? That's beyond 0.3V for a Schottky diode or 0.7V for a silicon diode. So the chip probably doesn't clamp the voltage and putting 5 volts on the pin will not cause a bunch of current draw (which you want if you're using the series resistor). Instead any failures will be via electromigration or whatever, not thermal failure as is the usual risk when putting a lot of current through the ESD diode. Another issue you can have with using a diode to Vcc to limit the current is that you can raise up your 3.3 volt rail closer to 5 volts. I had a system once with this problem. We used the wrong kind of buffers to interface our 3V system to 5V logic. We should have used 74LVCxxxA series buffers but instead we used something else which had the ESD diode to Vcc on each pin. When the host system put a logic 1 on all the pins, the 3.3 volt supply would go up to 4.5 volts. If you're intending to put a lot of current through the ESD diodes to a lower Vcc, you need to use all of the current coming in through the diodes, or else Vcc will raise up towards the I/O pin voltage. Easy solution is to just put a big (i.e. low resistance) resistor between 3V and ground, sized to waste the worst-case current coming in from the diodes minus whatever your 3V logic's minimum operating current is. That wastes a ton of power, so maybe you can try a shunt regulator strategy. You put some kind of zener diode or thyristor or something that turns on a clamp once the voltage exceeds 3.4 volts or so.
I agree with this, if the chip has a diode then it will clamp to 3.3v plus about half a volt. If it doesn't then diodes are easy to add. Just to give you some faith you can connect a micro controller pin direct to mains via a resistor and rely on the internal clamping diodes I've seen cost optimized circuit do exactly this for zero crossing detection.
logic voltage levels are never exact 0 or suply voltage , many chips have wide strike zone so chipset even at 5v logic level would probably accept high levels anywhere from 2-2,7v to 5 v and low levels close to 1 v so in theory we could be dumb and brute force level change by installing 2-3 fast switching diodes one direction and single the other way of course that could not work in very high frequencies due to impedance and practically no load on the logic sides with no termination resistors you could reference as a signal on voltage drop
There were many versions how to design a memory module for the chips and to comply with the datasheet. Then someone suggested to keep the BOM as simple as possible and reduce the number of different components if possible. I guess those are all best practices. But I did come across the idea of using diodes.
Ah, then I have to design a 72-pin module :D I am not sure if I will do that. Those 30-pin SIMMs are already quite difficult to design - especially with all those extra components. But never say never :)
Theoretically the 486 can address 4GB of RAM, But I doubt any chipset ever supported that. You could however design a motherboard using something like the V380SDC that supports 2GB of PC133 SDRAM!
Well, the voltage divider might be the main problem. Depending on how much current the chip consumes, the output voltage WILL drop. Easiest solution for a stable voltage is a well configured zener-diode/resistor combo. There if there is no power need, all the current will go through the zener diode. The more current the chip draws, the less current goes through the zener diode. Output voltage will only begin to drop if the chip draws more current than what was designed to be the basic current through the zener diode. Result: Stable voltage, and a constant power consumption. Not a solution you would choose for an energy-efficient device, but then again a 386 is not very energy-efficient, is it? 😉
i can only think of one addition that could be made to these and that is a way to set the memory size/ranks because some motherboards from this memory era had limits on the size of the stick or how many ranks you could install in each slot for instance i had a mother board in the late 80's/early 90's that had 2 banks of memory using the same SIMM package but one bank could use single rank SIMM's and one bank could use dual-rank SIMM's and if you put a dual-rank in the first bank it caused an error -it even had a note in the manual about it sorry i can remember the board i was only 10 and the board was new in 1989-90 but it stuck with me all these years
Not sure how applicable this would be to RAM chips of any kind, but I know for some 3.3v chips like NOR-Flash you can get away with running them at 5v (at least in read mode for flash). It's definitely still out of spec, but sometimes I think the specs are just set by how far they've been tested. Many modern parts simply aren't designed/tested with 5v logic in mind.
I've heard people say that most of these 8MB 3.3 volt chips are 5v tolerant, but it's not mentioned in the datasheet - in which most manufacturers state an absolute maximum rating of 4.6 volts. I don't know if those chips will work well for a long time at 5 volts, that is why I try to find a different solution (and to learn something of course).
It would be fun to try and actually use all of the ram. I can export AutoCAD drawings to R12 (dos) and 14 (win95) formats, but I no longer have "trial versions" of these versions of the program. I should be able to generate a huge DWG file probably that you can try to open / work with..
@@bitsundbolts UA-cam keeps deleting my reply. You can find AutoCAD R14 on that place on the internet that archives things. I'm happy to supply some drawings of vaious sizes for you to try, so we can point and laugh at the screen..
Man's really goin' down memory lane!
@@AnnaVannieuwenhuyse as father I appreciate Dad jokes
@@danielktdoranie thanks, dad 🙈
@@AnnaVannieuwenhuyse you can call me “Daddy” 😂
@@AnnaVannieuwenhuyseхорошо вам, можете иметь несколько отцов, это у нас за желание иметь несколько пап можно отправиться в тюрьму, путинский режим ничего не поделаешь🤷😃
@@mask-u5v sorry mate, I can't read cyrillic
I think more UA-camrs should show their failures. It's part of experimenting and people need to understand that it's ok to fail. Learn from your mistakes.
You should've used a x10 divider on the probe. This is absolutely necessary to reduce the interaction of high frequency signals with the oscilloscope input.
Thanks! I will do that next time. I had quite the crash course learning so much stuff in the past weeks, but I am happy to learn new things!
Yes, and please set your scope to use more than 1 vertical division of range. Offset the trace downwards if necessary. The resolution for voltage measurements will be much better.
Rather than free-running the trigger, it would also help to set the trigger level to, say, 1 V so you can see the waveforms properly. You could also move the trigger level up and down to see if different signal levels are apparent when DQx is is being driven by the RAM chip vs. the board.
Finally, the measurement would be much cleaner and more reliable with a nearby connection to ground -- ideally a probe tip grounding spring if there's a nearby GND you can poke as you probe.
This has been a great series!
I love that you and others are making new RAM modules for retro computers. Back in the early 90s having 64MB RAM on my 386 was only a dream as it was so expensive but now RAM is much less expensive
I thought I was King Shit for having 24MB in my 486SX. 🤣
@@throwaway6478 you were and you still are bro 😂
I hope that the new modules (PCB rev 3.x) will work flawlessly and I can get a 386 to 128MB! Haha, that would be cool! This amount of memory is most probably useless to a 386, but it is still a nice project - and I am learning so much from it! Thinking about a 386 multiple times the memory of Socket 7 and maybe even Slot 1 machines is ridiculous :D
@@bitsundbolts the data sheet says it's possible, so at least someone had to have thought of doing this!
@@bitsundboltsа что если более емкую и низковольтную память запустить через преобразователи уровня все управляющие сигналы, шину адреса, шину данных.
Открываются тогда вобще заоблачные объемы доступной физической памяти🤔
Really great work. Having 16MB SIMMs will be a huge benefit for the retro community! Thank you!
I think so too! Thanks for watching!
Electronic engineer here, explanation for the 3.8v address line max would be due to driver voltage drop within the chipset driving those lines, with older 5v CMOS specs it was common to see a "Vhi in" spec of 3.5v to 5v and a "Vhi out" spec as low as 3.6v.
With that in mind the added capacitance to the RAS/OE lines would delay that already low drive signal outside of the timing spec as you have seen, this _could_ be adjusted for in the bios to alter the timing slightly.
Very cool project and has inspired me to dig out some of my old treasures to get living again, namely the Amstrad 8086 i have in storage.
Thankyou
why would the RAS/CAS lines always have problems of capacitance ? is that because every single chip in all memory chips in that same line ?
@@monad_tcp typically what happens is the extra capacitance on these lines will cause the rise/fall time to be delayed out of spec. There is a setup and hold time requirement between address lines changing to when the RAS/CAS lines are required to lock those values into the memory chips, should this be delayed at the chip end the address lines may change again before the memory has a chance to latch them resulting in address corruption.
this delay is a result of the signal drivers output impedance and the stray capacitance of everything attached to these lines and it seems in this case the RAS/CAS drivers are quite high impedance comparatively to other lines and as such are more susceptible to error.
Grey-bearded electronics dude here. This was cringe to watch. I know, the dude is still learning and all that, but still. So many mistakes were made. But I am rooting for him. A like was given.
Brilliant work!!! Glad I could help! Regards the probe affecting the memory test when probing CAS - if you get a scope probe that supports x 10 impedence (or greater), and if you can set the scope into the same mode too, you should be able to scope the CAS and it shouldn't crash! This is one of your best videos btw!!!! Just signed up to support you for what I can on Patreon, it's not a lot but I do love every video you put out!
Thanks for the hint! I will try the 10X setting next time. Now I finally know why this feature is there on the probe! Thanks for all your input - I really appreciate it!
@@bitsundbolts ummm yeah ALWAYS use 10X otherwise it messes up the signal. Remember to multiply the signal height by 10 on the scope to get back the original reading. Also you can get a reading on a very sensitive pin by putting the signal into pin 1 of a 74LS04 which will output on pin 2 but inverted. So tie pin 2 to pin 3 and measure the correctly re-inverted signal on pin 4. To use the logic chip, pin 7 must be tied to ground and pin 14 to 5V. This can be used on very sensitive crystals that refuse to measure even on 10X.
Yeah, without using 10x setting, you're basically directly attaching your probe's meter or two of coax cable to whatever you're probing. Works okay for audio frequency signals but it will create undesirable ringing and reflections when used with fast digital signals
Great that you have tried my solder paste soldering suggestion. Also, never give up on projects and try as many times as you can. I for example tried to resurect a Seagate hardcard and after a week of soldering, hdd heads unsticking and sstor low level formatting was able to bring it back from the dead.
I learn so much from my audience! I won't be able to try every suggestion, but solder paste and stencil was definitely a great one! I absolutely love this technique. Once I get PCB 3.x verified, I am going to get gold plated PCBs and start making some memory kits! Thanks for your help, suggestions, comments, and your time!
Absolutely enjoyed the video more than your other “successful” ones. I learn way more from other people’s struggles than just their successes. So thank you for sharing your journey and also sharing your lack of knowledge. It is greatly appreciated.
Thanks for this feedback! Each time I post something, I learn something new from my audience! It is such a good community and I love the ideas and suggestions pouring in. That is why I am not afraid of posting failures.
A 386 can technically address 4GB of RAM. It can't be done due to chipsets and memory sockets, but it would be hilarious to see one POST and see how long it takes for _that_ memory count.
Hah, yes, that would be funny. I guess that would be a perfect topic for a "short" form video. I can measure how long it takes to get to 1MB (usually counts slower), and the rest. Then just extrapolate to 4 GB.
@@bitsundbolts
🤣
@@bitsundbolts Real-time live stream it, I'd watch that
I'd also like to see a Pentium II with 64 gigabytes of RAM. It's equally possible.
@@eDoc2020does p2 do pae?
i love 24 bit wide memory address busses so much for some reason, 16 MB just seems like such a beautiful memory quantity, i would love any 16 MB content!!
If your oscilloscope probes have a 1x/10x switch, use it! The 10x mode presents less capacitance to the DUT.
Thank you! I learned something new!
@@bitsundboltsI concur with OP! There is almost never any reason to use the X1 setting, to the point that the probes included with high-end oscilloscopes (like the LeCroy and the Rohde&Schwarz that I have at work) don’t even have the switch - they’re always X10.
Some people actually superglue the X1/X10 switch to X10 position (or put heat shrink tubing on it to prevent it from sliding), or pull off the switch cap entirely, to prevent accidentally switching to X1.
Love that you're sharing your files on PCB Way!
I hope it will help people create their own. But I will also try to prebuilt modules and sell those. This way anyone can get access to high capacity 30-pin SIMMs. It just takes a bit of time! I am happy to work for a nice retro community!
To avoid the crashing and for high frequency measurements you need to put your probe in x10 attenuation. Since your signals will never be negative, you can increase the resolution of your measurement by shifting your trace position downwards and reducing the V/div setting to 2v/div or 1V/div
Yes, I noticed that 5v was too high. Next time I'll try to make sure I pay more attention
Even thought you had a failure you did learn a lot from it. So in the end it wasn't really a failure it was a partial success! I still really enjoyed watching this and I'm excited to see how the final module turns out one day.
Thanks!
Those memory controllers had built in safeguards for parity on chip. Was wild back in the day that a server would have memory errors and if you just switched the SIMM that you thought was bad to the back and moved SIMMs up, it would work and the SIMM you thought was bad was now working again. Seeing as the SIMMs were always in parallel, if the first was out of spec but the rest were in spec, it would fail. If the first was in spec and the others were out of spec it would boot. Seems like the memory controller always trusted the first SIMM implicitly.
A passive resistor network works when it’s the only component in the chain. With more components, read more memory modules attached there is also current flowing to them. Better to use an active semiconductor circuit.
You've asked what we think about your project ☺
I personally love your videos and take it as a very trilling series for geeks. Hope you'll continue. Thank you a lot!
Glad to hear that! Thank you!
This is the trial and error we all want to see , keep going!
Thanks! Yes, and I hope I'm a big step closer to a working module safe to work on 5v systems! Thanks for watching
Great to see the working out that you did. Keep going , you will get there I'm sure
Very cool that you are sharing the whole process mistakes and all. ❤
When scoping memory, set your probe and scope to 10x attenuation, gives you a higher impedance which greatly reduces circuit loading.
Thanks for showing the stuff that didn't work as well. You usually don't get to see that part on UA-cam
Glad that many people seem to agree with you! I am happy to share any project I am working on if it makes sense - success or failure. Thanks for watching my videos!
I was thinking of the level shifters during the first video but I figured other people would bring it up. Nice to see the updates!
This is so good... All the details of what you tried and how it went..... The next video should be awesome. Going over all the things you fixed to get from 2.0 to the latest version. Can't wait.
Haha, learning by doing. I'm happy to hear that so many of my audience like this type of content - even if a project is unsuccessful. Well, we all hope that the project will end in success. I'm still waiting for the SMD components to arrive, but I am also looking forward to the next video!
It's awesome what you have done! Congratulations!
22:06 what ? the project was successful, you learned a ton of things
Incredible work! I would never have guessed about the 5 V signal lines but I guess it makes sense given the age.
Thank you
It's important to show not only wins but fails to. Great work!
Thanks! And I agree :)
I am so happy that you went to the extra effort to use level translators in the new design! You are making something really awesome here!!!
Thank you! Let's hope it will end up good.
I've been learning about level shifting and experimenting with it while doing a recent project, too, so this video was really good timing. Like you, I also quickly discovered that a voltage divider was not the correct solution to lower the voltage of unidirectional signal lines, but the solution I ended up finding was to use a 4000-series CMOS logic gate and power it with the output signal voltage I wanted, and it seems to have done the trick for me. (That being said, the signals I'm working with are a few orders of magnitude slower than yours; at 33MHz, I don't think it could keep up)
Great video, by the way! Every part of this little memory series has been both entertaining and informative, and I'm looking forward to whatever's next
Thank you! I'm also learning and discovering new things along the way. The main problem is really the high frequency - even though signals are not necessarily arriving at 33MHz. There are wait states and delays everywhere. So, it is not that the logic circuit needs to switch that frequently. I believe the true frequency is somewhere between 3-5 MHz. Good that you found a solution to your problem! Thanks for watching!
This is why I am careful with ppl telling me they want to 'make some memories together'
I want to do this, but we always end up in a theater or watching a sunset...
I love your stuff, for any voltage dividers at high-frequencies, you need to consider a 'feed-forward' capacitor(a capacitor from 5v_IN to 3v_OUT), this is the concept used by high-speed DCDC converters to stay on-top of transient conditions pulling the rail down so they can respond suddenly without RC delay, also used by instrumentation, the variable capacitor in oscilloscope probes is to set the ratio of cap divider to tune it's edge for square-wave response. For your PCBs you should ask for hard-gold fingers for edge connections/board, instead of HASL.
Very cool experience. Learning on the fly: thanks for sharing
if your probing things like that you should have atleast x10 or better still x100 or x1000 probe. great work with the theory and im sure the end product will work.
Great vid, thanks for sharing your journey! One thing to think about - you could have probably kept the voltage dividers should you have used so-called "advancing network" or "sharpening network". Basically it is just a capacitor connected in parallel with the top resistance in the dividing network, which allows high frequencies to bypass the resistor and thus eliminates the low pass filter effect. IMO something like 47pF would work just fine.
I have to read more about this. Interesting and thanks for sharing.
Absolutely loved the video very informative. It’s also really cool because it shows that everybody makes mistakes when you’re learning something new. I have a theory as to why those ram sticks worked in the first three slots, as the ram sticks get further away from the cpu and chipset the signal integrity breakdowns further as the trace length increases not to mention additional stress the more sticks are added to the controller or maybe it has to do with the memory topology design of the board all just theories and things I’ve seen on newer boards.
Good point. It could be what you're suggesting. And the module seems to work for "light" load. I can extract a full Windows 3.1 and DOS copy into a 30MB RAM drive - and then boot into it. A heavy load like memtest causes the memory to fail. I hope the SMD components arrive soon so I can finish the other four modules and test PCB 3.x - hopefully everything works out!
@@bitsundbolts I’m excited to see what happens
Pretty cool. I have been looking for black PCB 72 pin FPM/EDO sticks for a couple Amiga motherboards, but everything is green PCB. I look forward to the conclusion to this video with your final design.
That was awesome. Baking the memory was also super cool.
Yes, that was quite nice and worked much better than I expected 😀
If you use a unidirectional level shifter for the address and control signals you can use one with push/pull outputs so you don't need the resistors
as for the data bus there maybe level shifters that have direction en multiple enable pins so that way its possible to also have push/pull outputs eliminating any resistors on the back making it easier to assemble
Good point. I was looking for something, but so far, I didn't find a fast enough level shifter. You're right, at the moment I need pull-up resistors for any line that "sends" data away from the level shifter to get a strong signal.
That was a wonderful piece of information. Thanks for this informative content!
I'm so amazed with your work!
Thank you!
The Address lines drive up to 64(72) IC when using 8 8/9 Chip Memory Modules. So they are more powerful than the data bits as this are only shared between two chips (each bank one).
Oh right, I do have 30-pin SIMM modules with 9 memory chips on them. Crazy to think of having each chip with a single data line (1-bit chip). So, each bank would drive 36 memory chips - that sounds insane :) And as you said, 72 chips if both banks are populated.
Cool stuff ! Aside, you likely already know, but for others, active oscilloscope probes are getting quite reasonable these days (even some open source versions), and provide a much lower capacatance load, so can be used for more sensitive measurements, which I find are quite useful when doing this type of investigative testing.
You should pick up some grounding spring clips for your scope probes. Trying to probe memory with that huge antenna ground lead is going to destroy the fidelity of your reading.
that black pcb is so sick
You should also see about designing an 8MB SIMM module.
You are going to have to add the necessary components to convert the voltages, first, though.
If you want to go into non-salvage chips, you can likely find new old stock in either electronic surplus or industrial electronics supply catalogues, but of course, also learning to do successful salvage is important.
wow I didn't expect the paste to work so well. That looked like it was going to bridge just about everything. I'm surprised you only had a couple.
Yes, it works quite well. The paste is a mix of very small solder balls and flux - and it works really well! This was my first attempt. I am sure if I make a couple of those, the results will be even better.
@@bitsundbolts I'm wondering if a dryer paste would be less likely to blur like that and reduce bridges. I watch a channel where he's complained multiple times about runny paste. He does professional data recovery. He can do head swaps, but most of his videos these days are like flash drives and memory cards and the ocasional NVME. And it requires a lot of soldering. He uses stencils for the NAND chips.
Thanks for the video. I've been wanting to make a socket 7 to socket 4 adapter for a long time. To install k6-2+ on a 1993 motherboard. It needs level shifters like these because early Pentiums are 5-volt level signal.
if i may be so direct: awesome work buddy! thx for the insites
My pleasure! Thanks for watching
Most signals on the system bus often have a series resistor to prevent resonances from sharp transient edges. If there's more things connected to one line than another, there'll be more current through that resistor, and the voltage may drop a little. This effect is even seen in boards without that resistor, since the wires themselves will have a little resistance too, but a little less than if your board does have proper "termination".
Traditionally most PCs work with TTL LS-type logic, which traditionally had reasonably high resistance for high level, and low resistance for low level. The acceptable voltage-range for a high level with those chips went all the way from 5V down towards 2V, since the high-level was a lot more susceptible to reading a bit lower due to the higher resistance. CMOS, however, does not have that bad of a problem, since both high and low are low resistance. As long as a line is above 3V or below 2V, it should not be a problem.
You are amazing, my guy!
Thanks 👍
Totally rad
Address lines are likely showing a lower voltage on the oscilloscope due to fan out. Or at least this makes the most sense to me. The address bus goes to more devices than the data bus on average. It would track then on lower cost or older designs you will see a higher than average drop in voltage on the address bus due to extra current draw for things like address decoding. The data bus however is likely behind a buffer heading to the RAM and therefore would be closer to VCC. That being said someone may correct me but this is what makes the most sense to me.
Fascinating!
Hey! First and foremost, thank you for the content! I enjoy watching all of your videos!
Now...
Dont know if you want the information or not, but I thought I would step in and leave you a comment about your approximation model you built utilizing the Falstad Circuit Simulator.
The cap never fully discharges... via TTL, any standing voltage which is less than 2.15~2.35 is considered a 0, and anything above 2.75~2.95 is considered a 1.
If you were to tie a voltage source to the cap with a 2.25 static level, you will see a difference in the output wave. Less than half the time to charge the circuit. This should also explain as to why you are not seeing higher voltages levels as you are expecting.
Also, most all ChipSets (including back in the day) do utilize internal buffers as protection circuits for both TX/RX signals. Again, helps you see the voltages you are seeing on the O-Scope.
It was found early on (1980-ish) that buffers and Schmitt triggers were necessary in order to protect other components, but it was lost (purse') because it was adopted as a standard. Little to no mention was made over the years.
Hope this helps!
Keep the videos coming!!!
I may not understand everything right away, but I am happy for any help and clarification I get from my audience. I must say, most of what I do originated from you guys in some form. So, thanks for sharing and thanks for watching my videos.
solder paste was a bit sloppy.
tape the mask down to keep it a flat as you can .
thanks for taking your time to make edit and upload entertainment for us lot :)
Yes, I agree. It was my second attempt. The first one was horrible and I had to reapply the solder paste. And then, I kept the PCB for too long resting on my desk until I prepared all the SMD components. It would be much better if I had everything ready. Live and learn
Amazing work!
Thank you!
Awesome great video. The versatility of modern tech is impressive. So far if anybody would make a video on how to make and install 1 gigabyte of memory on Intel 440BX regular 'noname' system board, I will be grateful materially :) good luck and thank you so much
Good job sir!
Thanks!
My 386 33MHz had 5MB of Ram, I coud run one of the firtst versions of photoshop. And had a 40MB hard drive, programs took ages to do some task. But they were very versatile, I had 3d studio and a lot of games in it, but there were no space to store programs, the were no cd recorders.
great work. Thanks for sharing.
Excellent explanation !
There is another option to level shifter and voltage deviders, Zener diodes, I had a project once where I'd clamp 5V to 3.6V using Zeners for 3.6V on the data lines, it works well and only uses a single diode per data line
It was hard for me to look at not properly connected voltmeter in CircuitJS (14:00)😄
Red dot means wires are actually overlapping, not connecting.
Ah, I guess I missed that one. Thanks for pointing that out!
I was so proud i Got 12 Megabyts back then. 64 MB? Insane. Win 3.11 or os/2 would have had a great party on 64 😊
Oh Lord! How I love this hacking old hardware channel. Hahahah. Beloved street dog hardware that nobody, except us, still love. Thanks, my friend! Great video!
Hehe, thank you!
To not affect the capacitance as much when probing, you can use 10x probes, which are much higher resistance and have lower capacitance required to balance the signal
Edit:
The text below was BEFORE I'd watched the whole video... I now note that you're already SEEING the 'rounding' of the square wave with your resistive divider.
I wonder if you'll end up using level shifters (very QUICK ones), or maybe just a couple of diode drops per line with a pulldown?
The RAS and CAS lines of any DRAM are THE most critical lines and, generally speaking, will have the quickest pulse signals on them. (Let us know if you want to know why that is... DRAM is kinda 'complex'... LOL)
Anyway, due to those facts, you should want to place the MINIMUM possible load on them when you probe them, so you SHOULD set your probe and scope to 10x.
When you're in 1x mode, your probe + scope acts like a 1 megohm resistor and around 20 pF of capacitance on the circuit being probed.
When you're in 10x mode, your probe + scope acts like a 10 megohm resistor and around 3 pF of capacitance on the circuit being probed.
The ISSUE in this case isn't the resistance, but the capacitance. The higher the capacitive load, the more that it 'rounds off' the nice sharp edges of the square wave.
As mentioned, the RAS and CAS signals are extremely 'time-sensitive', so when you 'round off' the CAS signal, you might be causing it to OVERLAP with the RAS signal thereby causing a memory crash.
Most input pin voltage maximum limits are because of the design of the chip there's a parasitic diode connecting the data pins to Vcc. This diode is also a major player in that 7pf at the pin. If the input voltage is 0.6 volts greater than the Vcc you can get too much current flowing from the data pin to Vcc. A series resistor to the pin should be enough to limit that current to a safe value while allowing the resistor to be small enough to not cause clock skewing (that's why you needed rather low resistors in your voltage divider idea). If we assume that the input pin will clamp at 3.3 volts (it can probably go higher but I'm taking a worse case maximum input voltage) and you have a 5 volt signal, that requires the resistor to drop 1.7 volts. Using ohm's law for a maximum current of around 5 ma, the resistor value should be 300 ohms. I'm only guessing what the maximum safe current is (5-ish ma is a safe bet). 300 ohms should give you a fast enough risetime to charge the 7pf capacitor to give you a proper square wave.
Thanks for that info. I'll spend some time to have a look at this.
This is awesome. It would enable me to put 64MB onto my 486 board. 72 pin FPM seems to be impossible to find near me at a reasonable price.
I also found myself with just a few FPM memory modules (most of which are low capacity). I might look into designing a 72-pin PCB which includes the EDO-2-FPM mod
@@bitsundbolts This would also work well. That or I live with 16mb on my 486😆
The address lines just have a higher rate of toggling because it is multiplexed so there is no time for the voltage rise too much more than what you measured. But they are driven by the memory controller off a 5v rail.
Maybe if the bus frequency goes from 40 to 33, a different voltage would appear on the address pins. The board has a 40 MHz 386 on it. Thanks for the hint, I'll try to keep that in mind.
I hate it when I run out of components in the middle of a project! That's what usually ends up taking the most time in my projects, waiting for parts. But since I don't have videos to make, and I hate ordering just a small amount of components, I usually end up putting that project aside and working on another so I can order parts for that one too, then it takes me ages to get back to the first project.
I had the same issue finding chips that weren't rated for 3.3V when I was looking at making 16MB SIMMs. I vaguely remember finding datasheets for one or two chips that were 5V parts, and I think I also found some that said they had 5V tolerant signal pins. That was years ago, but I'm pretty sure I saved the datasheets somewhere, probably on my old Windows PC where I originally designed those 4MB modules.
Obviously those chips were impossible to actually buy from either genuine obsolete parts suppliers, or dodgy Chinese ebay/aliexpress stores. That's the main reason why I never bothered designing the 16MB SIMMs in the first place, I'd have no way of testing them, let alone actually building one.
Very true! You may end up with long delays waiting for new parts to arrive. I'm also working on a different project now since it will take at least two weeks before I can continue with the memory modules. Btw, someone suggested we check out the project SIMMBA-16. There is also a 72-pin version. However, I don't think those PCBs are freely available. Nevertheless, the author mentioned 5V tolerant memory chips. I'll just post them here for completeness: KM44C16100BK, K4E660411C, K4F640411B
If you measure high frequencies, you must use 10x divider on measure probe! Try this and you will see no error on memtest :)
Thanks, yes, many have pointed this out. I'll keep that in mind for next time
Make more stitching vias, it improves many aspects of high speed signal design, even ESD protection if you put it on edges.
I will rework the copper pour and keep your suggestion in mind. Should be easy to add more vias in most places.
Gotta fail your way to success! 👍
Thanks!
Thank you for your support! I really appreciate it!
An improvement idea: there are AMS1117-equivalent chips in SOT-89 package so you can get rid of that lump. Actually you may be able to squeeze a LM3671-3.3 with a 0805 surface mount inductor in there which is a fixed voltage DC-DC buck converter for lower power consumption. Also you can use resistor packs for the pull-ups/terminations.
Ah, I'm still working on this project. Unfortunately, I wasn't successful yet to get the modules to work.
@@bitsundbolts I wonder if you are okay with CPLDs and FPGAs? The Intel MAX II CPLDs are 3.3V parts with some 5V-tolerant I/O pins. Maybe you can do level translating using those? You can even terminate the FPM/EDO bus interface in the CPLD and use a SDRAM chip for actual data storage instead.
I will research your suggestion. But I would love to get these modules to work. I have access to many EDO memory chips and could make plenty of those modules with level translation - if I get it to work properly.
Modern ICs have clamp diodes on most pins to Vcc. I think the 3.8V is just Vcc (3,3V) + diode voltage (0.6Vish). This is done to protect your circuit from over voltage. It can be verified by connecting Vcc to ground an apply voltage to the pin. You should see it becoming conductive at about 0.6V. These clamp diodes are made for ultra low currents. So you might have destroyed them on the Cas cs pins already, in case they had any.
About your voltage divider example, there are two (plus one) things you missed.
First, your memory module, or whatever circuit you have, not only has a capacitor but also a resistance that also consumes current and affects the output voltage of the voltage divider. To be more correct, your circuit has an input or output impedance (combination of a resistance and capacitor or resistance and inductance). That value is usually in the datasheet.
The second thing is related to the first and that is that you forgot to account for the current needed to drive your memory. As an example, if the memory requires 10mA of minimum input current, you can not have less current driving the voltage divider than the sum of those 10mA with whatever current the voltage divider itself consumes.
Last but not least, a small electronics tip (using a large amount of text :P ). Voltage always only sets a field (road/path) for the electrons to flow through but it is the current (the count of electrons flowing) that drives the (any) circuit. This is the reason why the wave form stopped being so nice and square when you reduced the current. You did not had enough current to drive the circuit fast enough for your target frequency. This is one of the reasons modern memory modules use lower voltages. With lower voltages you need less current to drive the circuit and at the same time allows to increase the frequency. Example: a short and thin water glass needs less water flow to completely fill it so you can increase the frequency at which you fill it.
If you care to know a little more about the details, the wikipedia page about capacitors has the information, but in a nutshell: You probably know by now that capacitors do not conduct current (they are insulators) and they "store" voltage. Well, that storage happens because capacitors have their insulating material polarized. The greater the voltage, the more atoms of the insulating material are polarized (the storage amount is bigger) . But to polarize the material you need charge (electrons) near one of its terminals. This charge is usually calculated using voltages and the time constant of the circuit. So, the bigger the current, the bigger the charge on the terminal of the capacitor, the faster it will be polarized, which implies that it will reach its target voltage faster, allowing the frequency to be increased and give you a nice looking square wave :)
I would say that the total bus load on the parallel control and address signals lowers the effective voltage, while the data lines are connected point to point (or in this 32 bit 8 simm system only shares two loads, while the others are 4 to 8 loads). Also seeing the Vpp to go over 5V means your probe or scope is an inductive load to the line and it produces higher voltages that the system normally would have. If you were to properly setup the scope, to see an edge and its under-overshoots, that would be obvious.
Regarding the solder paste creating bridges, that paste looks far runnier than the paste I've used. You may try refrigerating the paste container before spreading it. It could also be the formulation of that brand.
It might have been the hot temperature in Dubai as well. I didn't immediately put the SMD components on the PCB and brought it to the heater. Might have been my fault.
TTL logic chips operate at 5 volts but there output levels will not reach 5 volts and are valid as low as 2.7 volts. CMOS output chips however will drive much closer to their power supply voltage. This means that CMOS outputs using 3.3 volts are often usable to driver 5 volt TTL logic inputs. Some CMOS chips are tolerant of being driven by a 5 volt signal even with a 3.3v power supply. Additionally some CMOS chips can tolerate being driver from a TTL signal level when operating at 5 volts while other will waste power if driven with TTL signal levels. The translator chips are a great solution that makes it simple to move between signal levels but often a 33 ohm resistor works fine to drive a 3.3v CMOS input from a TTL 5 voltage signal.
Отличная работа, заслуженный лайк👍
Я там прочитал, что ты планируешь заказывать платы с золочением. А не рассматривал ли ты вариант нанесения позолоты самостоятельно? Это должно быть выгодней чем нанесение позолоты на заводе. В продаже есть растворы для нанесения позолоты как в виде только растворов так и в виде маркера для нанесения позолоты. Это все будет достаточно дорого если покупать готовое, но можно сделать самостоятельно раствор для золочения из золотого лома. В качестве карандаша для золочения можно использовать промытый от остатков краски маркер в который вставлен графитовый электрод из простого карандаша. Расвор для золочения просто заливается в такой маркер. Приготовить раствор для золочения можно из золотого лома растворив его в царской водке (смесь азотной и соляной кислот 1:3) при кипячении делается перенасыщенный раствор, получается хлорауратная кислота.
Второй электрод можно так же сделать из простого карандаша который будет минусовым электродом, а маркер с раствором плюсовым электродом. Наносить позолоту гальваническим методом от источника постоянного тока напряжением 3÷5v.
Такое нанесение покрытия должно быть достаточно выгодным по деньгам, золотой лом можно вобще найти бесплатно в старых и нерабочих компонентах. Кислоты тоже не проблемма, азотная получается из смеси электролита с селитрой амиачной/калиевой а соляная из электролита и поваренной соли. Химическая чистота кислот решающего значения не имеет так как для гальваники от них достаточно растворить золото и нанести его на контакты печатной платы.
Может быть есть еще методы получения растворов для золочения народ обязательно подскажет, я слышал что есть щелочные растворы, но как их получать пока не в курсе.
Pcbway yay! Chinese pcb for everyone pcbway yayy
"5v" TTL logic still switches reliably at 3.3v so those module manufacturers didn't need any major overhaul to support 5v and 3.3v platforms.
Replace “reliably” with “usually” and this statement becomes true, insofar as 3.3V logic doesn’t always reach 3.3V for a logic “high”, just like 5V doesn’t always reach 5V. Look at the voltage level specifications for the different logic families and you’ll see the problem. In other words, best-case 3.3V logic signals will work fine with 5V devices, but worst-case 3.3V logic signals will not.
It’s better with 5V CMOS.
Try using a little less solder paste. Apply it more sparingly. Ideally, it should stay on the pads and not bridge them when you remove the stencil.
I think I also had the PCB sitting there for a while before I added the SMDs. But you're correct, I need to practice a bit more ☺️
Thank you for the new video. Root-cause Analysis is a very good topic to present on, in my opinion. I like how it makes us have to think. Well, me at least. Gotta get that cranium in gear, and use it!
I noticed that the title bar of the circuit emulation software was cut off. Can you tell us which program that is? Is it open-source, or reasonably cheap? Thanks!
Sorry, I should have mentioned the tool. I'll add it later in the description. But you can search for "Falstad circuit simulator"
A somewhat rude and simple way to interface 3v3 and 5V domains is just with resistors in series with the line. I have seen anything from 100 Ohms to several kOhm.
The way it works is... where does the voltage tolerance of IC IO circuits come from? Generally there's fast diodes to VCC and ground on every IO pin that act as lightning rods for static electricity, ESD diodes, and once you exceed the VCC on the IO line by the diode threshold, the diode will conduct all the current that you can provide, but since it's made for low-energy burst loads only and not for sustained current, it's going to burn out short, leaving you with a no longer working IO pin which is always tied to VCC. But if you just add series resistors, this can prevent these diodes from taking too much immediate and permanent damage.
I think voltage dividers shouldn't be used but given you figured out proper level shifting, well that's good.
This can only work up to some bus frequency as the inline resistance will skew the rise/fall time because of the pin capacitance of the RAM chips.
@@VladoTThis. I've used resistive voltage dividers for all sorts of horrible things over the years, but things start going wrong when using one on a signal line. Save yourself the trouble and just get a €0.20 level shifter.
Yes but if you read between the lines of the Micron RAM datasheet, it's implied that there are no traditional ESD diodes to Vcc, only to ground. 4.6 volts max pin voltage when run at 3.3V? That's beyond 0.3V for a Schottky diode or 0.7V for a silicon diode. So the chip probably doesn't clamp the voltage and putting 5 volts on the pin will not cause a bunch of current draw (which you want if you're using the series resistor). Instead any failures will be via electromigration or whatever, not thermal failure as is the usual risk when putting a lot of current through the ESD diode.
Another issue you can have with using a diode to Vcc to limit the current is that you can raise up your 3.3 volt rail closer to 5 volts. I had a system once with this problem. We used the wrong kind of buffers to interface our 3V system to 5V logic. We should have used 74LVCxxxA series buffers but instead we used something else which had the ESD diode to Vcc on each pin. When the host system put a logic 1 on all the pins, the 3.3 volt supply would go up to 4.5 volts. If you're intending to put a lot of current through the ESD diodes to a lower Vcc, you need to use all of the current coming in through the diodes, or else Vcc will raise up towards the I/O pin voltage. Easy solution is to just put a big (i.e. low resistance) resistor between 3V and ground, sized to waste the worst-case current coming in from the diodes minus whatever your 3V logic's minimum operating current is. That wastes a ton of power, so maybe you can try a shunt regulator strategy. You put some kind of zener diode or thyristor or something that turns on a clamp once the voltage exceeds 3.4 volts or so.
I agree with this, if the chip has a diode then it will clamp to 3.3v plus about half a volt. If it doesn't then diodes are easy to add. Just to give you some faith you can connect a micro controller pin direct to mains via a resistor and rely on the internal clamping diodes I've seen cost optimized circuit do exactly this for zero crossing detection.
@@zanekaminski Thank you, very interesting.
logic voltage levels are never exact 0 or suply voltage , many chips have wide strike zone so chipset even at 5v logic level would probably accept high levels anywhere from 2-2,7v to 5 v and low levels close to 1 v so in theory we could be dumb and brute force level change by installing 2-3 fast switching diodes one direction and single the other way
of course that could not work in very high frequencies due to impedance and practically no load on the logic sides with no termination resistors you could reference as a signal on voltage drop
There were many versions how to design a memory module for the chips and to comply with the datasheet. Then someone suggested to keep the BOM as simple as possible and reduce the number of different components if possible. I guess those are all best practices. But I did come across the idea of using diodes.
Great video! 486 class cpu with 256 mb memory next?)
Ah, then I have to design a 72-pin module :D I am not sure if I will do that. Those 30-pin SIMMs are already quite difficult to design - especially with all those extra components. But never say never :)
Theoretically the 486 can address 4GB of RAM, But I doubt any chipset ever supported that. You could however design a motherboard using something like the V380SDC that supports 2GB of PC133 SDRAM!
Great job! How are you doing with the sequel?
AMS1117 requires at least an output capacitor close to the output pin. And this board does not look like it has it
I like the way you said RAS. I definitely say it more like an American. :p
Ah, I'll never get rid of my German accent 😅
Well, the voltage divider might be the main problem. Depending on how much current the chip consumes, the output voltage WILL drop.
Easiest solution for a stable voltage is a well configured zener-diode/resistor combo.
There if there is no power need, all the current will go through the zener diode. The more current the chip draws, the less current goes through the zener diode. Output voltage will only begin to drop if the chip draws more current than what was designed to be the basic current through the zener diode.
Result: Stable voltage, and a constant power consumption.
Not a solution you would choose for an energy-efficient device, but then again a 386 is not very energy-efficient, is it? 😉
i can only think of one addition that could be made to these
and that is a way to set the memory size/ranks because some motherboards from this memory era had limits on the size of the stick or how many ranks you could install in each slot
for instance i had a mother board in the late 80's/early 90's that had 2 banks of memory using the same SIMM package but one bank could use single rank SIMM's and one bank could use dual-rank SIMM's and if you put a dual-rank in the first bank it caused an error
-it even had a note in the manual about it
sorry i can remember the board i was only 10 and the board was new in 1989-90 but it stuck with me all these years
just pull up ground of chip by +0.7 volts from PC ground - specs allow till -1 - so absolute amplitude is 5.6 volts, less chip and much chiper ;)
Interesting idea, although why don't I see this often is an interesting question
I suggested this while talking to a person with much better knowledge and there seems to be an issue with this approach. I don't remember what though.
Not sure how applicable this would be to RAM chips of any kind, but I know for some 3.3v chips like NOR-Flash you can get away with running them at 5v (at least in read mode for flash). It's definitely still out of spec, but sometimes I think the specs are just set by how far they've been tested. Many modern parts simply aren't designed/tested with 5v logic in mind.
I've heard people say that most of these 8MB 3.3 volt chips are 5v tolerant, but it's not mentioned in the datasheet - in which most manufacturers state an absolute maximum rating of 4.6 volts. I don't know if those chips will work well for a long time at 5 volts, that is why I try to find a different solution (and to learn something of course).
It would be fun to try and actually use all of the ram. I can export AutoCAD drawings to R12 (dos) and 14 (win95) formats, but I no longer have "trial versions" of these versions of the program. I should be able to generate a huge DWG file probably that you can try to open / work with..
I have a feeling that the CPU would struggle quite a bit with such a massive AutoCAD file. But it would be nice to find a use case
@@bitsundbolts UA-cam keeps deleting my reply. You can find AutoCAD R14 on that place on the internet that archives things. I'm happy to supply some drawings of vaious sizes for you to try, so we can point and laugh at the screen..
Yeah, UA-cam doesn't like links and sometimes words. Go figure... Let me try to source a copy from that place that archives things 😉.