Sanity Checks after VLSI Synthesis

[@MohamedThameem-r9q]

what if it contain a error who clear that physical designer or rtl team ?

[@EngineerVijitaaDas]

Depends on the error, if the error due to RTL files, RTL DESIGNER needs to update the latest version of RTL files and provide it to Synthesis Engineer

[@mekalashyamala3335]

Plzz can you tell me the exam pattern of Wipro physical design

[@EngineerVijitaaDas]

I am not sure about that.

[@AffectionateGo-Kart-hq7iy]

Can you please share important questions for PD

[@EngineerVijitaaDas]

@@AffectionateGo-Kart-hq7iy will share in a separate post. Mostly the videos I posted till date are commonly asked questions in PD