Prof Ben-Yaakov, Thanks for make these great videos. I really enjoy them! I've been an EE for 30 years but I'm new to SMPS applications and find the whole thing fascinating. (Actually, high speed switching of inductive loads is pretty crazy). Keep up the good work!
Hi Professor, @19:40 when Q1 and Q4 is turned off it will be hard switching turn off... Because as gate is pulled down the Vds voltage will rise and there is still current in the FETs Q1 and Q4.. No doubt the current will continue as shown by the red trace as inductor will turn on the body diode of Q2 and Q3 which makes the drop across them low and will turn on with ZVS. So during turn off you don't get ZVS or ZCS but during turn on yes you get ZVS for both branches.. correct me if I'm wrong. Thanks
@@sambenyaakov Thanks, I checked that video. And I still stick to my point that Q1 and Q4 gets ZVS during turn on however turn off is having hard switching for primary
@@vbidawat93 This is not hard switching because there is a minimum overlap between voltage and current . I call this pseudo ZVS. Hard switching is when the transistor turns on against a conducting diode , e.g. a buck converter with diode when the high side is turned on. But then, we are talking about notation, you don't have to stick to the convention, call it as you wish😊
ive watched this i think 10x on repeat and still feel like im learning more each time lol.. i think ill be able to use this to solve my EMC problems and hopefully reduce switching losses on a 3ph inverter design. thank you so much for sharing this lecture.
Excellent video again! Thank you! Could you pls ask one question? Around 8:48, you mentioned the loss brought by the reverse recovery current will not be dissipated by the transistor. However, in a boost application as shown in your previous video, during switch ON of the transistor, the current Id will rise before the dropping of Vds. Whether it means most of the Irr actually lead to the loss in the transistor instead? Thank you!
Great vid professor (as always). I was wondering if you could help me understand the advantage of adding the Si MOSFET & Si in parallel to the SiC 26:04? The SiC looks to replace the body diode (good for RR), but adding the Si diode in front of the MOSFET doesn't allow you to take advantage of the low Rdson/low voltage drop(?) which was the reason to use the Si MOSFET over a Si diode in the first place? Would we replace the Si diode with another Si MOSFET in real world applications? Thanks.
Just had a second look at your question and realized that my answer needs amendment. The MOSFET is used to turn on and off the correct. Indeed, in this case there are-additional losses due to the series diode but it could be a Schottky diode of low voltage. This solution is being used in high voltage applications in which case the efficiency penalty is not that high.
@@sambenyaakov was researching this concept in the context of a synchronous buck converter which is hard switching ~20 amps into ~1 mH loads at 54 V. Until your video (and a few others from nexperia), I didn't realize the impacts of the Qrr of the lowside mosfet during a half-bridge turnoff. The key takeaways for our application I hope aren't misinterpreted are: 1. Selecting a MOSFET with a lower Qrr will reduce ringing and EMI -all other things equal 2. Qrr implies some current 'shoot through' when switching on the highside MOSFET. This current is in addition (and proportional to?) the switched load current 3. An RC snubber on the switch node will reduce negative voltage and Vds stresses (ie reduce avalanche concerns??) caused by Qrr of the lowside fet
What adjustment is required in synchronous dead time to take care reverse recovery problem? Should my dead time larger than reverse recovery time mentioned in MOSFET datasheet?
Deadtime is generaly not related to the reverse recovery. An example for deadtime need is in a syncronous Buck convertr after the high side transistor is turned off. This is followed by the mid point voltagd swing until the diode is catching. This is the required deadtime until the lower transistor is turned on.
@@sambenyaakov Sir do you have Fast Recovery Diode structural analysis in your channel even with the comparison of GPP (Glass Passivated) structure. I couldnt find it. Do you have a plan to upload a FRED Diode Analysis? I would appreciate to watch it.
Sir, Thanks for educating us. We are very grateful for all your videos. It is a big service to humanity. I have a query in this video...What decides IRM ( Peak reverse current). Best Regards & Thanks, Sanjay
Great lecture about diode reverse recovery and junction capacitance. Thanks for all valuable information. i did not know about flyback snubber. I thought it is a new innovation snubber (I currently work on this flyback snubber for IGCT). but seems it's an old snubbing technique. i will appreciate if you refer me to any reference about this flyback snubber.
I don't get why a diode should have switching losses. We see voltage-current overlap and think "losses", but during the recovery this overlap just means that energy is stored in the diode depletion region... the transistor takes this charge and dissipates it eventually... why are there switching losses in the diode?
Good question. I am planning to prepare a detailed answer in aviseo to be posted here. In short, the losses are really not in the diode but the diode is causing it - so it is considered as "diode loss"
@@sambenyaakov ok! the question arises because that should mean a lot for the thermal design... if transistor and diode chips are separated, such as in IGBTs and in the fast diode example you show, it means these "diode losses" do not in fact contribute to heating of the diode
Thanks for the video. I’m not very sure if I understood power loss discussion, 07:44 . It contradicts with this reference from ST: www.st.com/resource/en/application_note/an5028-calculation-of-turnoff-power-losses-generated-by-a-ultrafast-diode-stmicroelectronics.pdf The way they describe it is that when the FET turns on, the FET voltage would still remain high until the diode reaches peak reverse current. This means the reverse recovery energy is dissipated on the FET. You mentioned in your video that power loss on the FET is negligible due to diode turn off, which is the opposite of what ST app note is saying. Can you please clarify? Thanks
Not so. In section 2 they calculate the DIODE extra loss while I am calculation the TOTAL system loss. The diode extra loss is relatively small even when when compared to its loss in the forward conduction.
Is there any effective way to eliminate or reduce the reverse current of diode junction capacitance? series, shunt resistor or other way? recently it becomes a series issue in the SiC diode that i connected to flyback snubber. As you said this SiC diode recover energy to input (in my case DClink) or output. The secondary of flyback snubber has high voltage and low current, so I thought, it might be good application for SiC diode. However, during turning on of semiconductor switch (here is IGCT) the negative (reverse) current flow through diode and i am sure it is due to junction capacitance of SiC diode.
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
With regards to a saturable reactor, would it be possible to use the leakage inductance of the transformer to lower the rate of change of reverse current?
Thank you, thank you, ... many thanks for you. I wanna be like you and teach power electronics. Im learning a lot from your videos. I wich to meet one day.
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
This is excellent. You showed many aspects of diode recovery and transition currents in switching supplies I have never considered.
Thank you
Thanks for comment. Nice to read.
This should be the most underrated youtube channel. The explanation was excellet sir and thank you for this video
Thanks. This is for the top notch designers 😊
Easily the best power electronics channel on UA-cam !!
Thanks😊
Very sweet, beautiful and fluent explanations. I enjoyed it.
Thank you! 😃
Sir, you are so elegant and masterful with your teachings. Please keep sharing. Many thanks!
Thanks.
Thanks Prof, the only video on the UA-cam properly explain the power diode behaviour.
🙏👍
Prof Ben-Yaakov, Thanks for make these great videos. I really enjoy them! I've been an EE for 30 years but I'm new to SMPS applications and find the whole thing fascinating. (Actually, high speed switching of inductive loads is pretty crazy). Keep up the good work!
Hi Michael, welcome to power r
electronics and thanks for comment and encouragement. These keeps me going.
very precisely explanation ,and clear my misunderstanding well . thank you Pro. Sam .
Thanks for taking the time to comment.
Hi Professor,
@19:40 when Q1 and Q4 is turned off it will be hard switching turn off... Because as gate is pulled down the Vds voltage will rise and there is still current in the FETs Q1 and Q4..
No doubt the current will continue as shown by the red trace as inductor will turn on the body diode of Q2 and Q3 which makes the drop across them low and will turn on with ZVS.
So during turn off you don't get ZVS or ZCS but during turn on yes you get ZVS for both branches.. correct me if I'm wrong. Thanks
See ua-cam.com/video/w4cxLPl2Wsg/v-deo.html
@@sambenyaakov Thanks, I checked that video. And I still stick to my point that Q1 and Q4 gets ZVS during turn on however turn off is having hard switching for primary
@@vbidawat93 This is not hard switching because there is a minimum overlap between voltage and current . I call this pseudo ZVS. Hard switching is when the transistor turns on against a conducting diode , e.g. a buck converter with diode when the high side is turned on. But then, we are talking about notation, you don't have to stick to the convention, call it as you wish😊
Thanks for making these great videos. Highly Recommended for anyone from power electronics background.
Thanks
ive watched this i think 10x on repeat and still feel like im learning more each time lol.. i think ill be able to use this to solve my EMC problems and hopefully reduce switching losses on a 3ph inverter design. thank you so much for sharing this lecture.
👍🙏
many thanks prof. you are helping a lots in making things clear. i really appreciate that. May god bless you.
Thanks Fariham
Great data well presented, Professor. Thank you.
Excellent video again! Thank you! Could you pls ask one question? Around 8:48, you mentioned the loss brought by the reverse recovery current will not be dissipated by the transistor. However, in a boost application as shown in your previous video, during switch ON of the transistor, the current Id will rise before the dropping of Vds. Whether it means most of the Irr actually lead to the loss in the transistor instead? Thank you!
At turn ON the transistor current is limited by the leakage inductance, which is the slope in the plot, and the transistor is already Rds(on)
Hot applications. Wish the effect and modeling was described in more detail.
Thanks
Keep uploading videos ! Very useful information.
Thanks for comment
Great vid professor (as always). I was wondering if you could help me understand the advantage of adding the Si MOSFET & Si in parallel to the SiC 26:04? The SiC looks to replace the body diode (good for RR), but adding the Si diode in front of the MOSFET doesn't allow you to take advantage of the low Rdson/low voltage drop(?) which was the reason to use the Si MOSFET over a Si diode in the first place? Would we replace the Si diode with another Si MOSFET in real world applications? Thanks.
Just had a second look at your question and realized that my answer needs amendment. The MOSFET is used to turn on and off the correct. Indeed, in this case there are-additional losses due to the series diode but it could be a Schottky diode of low voltage. This solution is being used in high voltage applications in which case the efficiency penalty is not that high.
Excellent explanation sir.
Thanks
Thank you sir,
Your are the best!
Thanks
Wonderful video - thank you so much
Thanks
@@sambenyaakov was researching this concept in the context of a synchronous buck converter which is hard switching ~20 amps into ~1 mH loads at 54 V. Until your video (and a few others from nexperia), I didn't realize the impacts of the Qrr of the lowside mosfet during a half-bridge turnoff.
The key takeaways for our application I hope aren't misinterpreted are:
1. Selecting a MOSFET with a lower Qrr will reduce ringing and EMI -all other things equal
2. Qrr implies some current 'shoot through' when switching on the highside MOSFET. This current is in addition (and proportional to?) the switched load current
3. An RC snubber on the switch node will reduce negative voltage and Vds stresses (ie reduce avalanche concerns??) caused by Qrr of the lowside fet
@@kylehagen1476 Use a Schottky diode if you
What adjustment is required in synchronous dead time to take care reverse recovery problem? Should my dead time larger than reverse recovery time mentioned in MOSFET datasheet?
Deadtime is generaly not related to the reverse recovery. An example for deadtime need is in a syncronous Buck convertr after the high side transistor is turned off. This is followed by the mid point voltagd swing until the diode is catching. This is the required deadtime until the lower transistor is turned on.
Thank you very much Professor !
Thank you.
@@sambenyaakov Sir do you have Fast Recovery Diode structural analysis in your channel even with the comparison of GPP (Glass Passivated) structure. I couldnt find it. Do you have a plan to upload a FRED Diode Analysis? I would appreciate to watch it.
@@SefaOralz Good subject will try
19:23 Why should there be a reverse current, in the diode of Q1, when it is turned off? It wasnt in forward.
This is the resonant current when the switching frequency is above resonance.
Sir,
Thanks for educating us. We are very grateful for all your videos. It is a big service to humanity.
I have a query in this video...What decides IRM ( Peak reverse current).
Best Regards & Thanks,
Sanjay
Thanks dI/dt
@@sambenyaakov Sir, if we know dI/dt, how can we know the time.
Thanks and best regards
@@sanjayagrawal6143 Some datasheets will give this information. Some don't. You can use simulation.
Thanks Sir for your reply.
Best Regards
Great lecture about diode reverse recovery and junction capacitance. Thanks for all valuable information. i did not know about flyback snubber. I thought it is a new innovation snubber (I currently work on this flyback snubber for IGCT). but seems it's an old snubbing technique. i will appreciate if you refer me to any reference about this flyback snubber.
See references 42 and 45 in
www.ee.bgu.ac.il/~pel/seminars/seminar9.pdf
So many thanks.
thank you ! this is excellent lecture !
Thanks for comment.
I don't get why a diode should have switching losses. We see voltage-current overlap and think "losses", but during the recovery this overlap just means that energy is stored in the diode depletion region... the transistor takes this charge and dissipates it eventually... why are there switching losses in the diode?
Good question. I am planning to prepare a detailed answer in aviseo to be posted here. In short, the losses are really not in the diode but the diode is causing it - so it is considered as "diode loss"
@@sambenyaakov ok! the question arises because that should mean a lot for the thermal design... if transistor and diode chips are separated, such as in IGBTs and in the fast diode example you show, it means these "diode losses" do not in fact contribute to heating of the diode
@@Dahmac Indeed. BTW there is some extra heating of the diode due to the high peak current but most of the energy is absorbed by others.
Thank a lots prof. your videos are helping a lots.
Thanks Hamza
Sir, in the 7:47 you mention the power loss the power loss is reverse recovery loss?
If I want to calculate the diode power loss how do I do
Power loss due to diode is the forward current in conduction mode and the reverse recovery loss as shown in slide.
@@sambenyaakov but in the boost converter the diode reverse recovery will affect the switching power loss of mosfet right?
Is the recovery time a constant or does it depend on the forwarding current?
A function of forward current.
@@sambenyaakov and reverse bias voltage right ?
great lecture sir i think it's 25% of Irm and not 10% by definition of reverse recovery time..
Всегда отличные видео. Спасибо.
Thanks. I got it translated by friend not Google
Thank you !
😊
Thanks for the video.
I’m not very sure if I understood power loss discussion, 07:44 .
It contradicts with this reference from ST:
www.st.com/resource/en/application_note/an5028-calculation-of-turnoff-power-losses-generated-by-a-ultrafast-diode-stmicroelectronics.pdf
The way they describe it is that when the FET turns on, the FET voltage would still remain high until the diode reaches peak reverse current. This means the reverse recovery energy is dissipated on the FET. You mentioned in your video that power loss on the FET is negligible due to diode turn off, which is the opposite of what ST app note is saying. Can you please clarify?
Thanks
Not so. In section 2 they calculate the DIODE extra loss while I am calculation the TOTAL system loss. The diode extra loss is relatively small even when when compared to its loss in the forward conduction.
POWER DIODE PALLER ME SUNBBER CURCITE RSISTANCE, CAPACITOR VALUE HOW TO CALCULATED PL. SEND ME
Sorry, I do not follow.
Is there any effective way to eliminate or reduce the reverse current of diode junction capacitance? series, shunt resistor or other way? recently it becomes a series issue in the SiC diode that i connected to flyback snubber. As you said this SiC diode recover energy to input (in my case DClink) or output. The secondary of flyback snubber has high voltage and low current, so I thought, it might be good application for SiC diode. However, during turning on of semiconductor switch (here is IGCT) the negative (reverse) current flow through diode and i am sure it is due to junction capacitance of SiC diode.
Seem to be a real problem. I din't have of hand any good solution to offer.
I think that video which is explained in video is from electrical 4u website
And I think that you are mistaken, unless they have copied this video😊
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
With regards to a saturable reactor, would it be possible to use the leakage inductance of the transformer to lower the rate of change of reverse current?
Yes, but how would you recycle the energy stored in stray inductance?
Thank you, thank you, ... many thanks for you. I wanna be like you and teach power electronics. Im learning a lot from your videos. I wich to meet one day.
Thanks for comment. Welcome to join: www.linkedin.com/groups/13606756/
Sir hindi me translate kare pl.
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
hi dear professor, it has been long that watch your beautiful power electronic lectures and every time i get beautiful knowledge and this video also helped me but i have a problem,,, i want to calculate the turn off losses of the reverse recovery diode but in PSIM when i insert diode it has no feature of reverse recovery time and reverse recovery charge and same as the case with the simulink and that is why i am badly stuck and cant move forward, calculating the turn off looses of diode as the part of my research thesis,,dear professor please guide me,, regards,,
PSIM is not the right tool. You can calculate lossed by Qrr*f*V
@@sambenyaakov thanku sir