This was a super interesting video. This popped up randomly on my UA-cam recommended videos list and I got glued to the TV watching the entire 1 hour 50 minutes of it. I am a long time hardware FPGA developer writing SystemVerilog code daily at work but this video showed features I had not seen demonstrated before and it was done so expertly by Adam Taylor. He makes it all look very easy and often states ‘it’s fairly simple’ but wow! What an expert and a teacher. I will be all over his blog from now on. Thank you both for making this video.
Great video! Now I have something I can send software engineers to that keep asking the same higher level questions about FPGAs. For PCIe, it doesn't only have to be a host computer. Right now I have a Zynq Ultrascale+ on my desk connected to an i.MX8 board via PCIe (M.2 connector to the PCIe edge connector on the dev board). There are plenty of edge computing applications where such a configuration makes sense (the i.MX8 is higher performance and lower power than the ARM part of the Zynq U+, however, you would probably use a Kintex in an actual product where the Zynq just helps with development). For drivers, the OS does a lot of the work for you. Once the OS boots, the PCIe BARs are assigned memory regions in the host's physical memory space. So you would interface with the PCIe end point / BARs via physical memory R/W on the host. On a dev system like the i.MX8 that I have where /dev/mem is accessible, a driver isn't needed to get things working - I was able to use both C code and Python code to directly access the BAR memory space from user space. For an actual product though, you don't want to have /dev/mem accessible and you need a driver. In that case, the easiest solution is to copy one that already exists (xilinx has one for their XDMA system, but that's not necessary in most cases). Complexity will depend on how you want to break down your security and features, however, the simplest solution is to offload a lot of the work to user space. In such a situation, your linux driver has boilerplate linux PCI driver code (copied from guides all of the place which let Linux associate the PCIe endpoint with the kernel model / driver), and then you implement the mmap function call on the module. The mmap function call is just a secure indirection of mmap on /dev/mem, so it provides a way for a user code to mmap the device (e.g. /dev/myPCIe) and it gets associated with the physical BAR address mapped by the OS. This was one of those things that I always thought was very complicated to do, but it turns out to be very simple... I actually think that using PCIe between a linux host and an FPGA is simpler than trying to do I2C or SPI. I would say it took about 3 days of head scratching to produce something that could have been done in 10 minutes if I knew what I was doing from the start.
An astounding video. Just the right level for engineers that haven't played with but would like to play with FPGAs. I've been stuck with micros only due to the price of what FPGA 'toys' are regarded as in automotive! 'Only' $100 is a different world.
Yeah, I have 4x 14$ Intel parts scheduled for shipment in 2023. I stupidly started a project before checking availability. I was able to score some other parts from Mouser 2 weeks ago and will redesign my board even though I have the PCB's for the other unavailable part.
@@kianemami9090 Indeed. I have a couple Kickstarter projects I signed up to that are in limbo because of this. Thankfully I got a notification that an SDR I recently bought got shipped this week despite Intel FPGA's being almost completely AWOL.
Thanks Adam. This is excellent information. Due to the ongoing chip shortage I'm considering using some obsolete recently acquired Virtex 5 Xilinx parts that are on a PCIe card for a project. Could you point me to any resources that discuss using Virtex parts and their use with PCIe? No foul if you don't know. Cheers!
Due to cost, I'd recommend that you use an FPGA for the most cost effective solutions. These solutions are nearly always based on parallel processing. A microprocessor implemented on an FPGA will cost you 100's of times more than a standard commercial device. Video processing is one of the main uses of FPGA's, but not standard video processing, as if it can be done with a GPU, then you should use the GPU, due to costs. Big FPGA's cost hundreds to thousands of dollars for each chip!
None of this is true anymore in SoC era... Plenty FPGAs are available around 20 bucks that can do "reasonable" design complexity nowadays... And you can have a REAL MCU core in an FPGA, or the other way around these days!!!
But $10 FPGAs from Lattice also exist. AGREE, stupid to put an MCU soft core inside FPGA if these days hard cores and SoC cores and separate ICs are available.
Thanks guys. Great video. I am really trying to get my FPGA skills to the professional level and seeing how a real pro works in Vivado is super helpful. Following both of you guys now.
Thanks for this amazing video. It's value is priceless, at least for me. I got to a point where the most difficult part is not the design process, but the process of starting Vivado and/or keeping it crash free. I wanted to learn how to handle Ethernet related problems on FPGA, so I took a Spartan 7 board from UNI and started designing an RMII based TCP/IP echo server... until Vivado got fed up, and started not working. I'm really thinking of leaving Xilinx for Lattice once and for all. Maybe the FPGAs are smaller, and maybe the IDE is a bit last century looking, but I did not have any disheartening bugs with them so far :)).
Vivado is indeed a horrible tool. I always have to spend a lot of time just to make the simplest thing work. Also using any version control system is a nightmare, since just opening and closing the project already changes files...not to mention weird pc specific paths that it decides to save...
The key is to keep a TCL script that recreates your project in version control (see AR# 56421). Vivado projects seem to get slower and more cluttered over time for some reason, so I typically delete the project and recreate it fresh from the TCL script whenever a significant chunk has been added and put into version control. Vivado also seems to run better on linux than in windows.
Hi Robert, another cool YT video with a real subject matter expert. Again, although being into FPGAs for some time now, I admire the floor planning Adam did with the second application he showed. I do think that floor planning and timing issues would be very interesting follow up videos. Thanks again for your efforts! All the best - Frank
Great video I appreciate the work I have a little note though, you interrupted the guest sometimes which he couldn't finish some points, otherwise it was great
FPGA's are expensive and hard to learn, but if you are studying electrical engineering or similar, I bet you will use it for plenty of subjects, from switching circuits, to vision and AI systems.
Great call Robert and Adam! Very informative! IP’s definately simplify creating circuits, versus manually creating them with discreet logic. Question, if one were to use an IP and there is functionality not being used, will those unused functions still take up logic space on the FPGA? I’m still old school and don’t waste transistors! LOL
I would love to get my hands on one of those Alveo cards and experience writing an application that employs XRT, DFX and so on. The things you could do with FPGAs are countless
I am sure this is useful, but it did not answer my question, which I think is the same as yours. How you do find and use these to connect things into larger projects? Someone said "hard to find them now" and that happens for every fad on the Internet. It never seems to get simpler, cheaper, easier. So all I can do is say thanks for your efforts. I think I am going to concentrate on analog MUX, sensor arrays, signals, signal prep, ADCs, algorithms and purposes. With a budget and purpose, choosing is easier. Pardon me, but "What a mess! Too much stuff for everyone to have to memorize all these odd shaped pieces and their software."
@@RobertFeranec Thanks, I watched that too. I hope it gets to where I can just order something by function and have it sent to me for a fixed price. "An ESP32 with DMA controllers for each camera, each 16 bit high speed RF ADC. 5 GHz wireless or USB 3.2 or 10 Gbps ethernet. SSD" It is all just chips wired together in pretty standard ways. A computer program should be able to check the tables of requirements, place things on the board, send it, make it, mail it.
A vague hobbyist question (oof-topic): ?When is it better NOT to use a custom PCB & just solder the components together via wires/perfboard? ?Hows-abouts a video on the subject?
Tiny coin sized, 2,5cmx2,3cm Efinix test board will be ready in November-December. Very (very) original Artix Ultrascale+ board will be ready in early 2023.
converting c code directly into fpga wires would be the most complex thing ever, youd fill it up easily in about 400 lines, depends on the iterations. (would need to replicate the code for every iteration.)
I'd pick the cheapest board that you can afford, if you are coming from an electronics background and will wire up your own circuits to the board. A board where you can screw up badly and kill the FPGA chip, and replace the board, without kicking yourself too hard, for what is a learning experience (no way am I killing the next board, or the same board with a new FPGA, that exact same way ever again).
It is going to happen, unless you want to update all your existing gateware every time a new major version of the tools is released. And sometimes older chips are dropped from support in the latest revision, so if you need to support older hardware that you have sold in a solution, you will need multiple versions. It is the best use of YOUR time.
This was a super interesting video. This popped up randomly on my UA-cam recommended videos list and I got glued to the TV watching the entire 1 hour 50 minutes of it. I am a long time hardware FPGA developer writing SystemVerilog code daily at work but this video showed features I had not seen demonstrated before and it was done so expertly by Adam Taylor. He makes it all look very easy and often states ‘it’s fairly simple’ but wow! What an expert and a teacher. I will be all over his blog from now on. Thank you both for making this video.
Edwin, thank you very much for watching. I am very happy you liked the video.
I'm learning FPGA for my final thesis and to hear Adam Taylor speak and teach this stuff is excellent. Thank you very much for making this video.
How did your thesis go?
@@EmbddedJiuSage went well, was able to finish it and aprove it, even though im not very happy with the results obtained.
@@notpipa_ congratulations! is there a way i can approach you? I am doing the same, thesis with fpga
Great video! Now I have something I can send software engineers to that keep asking the same higher level questions about FPGAs.
For PCIe, it doesn't only have to be a host computer. Right now I have a Zynq Ultrascale+ on my desk connected to an i.MX8 board via PCIe (M.2 connector to the PCIe edge connector on the dev board). There are plenty of edge computing applications where such a configuration makes sense (the i.MX8 is higher performance and lower power than the ARM part of the Zynq U+, however, you would probably use a Kintex in an actual product where the Zynq just helps with development).
For drivers, the OS does a lot of the work for you. Once the OS boots, the PCIe BARs are assigned memory regions in the host's physical memory space. So you would interface with the PCIe end point / BARs via physical memory R/W on the host. On a dev system like the i.MX8 that I have where /dev/mem is accessible, a driver isn't needed to get things working - I was able to use both C code and Python code to directly access the BAR memory space from user space. For an actual product though, you don't want to have /dev/mem accessible and you need a driver. In that case, the easiest solution is to copy one that already exists (xilinx has one for their XDMA system, but that's not necessary in most cases). Complexity will depend on how you want to break down your security and features, however, the simplest solution is to offload a lot of the work to user space. In such a situation, your linux driver has boilerplate linux PCI driver code (copied from guides all of the place which let Linux associate the PCIe endpoint with the kernel model / driver), and then you implement the mmap function call on the module. The mmap function call is just a secure indirection of mmap on /dev/mem, so it provides a way for a user code to mmap the device (e.g. /dev/myPCIe) and it gets associated with the physical BAR address mapped by the OS.
This was one of those things that I always thought was very complicated to do, but it turns out to be very simple... I actually think that using PCIe between a linux host and an FPGA is simpler than trying to do I2C or SPI. I would say it took about 3 days of head scratching to produce something that could have been done in 10 minutes if I knew what I was doing from the start.
this has got to be the best FPGA video ive seen, straight to the point no nonse video. we want more :)
Glad you liked it you might be interested in my FPGA blog
you are a very nice person who loves sharing science and benefiting others
We need more content like this! Please make a whole series on this stuff Robert
An astounding video. Just the right level for engineers that haven't played with but would like to play with FPGAs. I've been stuck with micros only due to the price of what FPGA 'toys' are regarded as in automotive! 'Only' $100 is a different world.
Love these type of videos where you have a guest!
Brilliant Robert..
I was eagerly waiting for this moment..
Thank you.
I can not explain how I am happy to see this video:)
You forgot the most difficult part: finding FPGAs in stock anywhere nowadays!
Yes, that is a very big topic these days
Exactly. I am being quoted 52 weeks lead times.
Yeah, I have 4x 14$ Intel parts scheduled for shipment in 2023. I stupidly started a project before checking availability. I was able to score some other parts from Mouser 2 weeks ago and will redesign my board even though I have the PCB's for the other unavailable part.
@@vincei4252 pure nightmare mate
@@kianemami9090 Indeed. I have a couple Kickstarter projects I signed up to that are in limbo because of this. Thankfully I got a notification that an SDR I recently bought got shipped this week despite Intel FPGA's being almost completely AWOL.
Very interesting, Robert. Thanks for creating and sharing this.
Robert, Thanks for the chat I enjoyed it a lot.
Thank you very much Adam. It was very nice talking to you and I learned a lot!
Thanks Adam. This is excellent information. Due to the ongoing chip shortage I'm considering using some obsolete recently acquired Virtex 5 Xilinx parts that are on a PCIe card for a project. Could you point me to any resources that discuss using Virtex parts and their use with PCIe? No foul if you don't know. Cheers!
Due to cost, I'd recommend that you use an FPGA for the most cost effective solutions. These solutions are nearly always based on parallel processing. A microprocessor implemented on an FPGA will cost you 100's of times more than a standard commercial device. Video processing is one of the main uses of FPGA's, but not standard video processing, as if it can be done with a GPU, then you should use the GPU, due to costs. Big FPGA's cost hundreds to thousands of dollars for each chip!
None of this is true anymore in SoC era... Plenty FPGAs are available around 20 bucks that can do "reasonable" design complexity nowadays... And you can have a REAL MCU core in an FPGA, or the other way around these days!!!
@@nameredacted1242 Please provide some links. I'd love to find a MCU core that was less than $100!
@@mcconkeyb CrapTube will delete any of my posts with links. DigiKey is your friend.
But $10 FPGAs from Lattice also exist.
AGREE, stupid to put an MCU soft core inside FPGA if these days hard cores and SoC cores and separate ICs are available.
Robert, I appreciate it. You know... that's what I am looking for.😀
Thanks guys. Great video. I am really trying to get my FPGA skills to the professional level and seeing how a real pro works in Vivado is super helpful. Following both of you guys now.
Nice video, well done :)
This is the first time I ran to your channel, it is really impressive and you have some very advanced topics
Excellent video... It is explained in such a nice manner... Thanks to Adam too
Amazing video mate, there aren't a lot of good tutorial videos on FPGAs. Kudos to Adam too. Thanks:)
Thanks for this amazing video. It's value is priceless, at least for me.
I got to a point where the most difficult part is not the design process, but the process of starting Vivado and/or keeping it crash free. I wanted to learn how to handle Ethernet related problems on FPGA, so I took a Spartan 7 board from UNI and started designing an RMII based TCP/IP echo server... until Vivado got fed up, and started not working.
I'm really thinking of leaving Xilinx for Lattice once and for all. Maybe the FPGAs are smaller, and maybe the IDE is a bit last century looking, but I did not have any disheartening bugs with them so far :)).
Vivado is indeed a horrible tool. I always have to spend a lot of time just to make the simplest thing work. Also using any version control system is a nightmare, since just opening and closing the project already changes files...not to mention weird pc specific paths that it decides to save...
The key is to keep a TCL script that recreates your project in version control (see AR# 56421). Vivado projects seem to get slower and more cluttered over time for some reason, so I typically delete the project and recreate it fresh from the TCL script whenever a significant chunk has been added and put into version control. Vivado also seems to run better on linux than in windows.
@@laserdan I think this only proves my point... :-)
very useful video even for an experienced professional like me
This is excellent, Robert. I will be sure to watch the entire thing once I finish work today. Thanks as always!
Awesome! This is wonderfully relevant for me and my current project at work. Thanks Rob and Adam.
Hi Robert, another cool YT video with a real subject matter expert. Again, although being into FPGAs for some time now, I admire the floor planning Adam did with the second application he showed. I do think that floor planning and timing issues would be very interesting follow up videos. Thanks again for your efforts! All the best - Frank
This is unbelievable. Thanks a lot for uploading this.
Thank you Engineer Feranec. This is what I have been looking for. Once more, thank you.
fantastic collab video!!!! thanks guys
interesting video pls make more on FPGAs Thanks !
2 hours of pro content, here we go! ;)
Thank you very much Mio
Am grateful thank you Robert for sharing
I really appreciate your content Robert. Thank you
Wishbone bus is popular too.
Great video!
Great video I appreciate the work
I have a little note though, you interrupted the guest sometimes which he couldn't finish some points, otherwise it was great
i love fpga i hope you make more keep up
FPGA's are expensive and hard to learn, but if you are studying electrical engineering or similar, I bet you will use it for plenty of subjects, from switching circuits, to vision and AI systems.
Similar video showing Intel environment would be great.
worst thing is when you talk to a interface using a middle-ware interface, bare bones is the best, very low level, no trash in the way
gpio pins, simple
try arrow sockit instead, its not so demanding
its intel/altera cyclone v, not xilinx
quality: unmanageable
its just memory transfers, in the end
Great call Robert and Adam! Very informative! IP’s definately simplify creating circuits, versus manually creating them with discreet logic. Question, if one were to use an IP and there is functionality not being used, will those unused functions still take up logic space on the FPGA? I’m still old school and don’t waste transistors! LOL
Which one would u prefer, c or systemverilog for fpga?
I would love to get my hands on one of those Alveo cards and experience writing an application that employs XRT, DFX and so on. The things you could do with FPGAs are countless
I'm interested in writing c++ modules that can be integrated via AXI interfaces into a big FPGA design. Can you make a video about it?
Great Video Robert!!!!
It is excellent. It would be wonderful if you could invite an ASIC engineer as well.
Thk you oh so much but my mind melted 5 minutes into the video.
top top drawer Robert! Cheers for that
This video was amazing, Robert, TNX
thank you
I am sure this is useful, but it did not answer my question, which I think is the same as yours. How you do find and use these to connect things into larger projects? Someone said "hard to find them now" and that happens for every fad on the Internet. It never seems to get simpler, cheaper, easier. So all I can do is say thanks for your efforts. I think I am going to concentrate on analog MUX, sensor arrays, signals, signal prep, ADCs, algorithms and purposes. With a budget and purpose, choosing is easier. Pardon me, but "What a mess! Too much stuff for everyone to have to memorize all these odd shaped pieces and their software."
Thank you very much @richardcollins5549 PS: This Phil's video may also help: ua-cam.com/video/B-CbDfrfJRk/v-deo.html
@@RobertFeranec Thanks, I watched that too. I hope it gets to where I can just order something by function and have it sent to me for a fixed price. "An ESP32 with DMA controllers for each camera, each 16 bit high speed RF ADC. 5 GHz wireless or USB 3.2 or 10 Gbps ethernet. SSD" It is all just chips wired together in pretty standard ways. A computer program should be able to check the tables of requirements, place things on the board, send it, make it, mail it.
Hi Robert, Next time you do a "basic topics are available everywhere", it might be helpful to point to one or two good ones in the description.
:)
It is great video! Really enjoyed it because i work on a similar-esh roject you shown.
Thanks, Robert
I can understand what you feeling:
It is/was the only solution for some of my ideas :D
I need to check does new Vivado support my ZedBoards. These were with Zynq 7020 ES2 chips.
VERY VERY USEFUL VIDEO ❤️❤️❤️❤️❤️
Next time you do a "basic topics are available everywhere", it might be helpful to point to one or two good ones in the description.
A vague hobbyist question (oof-topic):
?When is it better NOT to use a custom PCB & just solder the components together via wires/perfboard?
?Hows-abouts a video on the subject?
Question, is it ever to late to start learning fgpa programming as a hobby?
when be available the normal menu like a RetroArch??? The MiSTer is beautiful but the menu manipulations is terrible....
This is great. All i see is turn on the led from the button or implement this out of the box ethernet to RF demo.
Awesome talk! Thanks!!!! :D
Tiny coin sized, 2,5cmx2,3cm Efinix test board will be ready in November-December.
Very (very) original Artix Ultrascale+ board will be ready in early 2023.
Awesome!
converting c code directly into fpga wires would be the most complex thing ever, youd fill it up easily in about 400 lines, depends on the iterations. (would need to replicate the code for every iteration.)
Drop a softcore CPU into the FPGA and forget about your problem!!!
Pekne video :)
Dakujem
I'd pick the cheapest board that you can afford, if you are coming from an electronics background and will wire up your own circuits to the board. A board where you can screw up badly and kill the FPGA chip, and replace the board, without kicking yourself too hard, for what is a learning experience (no way am I killing the next board, or the same board with a new FPGA, that exact same way ever again).
Nice video, thanks :)
Nice bro
Holy fk thats what i need thnx
Man I miss messing around with Verilog stuff. But I don't have time to wait 20 minutes to compile a one-line change...
Comment for the algorithm
It's all fun and games until you discover that the test board costs $3k !
Anyone else notice that he had 6 different versions of vivado installed :p .
Plus all the ones I have on external hard disks.
It is going to happen, unless you want to update all your existing gateware every time a new major version of the tools is released. And sometimes older chips are dropped from support in the latest revision, so if you need to support older hardware that you have sold in a solution, you will need multiple versions. It is the best use of YOUR time.
I once visited a company where a lot of employees have multiple PCs that are running XP or even Windows 98 just to support their old products
Luv ya
YOU NEVER UNDERSTOOD ..????? JAJAJAJ
Educational value of the video is Zero because of poor English. Period. To the author: Did you watch the video by yourself?