A year or so ago I was tasked with designing a basic boost converter as part of my studies. It worked, but I'm throughout the video I've definitely spotted many things I could've done better. Thank you for making such thorough videos while still keeping it enternaining.
I've started watching your videos about 4 year's ago and I think the way you've addressed the gap in the market is brilliant. The quality of your work is excellent 👌
You are my 5-star on my successful design/build journey; thanks very much. On my recent design I used a Ricoh RP605 switch in a low power RF design. I learned a lesson: Its a DFN package and found that with hotpad or airgun soldering its really difficult to ensure that the chip centers itself properly because the big (relatively) thermal ground pad in the middle is so close to the edge connections. The fix required a 2nd revision of the board with a slightly smaller ground pad. My lesson: beware of accepting the stock pad layout!
I noticed the solderpaste screen for a QFN32 had four smaller paste rectangles, rather than the entire exposed pad area. Limiting the amount of solderpaste is probably more important on blind packages than exposed lead
Very useful video. Last days I've designed LED driver and these tips helps me understand why pcb layout is so important and possibility for new revision :) Thank you!
Great video. Really appreciated the structure: Overview -> Theory -> Design principles -> Step by step implementation with well explained reasoning Thanks and I look forward to watching more of your videos. Subscribed
Phil, brother, never consider number of views of your videos as a benchmark for the quality of your content. You don't need any validation brother, your content is EXTRA ORDINARY. and keep up the good work... All the best wishes for you.......
Phil your videos are so good! I’ve implemented a few buck regulators myself but I still watched every second of this start to finish. Looking forward to seeing the comparison between ideal and non-ideal layouts 😄
Today, I attended Rick Hartley's class on SMPS design and layout and came back to this video to nitpick. Unfortunately (for me) this video is excellent. You highlighted the important points elegantly and pointed out the critical loops. You also did a terrific job at laying out this regulator especially considering its terrible pinout. Goodness sake! The switching node is adjacent to the input node! Rick mentioned that extra care must be paid to regulators with built-in parts such as the switch and the diode because we have no idea about the IC's inner layout. We could layout a regulator superbly and it would still radiate or be noisy because the IC itself is designed terribly. He also says that if the regulator's datasheet instructs you to put a snubber circuit, leave it and find another regulator that was designed properly.
Thank you for making this video. It is very helpful. I made a switching regulator circuit similar to this one in EasyEDA, but since I'm just an amateur, I had no idea if I was doing it correctly. Your video has helped me to verify that my design choices are mostly correct. I also would love to learn about thermal management of PCB with regards to switching regulators. In my design, the switching regulator is designed to have max 3A continuous current. However, I was only able to feed 3A for about 2 minutes before hitting thermal shut off. The PCB, inductor, switching regulators were very hot after that. Would love to learn more about how to fix this kind of issues.
@@PhilsLab absolutely it does! It may be the topic for another video but expanding a bit to include some best practices on how you select the correct components to meet a specific design. e.g. a buck converter that's needs to output 5V @3A?
Great video! Would be great if you have time to do the follow up videos you were talking about here (using near-field probes to test the different designs). Very much looking forward to that!
Brilliant idea for a series! Looking forward to seeing the next videos using probes. Would be really interested about how big an impact EMI shields/ cans make to radiated interference!
I loved this video! I'm always a bit uncertain when it comes to power design on my PCBs and I typically use LDOs, but after watching this I might try out a buck converter instead for better efficiency.
Really helpful, thanks. I was surprised you didn't widen the track after adding thermal reliefs at 20:12, because this reduced the effective track width significantly. Would this have been a good idea? Thanks!
I have a stupid question. I am not sure how thick the PCB you use ( probably 1.57 mm) is, but will it not be better to get the ground plane on top of the PCB and keep it more than 1.57 mm away from the power plane. I know that will increase the size of PCB, but the buck convertor will be less susceptible to noise.
Thanks for an excellent video, Phil. Looks like I'll be re-routing my PCB yet again :) Looking forward to see the difference in EMI that the spectrum analyzer shows.
At 20:00, wouldn't those thermal reliefs impact on the current carrying path from the switching IC to the inductor? It seems the thick pour/polygon you ran there becomes seriously reduced due to those air gaps making up the thermal relief.
Very nice and detail video! Would you please explain more about why should the pour copper not arbitrary large? don't really understand about it. Thank you!
Thanks! This is mainly for the switch node for two reasons. One is manufacturability (copper imbalances either side of components), and the other is a large pour in combination with a close ground plane on the adjacent layer creates 'unnecessary' capacitance. The SW node is high-frequency and shouldn't be capacitavely loaded more than it needs to be.
The way to think about it is that on the output side of the inductor you already have huge caps, so adding a touch more capacitance won't be noticeable. On the input side to the inductor you are trying to drive a PWM signal into the inductor. If you add a copper pour there, you create a small capacitor which blunts off the square edges of the PWM. The inductor doesn't care, but the energy contained in those edges is being shunted into the ground plane and this is an EMI risk. So on the input side you really want a trace that is as short as possible and only wide enough to comfortably handle the peak inductor current. A 0.3mm trace in 1oz copper will handle 1A which for many microcontroller boards is way more than peak inductor current. It's interesting to consider the return paths for each leg of each loop ... It may be that some use of L1 GND copper could reduce the loop areas. It may also be that the GND via inductance causes a bit of ripple at the IC GND pin which in turn 'modulates' the voltage on the FB pin and creates noise in the output. Again there may be no practical way to avoid this and it almost certainly doesn't matter!
Looking forward to the measurement results. I see that the regulator you picked has a second transistor in the place of the diode. I've found that in this usually helps a lot too.
I also read somewhere that they would do a separate AGND copper pour for the fast switching loops, and then stitch it to the ground plain. I don't understand too much about the reasoning behind that though. Would be great if you can explain this in a follow up video ( if I'm making any sense to you at all, 😅 ). Thanks!
One of these sent a frequency signal to a satellite during hibernating in Balanced mode. It did it only once, and the laptop was offline. After the signal, the battery balancing started, and the 2:30 long charging.
What do you think about carrying the FB signal from the 3rd layer (below the reference ground plane), so that it takes a shorter path to the feedback resistor network?
For quick prototypes it would be a huge time saver if circuits and corresponding layouts were pre packaged as single components. Especially if a domain expert designed them. Can you share any ways you could do something like that in Altium and KiCad?
Absolutely fantastic channel! I’ve been wanting to do electronics for such a long time and finally I discovered your channel. It’s the perfect level for me as a MSc in computer science. Your approach of going from idea, through circuit design, then PCB layout and finally manufacturing is the secret sauce! And so many “tricks of the trade” and best practices sprinkled throughout. I’m inspired to finally get my hands dirty! Is there a discord or forum somewhere for the viewer community? Or a patreon?
Thanks a million for your effort on delivering great content Phil. Could you please help me with a question, what is the purpose of bypassing the VBUS LC filter through JP1? I'm working on a small power supply board based on IT TPS61087DSCR DC-DC converter and I put a mini USB port so, according to USB 2.0 specification the input capacitor cannot exceed 10uF for limiting the inrush current when powering electronics from the USB port and IT recommends using 22uF for the DC-DC converter input capacitance and, furthermore, you have around 44uF of total input capacitance in your design. That's why I don't understand why you are bypassing the LC filter because as long as I've read it's critical to make sure not to exceed those 10uF of total input capacitance for the USB standard. I strongly appreciate your help!
I am so jealous of this content, always wanted to try different layouts to compare them. Scott Nance and all the guys at optimum design associates have like 20+ years or experience. I think Scott got 36years. lol You should contact him and do a collaboration video with him to discuss.
TI for their 56320X regulators stress not to have ground under the IC to avoid ground current generated fields or pickup. How do you view this? Do the input and output capacitors also benefit from not having ground below them as TI seems to show on their PCB example?
Didn't understand why prefer ceramic caps for the output. They can be noisy both acousticly and electrically speaking. Isn't it better to use electrolytic ones instead? In audio applications or whenever you need voltage stability should we always prefer electrolytic caps?
Hi bro, it's actually the opposite, ceramic caps are highly recommended for high frequency applications, electrolytic caps are not a good idea in those scenarios. I'm working on a small SMPS board based on IT's TPS61087DSCR DC-DC converter and if you carefully read the datasheet this is what the manufacturer says about input and output caps selection: 8.2.2.5 Input Capacitor Selection For good input voltage filtering low ESR ceramic capacitors are recommended. TPS61087 has an analog input IN. Therefore, a 1-μF bypass is highly recommended as close as possible to the IC from IN to GND. Two 10-μF (or one 22-μF) ceramic input capacitors are sufficient for most of the applications. For better input voltage filtering this value can be increased. See Table 6 and typical applications for input capacitor recommendation. 8.2.2.6 Output Capacitor Selection For best output voltage filtering a low ESR output capacitor like ceramic capacitor is recommended. Four 10-μF ceramic output capacitors (or two-22 μF) work for most of the applications. Higher capacitor values can be used to improve the load transient response. See Table 6 for the selection of the output capacitor. Table 6. Rectifier Input and Output Capacitor Selection CAPACITOR/SIZE VOLTAGE RATING SUPPLIER COMPONENT CODE CIN 22 μF/1206 16 V Taiyo Yuden EMK316 BJ 226ML IN bypass 1 μF/0603 16 V Taiyo Yuden EMK107 BJ 105KA COUT 10 μF/1206 25 V Taiyo Yuden TMK316 BJ 106KL
Amazing video as always, Phil! I was wondering if you could make a video on switching controller designs with external switches and diodes since it has more components and thus more parameters to keep in mind. Would be really interested to see a guide on that topic!
Cool, this will be interesting to follow! I was just looking into via placement relative to pads; do you have any resources on the recommend distance between e.g. a 0603 resistor and a via? I understand the via should not be inside the pad as it can wig/suck solder away and too far away is of course bad for keeping low inductance path (for EMI and so on).
Highly informative, thanks! I'm curious why taxes need to be no wider than required to handle the current? Because I route with minimum required, then if I have space (gaps between traces), I'll wooden some traces.
Thanks for the great video! What could you advise, if I would like to design for my home usage only, and I can’t do two layers at home, only one the top one? So I can’t deal with vias and a separate ground layer. Would it work acceptably if I just made a ground fill on the top?
Question for anyone that knows: Why is increased capacitance undesirable in the switching node (as stated in 19:24). Wouldn’t it result in slower rise times and thus less high frequency noise?
Know this is a bit late probably but for others like me view this 6 months later thought I'd answer. You want fast rise time so the inductor can charge up to your output voltage before the output sags from the output caps discharging. Additionally the longer the switching element is on the more heat your controller has to handle as well.
Great video, definitely will help when laying out the next switching regulator! Just one question: If you'd have a power plane connected to the regulator output, would it be ok to connect the feedback network directly to the plane with a via, or is a trace to the output capacitor preferable?
For hand soldering I've had no problems at all putting vias in pads, and for space constrained designs it helps. I have a boost converter that fits on a 12mm smd inductor like a hat. Is there any other reason besides soldering issues for not putting vias in pads? Also, is it better in general to have one larger via, or multiple smaller vias?
Hi very good and informative video, much appreciated Phil! I cannot seem to locate a follow up video with test results, is it available or is it still in the pipeline? Cheers
Is there any reason why you would use an N-channel, rather than a P-channel MOSFET as the switching element? Wouldn't an N-channel MOSFET require a gate voltage of V_s + V_g(th) in order to switch on?
Why is a switching controller better for emi? Surely the compactness of a switching regulator with internal mosfets would have smaller loops and better emi performance?
Excellent video! Would the buck converter work if you would place a capacitance multiplier in series with the inductor and before the feedback resistor network? What comes to mind is that, if you are using a BJT or a Darlington the feedback network should compensate for the voltage drop. As a result you would get a much cleaner output voltage, right?
Hello, why capacitors are that big? Why not the same package as resistors? Sorry for my maybe stupid question but i am newbie and i dont find any info how to choice capacitors.... Thanks for answer.
Hi, when choosing any DC-DC converter for your application, make sure to read the recommendations given by the manufacturer in the datasheets, there you will find typical applications as well as recommended PCB layouts and input-output capacitors and inductors according to your needs.
Just when I'm about to design a regulator circuit, a comprehensive design guide is waiting for me :) How would you design a board that needs more than one regulator? for example: If I got a 12V supply and multiple ICs with 3.3V, 1.0V and 1.2V etc. Is it best to step it down to 3V or 5V and then distribute it further or should every power rail have its dedicated regulator fed from the supply voltage? Best Fabian
Glad to hear this has been helpful :) It depends. If you have high current requirements for each rail, typically, step-down regulators are more efficient when stepping down from a higher voltage (thus, requiring a lower duty cycle). Therefore, you should then have separate switchers for each rail. If you only need low current supplies, e.g. for 1V annd 1V2, then step-down to 3V3 from 12V using a switcher, and follow that by two LDOs to 1V and 1V2.
I really like these layout examples and welcome more!! Q: Is EMI related to signal integrity or in this case ripple rejection? I mean in audio we don't worry much about EMI due to freq. but care a lot about SNR. Do the same rules of prioritising loop area work beneficiary? E.g. Power amp with input buffer opamps. Would you split a ground plane to keep high and low currents separate, even if it results in larger loop??
Hi Phil interesting video as always but would it be possible to save the pcb and schematics in ascii format rather than the default binary format. I own Orcad 17.4 professional which can read altium files but only in the ascii format Looking forward to the next video
Hi sir, I want to have 5V upto 5A, I am using lm2596 2 in parallel...but when I apply voltage higher than 18v it starts to shut off and can't provide the continuous power. Please help me. My source is 24VDC
great job phil! does making output caps' gnd pads thermal relieved matter regarding emi/emc ? if you teach the topics in this style in your courses, probably you will bestseller.
Hey Phil, I checked the board with a tem cell and to be honest the difference between both smps seemed to be very comparable. Curious if you found some interesting differences.
Every video of yours is an absolute delight. Thank you for taking the time and effort to share your knowledge!
Thank you very much, Garret! You're very welcome and thanks for watching.
Exactly. When a new video drops, I feel like I'm getting the best of technical youtube. Such curated content.
I just joined the patreon.
A year or so ago I was tasked with designing a basic boost converter as part of my studies. It worked, but I'm throughout the video I've definitely spotted many things I could've done better.
Thank you for making such thorough videos while still keeping it enternaining.
Thank you for watching, Siegmund!
I've started watching your videos about 4 year's ago and I think the way you've addressed the gap in the market is brilliant. The quality of your work is excellent 👌
You are my 5-star on my successful design/build journey; thanks very much. On my recent design I used a Ricoh RP605 switch in a low power RF design. I learned a lesson: Its a DFN package and found that with hotpad or airgun soldering its really difficult to ensure that the chip centers itself properly because the big (relatively) thermal ground pad in the middle is so close to the edge connections. The fix required a 2nd revision of the board with a slightly smaller ground pad. My lesson: beware of accepting the stock pad layout!
Thanks, Peter! Glad to hear you fixed the "issue" in your 2nd revision.
I noticed the solderpaste screen for a QFN32 had four smaller paste rectangles, rather than the entire exposed pad area. Limiting the amount of solderpaste is probably more important on blind packages than exposed lead
Very useful video. Last days I've designed LED driver and these tips helps me understand why pcb layout is so important and possibility for new revision :) Thank you!
Great video.
Really appreciated the structure:
Overview -> Theory -> Design principles -> Step by step implementation with well explained reasoning
Thanks and I look forward to watching more of your videos.
Subscribed
Phil, brother, never consider number of views of your videos as a benchmark for the quality of your content. You don't need any validation brother, your content is EXTRA ORDINARY. and keep up the good work...
All the best wishes for you.......
Thank you very much :)
Phil your videos are so good! I’ve implemented a few buck regulators myself but I still watched every second of this start to finish.
Looking forward to seeing the comparison between ideal and non-ideal layouts 😄
Thank you very much, Matthew :)
TI has a wonderful application note on this topic, same points were stressed there too.. like keeping the switching node area as least as possible..
Can you please share the link of the same here.. much thanks!!
@@vatsan2483 I think it's this one
www.ti.com/lit/an/slyt614/slyt614.pdf?ts=1649389447631
www.ti.com/lit/an/snva054c/snva054c.pdf
However, I don't know the accuracy of their recommendations against EMC standards testing.
Facs
Today, I attended Rick Hartley's class on SMPS design and layout and came back to this video to nitpick. Unfortunately (for me) this video is excellent. You highlighted the important points elegantly and pointed out the critical loops. You also did a terrific job at laying out this regulator especially considering its terrible pinout. Goodness sake! The switching node is adjacent to the input node!
Rick mentioned that extra care must be paid to regulators with built-in parts such as the switch and the diode because we have no idea about the IC's inner layout. We could layout a regulator superbly and it would still radiate or be noisy because the IC itself is designed terribly. He also says that if the regulator's datasheet instructs you to put a snubber circuit, leave it and find another regulator that was designed properly.
Good video, it exactly indicates how we make a good layout on an regulator as long as we understand where the high di/dt, and dv/dt loop exist.
Phil, each video gets better and better. Quality time watching them mate
Thank you for making this video. It is very helpful. I made a switching regulator circuit similar to this one in EasyEDA, but since I'm just an amateur, I had no idea if I was doing it correctly. Your video has helped me to verify that my design choices are mostly correct. I also would love to learn about thermal management of PCB with regards to switching regulators. In my design, the switching regulator is designed to have max 3A continuous current. However, I was only able to feed 3A for about 2 minutes before hitting thermal shut off. The PCB, inductor, switching regulators were very hot after that. Would love to learn more about how to fix this kind of issues.
Very informative. Thank you Sir. I'm currently developing a 12V - 300V flyback and your info is most helpful.
Glad to hear that, thank you!
Im going to do my first switcher layout this week, perfect timing
Awesome, hope that goes well :)
Brilliant sir, your videos must reach at highest level ana also every videos tells something more valuable in pcb design
Thank you, Mursal :)
Thanks. Great video. I always have so much trouble getting my buck regulators correctly laid out !
Thank you - hopefully this'll help!
@@PhilsLab absolutely it does! It may be the topic for another video but expanding a bit to include some best practices on how you select the correct components to meet a specific design. e.g. a buck converter that's needs to output 5V @3A?
Kudos Phil, your content is superb, every video is a must watch for any design engineer
Thank you very much, Phil!
Great video! Would be great if you have time to do the follow up videos you were talking about here (using near-field probes to test the different designs). Very much looking forward to that!
Brilliant idea for a series! Looking forward to seeing the next videos using probes. Would be really interested about how big an impact EMI shields/ cans make to radiated interference!
I loved this video! I'm always a bit uncertain when it comes to power design on my PCBs and I typically use LDOs, but after watching this I might try out a buck converter instead for better efficiency.
Thank you, Maxime! Definitely give a buck layout a try in your next design :)
Thanks for the video. Now I finally know how the reference design in the datasheet suggests such a similar layout.
Thanks for watching :)
Everything I needed to know plus more. Excellent vid, thanks for the effort!
Guten morgen Phil,
As usual a great video.
I'll use your ideas not on a pcb but using on free wiring application
Keep up your great content
Guten Abend :) Thank you, glad to hear this'll find applications elsewhere as well :)
Really helpful, thanks. I was surprised you didn't widen the track after adding thermal reliefs at 20:12, because this reduced the effective track width significantly. Would this have been a good idea? Thanks!
I have a stupid question. I am not sure how thick the PCB you use ( probably 1.57 mm) is, but will it not be better to get the ground plane on top of the PCB and keep it more than 1.57 mm away from the power plane. I know that will increase the size of PCB, but the buck convertor will be less susceptible to noise.
Thanks for an excellent video, Phil. Looks like I'll be re-routing my PCB yet again :) Looking forward to see the difference in EMI that the spectrum analyzer shows.
Thanks a lot, Simon! :)
At 20:00, wouldn't those thermal reliefs impact on the current carrying path from the switching IC to the inductor? It seems the thick pour/polygon you ran there becomes seriously reduced due to those air gaps making up the thermal relief.
Thanks Phil! Any chance on a video on AC to DC switched-mode power supplies?
Very nice and detail video! Would you please explain more about why should the pour copper not arbitrary large? don't really understand about it. Thank you!
Thanks! This is mainly for the switch node for two reasons. One is manufacturability (copper imbalances either side of components), and the other is a large pour in combination with a close ground plane on the adjacent layer creates 'unnecessary' capacitance. The SW node is high-frequency and shouldn't be capacitavely loaded more than it needs to be.
The way to think about it is that on the output side of the inductor you already have huge caps, so adding a touch more capacitance won't be noticeable.
On the input side to the inductor you are trying to drive a PWM signal into the inductor. If you add a copper pour there, you create a small capacitor which blunts off the square edges of the PWM.
The inductor doesn't care, but the energy contained in those edges is being shunted into the ground plane and this is an EMI risk.
So on the input side you really want a trace that is as short as possible and only wide enough to comfortably handle the peak inductor current. A 0.3mm trace in 1oz copper will handle 1A which for many microcontroller boards is way more than peak inductor current.
It's interesting to consider the return paths for each leg of each loop ... It may be that some use of L1 GND copper could reduce the loop areas. It may also be that the GND via inductance causes a bit of ripple at the IC GND pin which in turn 'modulates' the voltage on the FB pin and creates noise in the output. Again there may be no practical way to avoid this and it almost certainly doesn't matter!
I am glad to see im not the only person who usually has about 10 projects open at all times in Altium
Yeah, don't think that'll ever change..
Looking forward to the measurement results. I see that the regulator you picked has a second transistor in the place of the diode. I've found that in this usually helps a lot too.
Thanks, Roel. Yeah, synchronous rectifiers are typically more efficient.
Great vid. Thank you! Looking forward to see the comparison in the next videos.
I also read somewhere that they would do a separate AGND copper pour for the fast switching loops, and then stitch it to the ground plain. I don't understand too much about the reasoning behind that though. Would be great if you can explain this in a follow up video ( if I'm making any sense to you at all, 😅 ). Thanks!
One of these sent a frequency signal to a satellite during hibernating in Balanced mode. It did it only once, and the laptop was offline. After the signal, the battery balancing started, and the 2:30 long charging.
What do you think about carrying the FB signal from the 3rd layer (below the reference ground plane), so that it takes a shorter path to the feedback resistor network?
Thanks for your videos Phil!
Thanks for watching, Andrew!
As the other videos: clear explanation and keeps interesting
Thanks, Remy.
Thank you Phil for another wonderful video!
Thanks for watching, Johan!
For quick prototypes it would be a huge time saver if circuits and corresponding layouts were pre packaged as single components. Especially if a domain expert designed them. Can you share any ways you could do something like that in Altium and KiCad?
You can just make badtardized footprints. I wish you could easily nest multiple pcbnew files in kicad :(
Really exciting stuff! Thanks for this excellent content!
Did you ever do a follow up video with the EMI testing? Couldn't seem to find one. Love the video!
Great vid. Thank you! please consider reviewing the high power (High Current, High voltage) SMPS Layouts too
Thanks - yes, that's on my list of videos to come!
Great video, I do prefer the TI parts due to the pinouts of the smps regulator and inducto placement.
I have one doubt. Will the thermal relief provided for the capacitor at output pin affect the current requirement as its making the trace thin?
Absolutely fantastic channel! I’ve been wanting to do electronics for such a long time and finally I discovered your channel. It’s the perfect level for me as a MSc in computer science. Your approach of going from idea, through circuit design, then PCB layout and finally manufacturing is the secret sauce! And so many “tricks of the trade” and best practices sprinkled throughout.
I’m inspired to finally get my hands dirty!
Is there a discord or forum somewhere for the viewer community? Or a patreon?
I just bought your Udemy course! :)
Thanks a million for your effort on delivering great content Phil. Could you please help me with a question, what is the purpose of bypassing the VBUS LC filter through JP1? I'm working on a small power supply board based on IT TPS61087DSCR DC-DC converter and I put a mini USB port so, according to USB 2.0 specification the input capacitor cannot exceed 10uF for limiting the inrush current when powering electronics from the USB port and IT recommends using 22uF for the DC-DC converter input capacitance and, furthermore, you have around 44uF of total input capacitance in your design. That's why I don't understand why you are bypassing the LC filter because as long as I've read it's critical to make sure not to exceed those 10uF of total input capacitance for the USB standard.
I strongly appreciate your help!
Hi Phil, is the follow-up video removed? I can't find it.. I would like to see the actual measurements between a good and bad layout.
I am so jealous of this content, always wanted to try different layouts to compare them. Scott Nance and all the guys at optimum design associates have like 20+ years or experience. I think Scott got 36years. lol You should contact him and do a collaboration video with him to discuss.
Amazing, super educational video!
TI for their 56320X regulators stress not to have ground under the IC to avoid ground current generated fields or pickup. How do you view this? Do the input and output capacitors also benefit from not having ground below them as TI seems to show on their PCB example?
Didn't understand why prefer ceramic caps for the output. They can be noisy both acousticly and electrically speaking. Isn't it better to use electrolytic ones instead? In audio applications or whenever you need voltage stability should we always prefer electrolytic caps?
Hi bro, it's actually the opposite, ceramic caps are highly recommended for high frequency applications, electrolytic caps are not a good idea in those scenarios. I'm working on a small SMPS board based on IT's TPS61087DSCR DC-DC converter and if you carefully read the datasheet this is what the manufacturer says about input and output caps selection:
8.2.2.5 Input Capacitor Selection
For good input voltage filtering low ESR ceramic capacitors are recommended. TPS61087 has an analog input
IN. Therefore, a 1-μF bypass is highly recommended as close as possible to the IC from IN to GND.
Two 10-μF (or one 22-μF) ceramic input capacitors are sufficient for most of the applications. For better input
voltage filtering this value can be increased. See Table 6 and typical applications for input capacitor
recommendation.
8.2.2.6 Output Capacitor Selection
For best output voltage filtering a low ESR output capacitor like ceramic capacitor is recommended. Four 10-μF
ceramic output capacitors (or two-22 μF) work for most of the applications. Higher capacitor values can be used
to improve the load transient response. See Table 6 for the selection of the output capacitor.
Table 6. Rectifier Input and Output Capacitor Selection
CAPACITOR/SIZE VOLTAGE RATING SUPPLIER COMPONENT CODE
CIN 22 μF/1206 16 V Taiyo Yuden EMK316 BJ 226ML
IN bypass 1 μF/0603 16 V Taiyo Yuden EMK107 BJ 105KA
COUT 10 μF/1206 25 V Taiyo Yuden TMK316 BJ 106KL
Interesting and well explained, as always.
Thank you very much!
Amazing video as always, Phil! I was wondering if you could make a video on switching controller designs with external switches and diodes since it has more components and thus more parameters to keep in mind. Would be really interested to see a guide on that topic!
Thank you! Yes, definitely would like to show some more complicated converter designs in future videos.
Excellent as always
Thank you, Dean!
Great job! Wondering if it's possible to show/analysis capabilities of this circuit maybe current under load in next video?
Thanks, Tommy! Yes, will be looking at the EM signatures and performance under load in future videos.
Thanks so much nicely explained.
You earned a new subscriber
Cool, this will be interesting to follow! I was just looking into via placement relative to pads; do you have any resources on the recommend distance between e.g. a 0603 resistor and a via? I understand the via should not be inside the pad as it can wig/suck solder away and too far away is of course bad for keeping low inductance path (for EMI and so on).
Highly informative, thanks! I'm curious why taxes need to be no wider than required to handle the current? Because I route with minimum required, then if I have space (gaps between traces), I'll wooden some traces.
Thanks for the great video!
What could you advise, if I would like to design for my home usage only, and I can’t do two layers at home, only one the top one?
So I can’t deal with vias and a separate ground layer.
Would it work acceptably if I just made a ground fill on the top?
Good tutorial, keep going!
Hi, first of all thank you. My question is : Why the first layer is not pour with power plane but only traces?
Question for anyone that knows: Why is increased capacitance undesirable in the switching node (as stated in 19:24). Wouldn’t it result in slower rise times and thus less high frequency noise?
Know this is a bit late probably but for others like me view this 6 months later thought I'd answer. You want fast rise time so the inductor can charge up to your output voltage before the output sags from the output caps discharging. Additionally the longer the switching element is on the more heat your controller has to handle as well.
Great video!
why didn't you fill your top layer with extra ground planes (stiched with vias)?
Thank you for another awesome video!
Thanks for watching, Alexandros!
What size of input and output capacitors are you using ?
Do you have some video presenting emc comparison of this circuits?
Waiting for some of your STM32 videos in future
Great video, definitely will help when laying out the next switching regulator! Just one question: If you'd have a power plane connected to the regulator output, would it be ok to connect the feedback network directly to the plane with a via, or is a trace to the output capacitor preferable?
For hand soldering I've had no problems at all putting vias in pads, and for space constrained designs it helps. I have a boost converter that fits on a 12mm smd inductor like a hat. Is there any other reason besides soldering issues for not putting vias in pads? Also, is it better in general to have one larger via, or multiple smaller vias?
Hi very good and informative video, much appreciated Phil! I cannot seem to locate a follow up video with test results, is it available or is it still in the pipeline? Cheers
Is there any reason why you would use an N-channel, rather than a P-channel MOSFET as the switching element? Wouldn't an N-channel MOSFET require a gate voltage of V_s + V_g(th) in order to switch on?
Why is a switching controller better for emi? Surely the compactness of a switching regulator with internal mosfets would have smaller loops and better emi performance?
Excellent video! Would the buck converter work if you would place a capacitance multiplier in series with the inductor and before the feedback resistor network? What comes to mind is that, if you are using a BJT or a Darlington the feedback network should compensate for the voltage drop. As a result you would get a much cleaner output voltage, right?
great video (as always :D)
Thank you!
Hello, why capacitors are that big? Why not the same package as resistors? Sorry for my maybe stupid question but i am newbie and i dont find any info how to choice capacitors.... Thanks for answer.
Hi, when choosing any DC-DC converter for your application, make sure to read the recommendations given by the manufacturer in the datasheets, there you will find typical applications as well as recommended PCB layouts and input-output capacitors and inductors according to your needs.
Thank you for this informative video 😃.
Thank you for watching, Vishal :)
Many thanks for this video - this is really useful! ❤
Thank you for watching!
U r under rated
Very professional tutorial.... thank you
Wonderful! Question though, Why do you use two output caps instead of one?
Possibly for filtering harmonics...
Would ferrite beads help reduce noise? What about shields?
Hello, are you using X5R or X7R capacitors for power supply filtering?
Can you do the most "bulletproof" GaN based high power charger or inverter? I'm keen to see GaN being used at the design level
Just when I'm about to design a regulator circuit, a comprehensive design guide is waiting for me :) How would you design a board that needs more than one regulator? for example: If I got a 12V supply and multiple ICs with 3.3V, 1.0V and 1.2V etc. Is it best to step it down to 3V or 5V and then distribute it further or should every power rail have its dedicated regulator fed from the supply voltage? Best Fabian
Glad to hear this has been helpful :) It depends. If you have high current requirements for each rail, typically, step-down regulators are more efficient when stepping down from a higher voltage (thus, requiring a lower duty cycle). Therefore, you should then have separate switchers for each rail.
If you only need low current supplies, e.g. for 1V annd 1V2, then step-down to 3V3 from 12V using a switcher, and follow that by two LDOs to 1V and 1V2.
Hey @phil's Lab the video is incomplete right? You didn't show us the test results of the PCB which you have made .
It’s coming in a future video if I didn’t misunderstand. :)
How did you come up with the physical sizes of the input and output capacitors?
I really like these layout examples and welcome more!! Q: Is EMI related to signal integrity or in this case ripple rejection?
I mean in audio we don't worry much about EMI due to freq. but care a lot about SNR. Do the same rules of prioritising loop area work beneficiary? E.g. Power amp with input buffer opamps. Would you split a ground plane to keep high and low currents separate, even if it results in larger loop??
What should I do if my app note calls for two different grounds?
great video
Thank you, Mesbah.
would love to test altium designer, as soon as it works on linux and mac.
Hm when I try to use a polygon some areas don't get filled well
What am I possibly doing wrong? 😅
Hi Phil interesting video as always but would it be possible to save the pcb and schematics in ascii format rather than the default binary format. I own Orcad 17.4 professional which can read altium files but only in the ascii format Looking forward to the next video
Would you consider designing using Circuit Maker?
Hi sir, I want to have 5V upto 5A, I am using lm2596 2 in parallel...but when I apply voltage higher than 18v it starts to shut off and can't provide the continuous power.
Please help me. My source is 24VDC
great job phil!
does making output caps' gnd pads thermal relieved matter regarding emi/emc ?
if you teach the topics in this style in your courses, probably you will bestseller.
Please do do the follow up.
We did he add several holes/vias all throughout the pcb in the final design?
Do a search for Robert Feranec How GND VIAs improve Your PCB Layout
Hey Phil,
I checked the board with a tem cell and to be honest the difference between both smps seemed to be very comparable. Curious if you found some interesting differences.