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Clock stretching i have doubt if master is controlling clock how slave can make it active low What i believe on wait/receive clock, Slave will send zero to master on SDA line for ready. Please correct me if i am wrong
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Sir g very beautifully explained concept of i2c. How can we write/read data to/from a certain memory location of slave device? In the given Formate , address of memory location inside slave device is not mentioned, only slave address is defined
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Thank you for your video. but in timing diagram Start bit there is flaw SCL should high then SDA High to Low consider as Start bit I think. Please correct me if I am wrong.
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Are you sure master acknowledgement is 1? Also after the address the acknowledgement comes from slave or master? Isn't it supposed to be the master is ready to receive the data instead of slave is ready to to sending the data?
Sir, start bit has to have SCL on high and SDA on low right? and stop bit will be when SDA is pulled to high when SCL is high right sir? pls correct me if im wrong.
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Thank you sir your are explaining very well and perfect speed your doing very well . People are like you are real hero of our nation
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wow, excellent work sir. thank you & bravo
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Let me give the details of few exiting features of Engineering Funda:
1. All the subjects playlist of Engineering Funda is available in comment section.
2. Detailed Syllabus of subject along with chapters is given description of videos.
You are doing great things sir! I just found you channel today and just subscribed 🙂
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very good content and explaination
Good explanation thank you sir
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Ypu are amazing
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Clock stretching
i have doubt if master is controlling clock how slave can make it active low
What i believe on wait/receive clock,
Slave will send zero to master on SDA line for ready.
Please correct me if i am wrong
Your really great sir 💯❤
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One more query as you said slave address is 6C what is the data
Why difference of 7 bit slave address and 8 bit data from slave
very nice content
very usefull for vlsi
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Superb explanation 🎉
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Sir g very beautifully explained concept of i2c.
How can we write/read data to/from a certain memory location of slave device? In the given Formate , address of memory location inside slave device is not mentioned, only slave address is defined
Usually Complier Manages it
thank you sir
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Great videos sir. Keep up the Good work.
At 10:52 the stop bit is 1 I am assuming. Please correct me if I am wrong.
It is perfectly correct dear
Thank you for your video. but in timing diagram Start bit there is flaw
SCL should high then SDA High to Low consider as Start bit I think. Please correct me if I am wrong.
It is perfectly correct here.
pls make more such viedos sir
Thank you sir benefited
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impressive
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Sir, make video on CAN and LIN PROTOCOLS
Nice
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Are you sure master acknowledgement is 1? Also after the address the acknowledgement comes from slave or master? Isn't it supposed to be the master is ready to receive the data instead of slave is ready to to sending the data?
Yup
Sir, start bit has to have SCL on high and SDA on low right?
and stop bit will be when SDA is pulled to high when SCL is high right sir? pls correct me if im wrong.
It is already explained in the video.
You are right bro
Sir why 7 bit slave address it's 8 bit data D0 to D7 means 8 bit
Sir where can we get the notes of this lecture?
It can be accessed from my Android Application Engineering funda.
Sir aap nahi hote to mai fail ho jaata
Thank you sir 😊
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@@EngineeringFunda hamari puri college aapke playlist ke sahare hi chal rha hai sir 🙏🏻
Can you tell please how can we estimate the capacitance available on the I2C bus?
It depends on width of line and pcb thickness
Because you have 7 bit that why 2 to the power 7 is equal to 128
I2C frame format?
How are 128 devices able to connect!! Could you please explain
Because for addressing it has 7 bits so 2^7=128 devices
@@Chitti172 thank you
"Explain to you"
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