Understanding I2C

Поділитися
Вставка
  • Опубліковано 25 січ 2025

КОМЕНТАРІ • 96

  • @miguelcaldeirinha5316
    @miguelcaldeirinha5316 9 місяців тому +62

    I am currently doing my master in eletronic Engineering and by far this is the best explanation i have found in the internet, very complete and easy to understand. Congrats

  • @evertonf.dossantos4511
    @evertonf.dossantos4511 Рік тому +16

    Thank you! This is the best explanation I've found in YT.

  • @BeginnerMoto
    @BeginnerMoto 4 місяці тому +7

    I'm a beginner to all this EE stuff but I've dabbled for years. I've seen I2C thrown around a lot but I didn't understand what it meant. Your video helped me immensely. You earned a like and subscribe from me!

  • @Annie_EE
    @Annie_EE Рік тому +15

    This video saved me so much time - just the information I needed. Please make more!!!

    • @pauldenisowski
      @pauldenisowski Рік тому +2

      Thank you! There are already videos on UART and SPI, and some videos on automotive protocols are currently under development as well.

  • @andychess
    @andychess Рік тому +6

    Super video. Just the right length and depth of content. Thank you!

  • @shizudaren
    @shizudaren 8 місяців тому +5

    As a Communication and networking student, I can confirm that this is exactly what I learn in my 1 hour lecture

  • @salarbasiri5959
    @salarbasiri5959 Рік тому +4

    This is by far the best explaination

  • @eitantal726
    @eitantal726 Рік тому +3

    9:52 detail about modes & speed: Clock stretching. If it wants to, during transfer the slave is allowed to hold the clock line low. The master has to wait until the clock line is released. The slave can effectively slow down the speed

    • @pauldenisowski
      @pauldenisowski Рік тому

      Yes - I originally had a few slides about clock stretching but took them out in the interest of time / brevity. Thanks!

  • @wormdamage
    @wormdamage 7 місяців тому +1

    That has got to be one of the best of these types of videos I've ever seen!

    • @pauldenisowski
      @pauldenisowski 7 місяців тому

      Thank you! I also have videos on UART, SPI, and SPMI :)

  • @nidhideshpande4292
    @nidhideshpande4292 3 місяці тому +1

    Best Explanation i have seen so far.

  • @souzasilvestre
    @souzasilvestre Рік тому +3

    best explanation in the web

  • @eitantal726
    @eitantal726 Рік тому +1

    7:47 note about open-drain terminology: Drain is actually plus (aka VDD). Source is ground (aka VSS). Open-drain means I can only connect to VSS, but not to VDD. so when he said a "logic that opens and closes a drain", he meant logic that can *open and close a source*.

  • @kz65g9
    @kz65g9 5 місяців тому +2

    Thank you much. Excellent refresher.

  • @hklausen
    @hklausen Рік тому +6

    Good presentation. It's all very clear.

  • @multitree7427
    @multitree7427 22 дні тому

    If MSB First, A6 of the slave address should be transmitted first at 3:25.

  • @tanmaygote7330
    @tanmaygote7330 5 місяців тому +1

    NGL!! Best Explaination Boss! Too Good!!!!

  • @pascalphase2556
    @pascalphase2556 8 місяців тому +1

    Very instructive vidéo ! Thank you from France...

  • @sawekky2392
    @sawekky2392 8 місяців тому +1

    I love this explanation. Thank you!

  • @brahmendrakumarpujala694
    @brahmendrakumarpujala694 Рік тому +1

    🎯 Key Takeaways for quick navigation:
    00:00 🌐 *Overview of I2C Protocol*
    - Brief introduction to I2C protocol.
    - I2C developed by Philips in 1982.
    - Purpose: Short-distance data communication using a synchronous Master-Slave protocol.
    01:12 🔄 *I2C Topology and Connection*
    - I2C topology involves a master connected to slave nodes.
    - Two shared lines: SDA (Serial Data) and SCL (Serial Clock).
    - Connection details: Shared pull-up resistors, dynamic addition/removal of devices.
    01:40 📡 *I2C Frame Structure*
    - I2C frames initiated by start conditions.
    - Master sends slave address and read/write indication.
    - Frame ends with a stop condition, ensuring bus availability.
    03:49 ⏰ *Timing Relationship in I2C*
    - SDA transitions only during the clock's low phase.
    - Ensures unambiguous start and stop conditions.
    - Crucial for preventing contention in data transmission.
    05:02 🎭 *Read/Write Bit and Acknowledgment in I2C*
    - Read/write bit indicates the master's intention.
    - Acknowledge (ACK) bit confirms proper data reception.
    - NACK (Negative Acknowledge) signifies lack of acknowledgment.
    06:00 📊 *Data Transmission and Byte Handling*
    - Data sent in 8-bit bytes, MSB first.
    - Each byte individually acknowledged.
    - Stop condition indicates the end of the frame.
    07:38 🔗 *Role of Pull-Up Resistors in I2C*
    - Pull-up resistors maintain idle high state.
    - Open drain system ensures quick pull-down to ground.
    - Pull-up resistor values affect communication speed.
    09:19 🚀 *I2C Bus Speed Modes*
    - Various modes with corresponding achievable speeds.
    - High-speed and Ultra-fast modes modify standard I2C behavior.
    - Practical data rate influenced by pull-up resistors and bus capacitance.
    10:01 📝 *Summary of I2C Protocol*
    - I2C widely used for short-distance data exchange.
    - Master-slave communication through frames.
    - Pull-up resistors, open-drain, start/stop sequences are key elements.
    Made with HARPA AI

  • @neelakantannilakantanswami4031
    @neelakantannilakantanswami4031 10 місяців тому +1

    Thanks for the Video. This Video was very Useful.
    Can you post another i2c video Explaining about the Arbitration Process and Clock Stretching Concepts ?

    • @pauldenisowski
      @pauldenisowski 9 місяців тому

      I just had this discussion with someone at work yesterday and will probably do a follow-up deeper dive video later this year

  • @Chris-kc4cn
    @Chris-kc4cn 4 години тому

    So when the clock is low data cant be sent Right ?

  • @medoutzy1418
    @medoutzy1418 5 місяців тому +1

    valuable insights, thank you💡

  • @josefudoreyvu1711
    @josefudoreyvu1711 6 місяців тому +1

    You guys are godsend!!

  • @mums2109
    @mums2109 10 місяців тому +1

    Fantastic video!

  • @mevez3185
    @mevez3185 9 місяців тому +1

    Excellent work. Thanks for your video

  • @VIKAS-2003
    @VIKAS-2003 11 місяців тому +1

    Best explanation... Thanks!!

  • @AlbertSong-StupidForOneSec
    @AlbertSong-StupidForOneSec 2 місяці тому

    Dear friends, I'm a little confused in the page "Aside: timing relationship between SDA and SCL". As you mentioned in the former page, the SDA and SCL are both high in the begaining, but why in this page it shows starts with low?

  • @kvedavyas2010
    @kvedavyas2010 Рік тому +1

    Very good explanation.

  • @unlokia
    @unlokia 2 місяці тому

    Super! God bless you ☦️ thanks

  • @ВолодимирК-р6т
    @ВолодимирК-р6т 8 місяців тому +1

    Great explanation. Thanks!

  • @kakani7598
    @kakani7598 Рік тому +2

    Thank you for the excellent video. Could you share your slide?

    • @pauldenisowski
      @pauldenisowski Рік тому +1

      Thanks! We'll be publishing this same information in as a whitepaper / educational note as well.

  • @behnammadadnia3410
    @behnammadadnia3410 4 місяці тому +1

    Super useful, thanks

  • @Appregator
    @Appregator 5 місяців тому +1

    Brilliant - thanks !

  • @Ryan-qn1wr
    @Ryan-qn1wr 3 місяці тому

    Why are there two separate lines for the data bits? Are they high and low at the same time? How does that work?

    • @marcosmerino9369
      @marcosmerino9369 3 місяці тому

      the point is that clock must follow that structure but then data can be whatever is transmitted, so the protocol doesn't require some specific state

    • @raulr4721
      @raulr4721 3 місяці тому +1

      If you mean that SDA forms like hexagons, that is just to say "Bit, that can be either low or high", but in the diagram you don't know what is it. So you draw it as both, looking like 2 lines but is just one, once you define what number it is.
      And the other SCL its a clock, like a rythm that the data will follow to be in sync with eachother

  • @Anyonymns
    @Anyonymns 6 днів тому

    does anyone have notes of this?

  • @DanielGakpetor
    @DanielGakpetor 8 місяців тому +1

    thanks, this was so clutch

  • @technical5880
    @technical5880 7 місяців тому +1

    thank you, for the great job.

  • @sha_guns
    @sha_guns 7 місяців тому

    hi do you have any recommendation software to draw sda and scl frames?

  • @faizansheikh8976
    @faizansheikh8976 Місяць тому

    best explanation

  • @dylanbaird74
    @dylanbaird74 Рік тому +1

    dawg🐐🐐🐐🐐

  • @ZirJo
    @ZirJo Рік тому +1

    Excellent! Thank you

  • @arunbennett9248
    @arunbennett9248 Рік тому

    Can someone tell me how this ack bit works? As in the video it is set by the receiver. So, the sender send the data and the ack is set by the receiver at the end? If yes how it happens can anyone explain?

    • @andresbarrera515
      @andresbarrera515 Рік тому +2

      The sender sends the data, and the receiver responds to the received data with an ACK bit. Once the sender receives the ack bit, it continues sending the next byte, and waits again for the next ACK or NACK.

  • @kufirre
    @kufirre Рік тому +1

    Very good video

  • @GatoChupete
    @GatoChupete 8 місяців тому +1

    Ty 🐐

  • @ElectroWolf_Arts
    @ElectroWolf_Arts Рік тому

    im confused , lets take the example of a 16x2 LCD display with I2C module , the LCD have VCC, GND,V0, A and K pins which are the power and light, and there is the D0-D7, RW, RS AND E for typing the characters
    so how on earth can the I2C deal with the RW , RS and E signals while the 8 bit DATA are occupied for the D0-D7

    • @shuyuanliu9797
      @shuyuanliu9797 Рік тому +3

      That's a good question. 16x2 LCDs with the HD44780 controller chip (which is very common) can be configured to use a "4-bit mode" where only D4-D7 are used. In this mode, each data or command byte to the LCD is entered by sending two "half-bytes" in succession. This way D4-D7, RW, RS, E (and backlight control) can fit into 8 bits provided by the I2C I/O expander module. AFAIK, the LCDs with the PCF8574 I2C I/O expander all work this way.
      Even if this 4-bit mode didn't exist, you could choose a different I/O expander that provides more than 8 outputs. The PCF8574 happens to have only 8 outputs, so it uses the simplest protocol and just expects to be told the state of the 8 pins as a byte from I2C. However, for many other I2C I/O expanders especially those with more than 8 I/O lines, instead of just transferring a "plain" byte like that in each I2C frame, it expects commands telling it which pins to set high/low, which pins to set as inputs/outputs, etc. so that they are not limited to 8 I/O lines. An example of this is the TCA9539, a 16-bit I/O expander.

    • @ElectroWolf_Arts
      @ElectroWolf_Arts Рік тому +1

      @@shuyuanliu9797 thank god ,, sombody gived me a direct answer , its seems like 4 bit mode is the trick here , 00100000 to set that mode and since the D0-D3 are all zeros they can be ignored all the time ,now i can design the logic gate level circuit of that and compile it to FPGA ...... man you are a legend

  • @luca3976
    @luca3976 4 місяці тому

    Interesting fact about the ACK:
    If a master reads from a slave, it will not acknowledge the last data packet to signal the slave that transmission is done

  • @lowearthorbit-delio
    @lowearthorbit-delio 11 місяців тому +1

    Thank you .

  • @qwertz3813
    @qwertz3813 Рік тому +1

    Is not I2C multimaster?

    • @pauldenisowski
      @pauldenisowski Рік тому +2

      Good question. Yes, I2C allows any node to be the master: whichever node initiates the start condition becomes the master (see slide 5). Many I2C systems are however operated such that only one node is ever the master, but the protocol does allow for multimaster operation.

  • @7073shea
    @7073shea Рік тому +1

    Thank you!

  • @ClaudiaGarcia-qd2ms
    @ClaudiaGarcia-qd2ms 2 місяці тому

    Thank you so much

  • @bramlemmens6984
    @bramlemmens6984 Рік тому +1

    legend

  • @robertwatsonbath
    @robertwatsonbath Рік тому +1

    Nicely edited to remove the NXT reference. Thank you. You're welcome.

  • @pdielectronics
    @pdielectronics Місяць тому

    ❤❤❤

  • @haizhouz7627
    @haizhouz7627 3 місяці тому

    poggers

  • @LetsPumpItUp
    @LetsPumpItUp 5 місяців тому +2

    Someone didn’t get the memo that using master-slave terms are being phased out in favor of non-offensive terms like Initiator-Responder…just fyi…great information otherwise…thank you

    • @ibrahimhussain3248
      @ibrahimhussain3248 4 місяці тому +4

      It really doesn't matter in electronics

    • @theuglypizzachef
      @theuglypizzachef 3 місяці тому +1

      @@ibrahimhussain3248im offended someone is offended that it’s offensive to offend the offended.

  • @qemmm11
    @qemmm11 Рік тому +1

    I am New 🤔

  • @beastcracker117
    @beastcracker117 9 місяців тому +1

    Best video

  • @ahmadjaradat3011
    @ahmadjaradat3011 10 місяців тому +3

    Thank you! This is the best explanation I've found in YT.

    • @pauldenisowski
      @pauldenisowski 9 місяців тому

      Thanks - glad it was helpful! I have another serial protocol video coming in a few weeks

  • @erezlipelis
    @erezlipelis 26 днів тому

    Awesome video!