The timestamps for the different topics covered in the video: 0:17 What is Biasing? The basics of the Transistor Biasing 2:19 What is Q-point (operating point) and the variation in the Q-point due to temperature 5:40 Fixed Bias (Base Bias) Configuration 8:21 What is Load Line? 10:48 Effect of the change in the current gain (β) on the operating point in fixed bias configuration
At around 13:23, the lecturer plots the obtained value pair of 7.75V and 1.5 mA on the graph on the left side of the screen. However, the lines in sky blue color which represent Ib (the base current) should have been changed to reflect the change in beta value. The sky blue lines are still representing beta value of 100 rather than 50 which he just used for calculation. If they were to represent beta value of 50, they would have come down closer to the horizontal axis, and the dot ( 7.75 V , 1.5 mA) would be riding on Ib = 30 uA curve. Right now in the graph, dot ( 7.75V, 1.5 mA ) looks like it is riding on Ib = 10 uA curve, which is very wrong.
This is true. If this plot (13:23) represents the relationship between beta and Ic then when beta is halved from 100 to 50 then, keeping the ordinate scale the same, would compress the collector lines into the bottom half of the graph as, for each value of Ib, we would only have half the value of Ic. Similarly increasing the beta from 100 to 200 would expand the collector lines to twice it's exiting territory. Nevertheless the gist of the argument is sound. Namely that the fixed bias configuration is very sensitive to changes in beta.
Excellent. I did not discover until recently that transistors made by the same manufacturer within the same batch, often differ wildly from one another. Hence emphasis on finding matching pairs of transistors (a problem not faced by valves which tend to be virtually homogenous). Fascinating. Thank you.
Sir please explain..we can find operating point without condering load line by observing the active region of the experimental output graph then why we introduce load line what is the significance??
Buffers, Inverters, Gates, Latches, Toggle Flip Flops, and Data Flip Flops made with only SPDT Relays are a fun starting point for digital electronics since no resistance or voltage need be considered. All is mostly a switch being in one of two positions as controlled by an electromagnet being energized or unenergized. From there ICs can be substituted as needed as long as the rules for those ICs are followed.
(13:15) You have just calculated the new Ic using Ib= 30uA, so why the new operating point shifts to Ib=10uA line? Nevermind, I understood it by myself (I'm leaving the comment still for others benefit) In short, if you would plot the new curves of the β=50 transistor on top of the ones shown (for when β=100), the Ib lines for the new transistor would actually have 2x the Ib value. In other words, for the β=50 transistor the Ib=30uA line is further down and equivalent to the Ib=15uA line of the β=100 transistor (not the 10uA as drawn).
@@user-mj3ef So how ill the load line look like for Beta =200?? Since Ib is clearly not 30uA, I'm unable to get my head around it. Could you guys help with a rough image or something?
ALL ABOUT ELECTRONICS Does the AC/DC load line mean the maximum output wattage power of the transistor or does the AC/DC load line mean the power dissipation of the transistor? Because the AC/DC load line is selected by the EE designer of the operating voltage and operating current for the transistor and the DC bias Q point which will determine the maximum output wattage power out of the transistor and the power dissipation of the transistor. I'm not sure what the LOAD means in the AC load line and DC load line what they are calling the LOAD.
In nonlinear cct analysis the (nonlinear) electronic device is defined as the source; the biasing cct and the load resistor forms the load to the device. Refer to book by Belanger, Adler, and Rumin.
@13:25 with Beta=50 and Ib= 30 mA , Ic=1.5mA and Vce=7.75volt, why you have mapped Q point on Ib=10 micro Amp? Please explain why are we mapping the Q point on Ib = 10 micro Amp , and does this mean Ib will also change?
At 5:50 you say the AC voltage is applied BETWEEN the base and the emitter terminal. I don't see this in the circuit schematic. Can you please explain?
00:16 Basics of transistor biasing and its importance 02:12 The proper amplification depends on how well the BJT is biased in the active region. 03:56 The biasing point of a BJT affects its operation and stability. 05:50 The circuit can be redrawn and analyzed in DC 07:50 The operating point of the transistor is determined by the voltage Vce and the collector current Ic. 09:42 Operating point varies with changes in Vcc, Rc, Ib, temperature, and transistor replacement. 11:23 Beta affects the operating point of a transistor. 13:14 Transistor biasing and fixed bias configuration
Sir , in the last part You showed the change in the Operating Point due to change in Beta . For Beta 50 and 200 while calculating IC you considered IB = 30 microamps , but as the operating point changed the IB changed to 10 and 50 microamps . I cannot relate the two . IB is chosen to be 30 how can it change ????????
Good catch. The characteristic curves themselves (or at least the IB labels) needed to change along with the change in Beta. See also walkalone's comment below.
itu perbandingan saat transistor kita hitung dalam kondisi suhu stabil tetapi saat transistor dalam keadaan panas nilai hfe/beta juga berubah, alhasil kurva menunjukkan hasil yang berbeda juga dan tentu kita juga harus faham wilayah saturasi dan wilayah aktif transistor. itu menurut saya
Let me explain with some numbers. Let's say you have biased the BJT in a such a way that, VCE = 2V. And on top of that biasing voltage the output sinewave swings by +- 3V. That means on the positive side, it will go maximum up to 5V, while on the negative side, it will minimize to (+2 - 3) = -1V. But it won't be able to go below 0V. So, output voltage won't go below 0V. And for that portion where the output supposed to go below 0V, gets clipped. The same thing is represented graphically. If you observe, on the horizontal axis, the VCE is close to 0V. (Maybe around 1V or 2V) If the voltage swing is reduced, then the output signal won't clip. I hope it will clear your doubt.
What is being shown here ( the pink waveform) is the AC voltage VCE and current IC based on the input signal. The input signal will be applied between base and emitter. While the output will be available between collector and emitter.
@@ismail.eee18bsmrstu Both waveforms are the output waveforms. Its is Ic Vs VCE curve. You will get these two waveforms based on the input waveform applied between base and emitter. The input waveform is not shown over here.
In the given circuit, we have only positive biasing voltage. That means your output voltage can swing between +Vcc and 0V. It can't go below that. If the circuit consist of both positive and negative supplies, then it may go below 0V (depending on the input signal)
It depends on your operating current and voltage. You should select the values of resistors and hence the biasing in a such a way that, the Q point remains in the center of the curve.
09:00 when Uce=0, Ic=0 according to transistor output characteristics graph, but Ic=Vcc/Rc according to output loadline. Can anyone explain that to me?
Once the capacitor is fully charged then there is no flow of current through it, and therefore it acts like an open circuit. Therefore, for DC analysis, we can assume that, the capacitor is open circuit.
I think you are talking about the load line. See, the two extreme points of the load line does not represent the actual operating point. The load line is just drawn from the equation, Vce = Vcc - Ic*Rc. The actual operating point is the intersection of the load line and device curve. So, of course the Vce can't be zero. But as the BJT goes into the saturation, Vce reduces to 0.1V or 0.2V. And hence, Ic increases. (The left portion of the device curve)
@@ALLABOUTELECTRONICS ah yes thanks that does make a lot of sense but what I don't understand is how when Ib is 0 Ic is also 0 even though there is a Vcc and similarly when Vce goes near 0 the CB junction should get forward biased which should stop the electrons from flowing from base to collector meaning Ic to be 0 but instead it gets to maximum. Other than this I have understood everything from your incredible videos. Thanks A LOTTTTTT!
Consider any value of VCC and RC. Let's say, VCC = 10V and RC = 1KΩ. So, on the load line, Vce (max), the one end of load line on horizontal axis will be 10 V and ic ( max), the other end of load line will be 10 mA. That means, with the chosen values of VCC and RC, your operating point will be between two extremes. I hope, it will clear your doubt.
Here we are discussing about the DC biasing. On top of it there will be small ac input signal for amplification. But because of the dc biasing, the overall signal won't go below 0.7V. Or altleast that's how the biasing is done. If you go through the entire series on BJT then I have explained about large and small signal analysis. For more information, you can go through it.
Ficoiff FGH40N60SFD I’m looking for this component for A IGBT ZX7-200 welding machine . have had no luck finding maybe someone will ? High voltage high current
I have discussed that in the second video. (Emitter Bias and emitter Stabilized biasing) Please check that. Actually, there are a couple of parameters like β, Vbe and Reverse Saturation Current (Ico) which gets affected with temperature. For a while, during the discussion, it has been assumed that the Vbe and Ico are constant and only β changes with temperature. But in the upcoming videos, I will also cover the compensation techniques. (which may affect Vbe and Ico) But with some specific biasing configuration, it is possible to make an operating point almost independent of the variation β (due to temperature).
They are coupling capacitors. During the analysis it has been assumed that we have pure AC source, but actually sometimes the ac signal is the output of some other amplifier stage. ( And it might contain DC part as well). The capacitor blocks this DC part and only passes the ac signal to the circuit. The same is the case for the output side capacitor. ( To block DC biasing voltage overriding on top of the ac signal). I hope it will clear your doubt.
DC source is applied as it is. On top of it,the ac input signal is applied using the coupling capacitor. To get better idea,I would suggest you to go through videos onthe small signal model and small signal analysis of BJT. On the playlist of BJT, you will get those videos.
@@ALLABOUTELECTRONICS thank you, but I could not think of a possible explanation as we have for capacitors, at reasonable frequency impedance decreases but here we have something like a diode in between base and emitter .often base current is taken very low and if we compare to a diode at such current there is definitely a non zero resistance there and we are missing this in the expression of Ib at7:10
@@gulzarali6370 I recommend you to go through a video of the large-signal model of BJT. Please go through that video. Your doubts will get clear. Please check the BJT playlist on the channel. You will get that video. If you are not able to find the video, let me know.
Not necessarily. There has to have some fixed voltage. It could be VCC or some other fixed DC voltage. Usually to use a single supply, it is biased with VCC.
@@ALLABOUTELECTRONICS Oh i see, thanks for the swift reply! Need to fully understand this for my licensure exams. So a fixed bias is like a common emitter then?
Yes it is. Actually when we say common emitter configuration we are actually refering to the AC signal. That means the ac input signal is applied between the base and emitter while the output is measured between collector and emitter. But to use the BJT as an amplifier we need to bias it. ( We need to apply the DC voltage). There are many ways to bias it. And fixed bias is one of the way. I hope it will clear your doubt. If you go through all the videos on playlist, you will get it.
Sir, in this video you haven't explained how this fixed biasing actually helps in stabilizing the CE configuration in any way. Kindly provide that information also. Also, you could have explained about drawing the load line for those AC signals a little more clearly.
Just start applying KVL from the top. When there is a voltage drop, consider it as a negative voltage. Across the collector and emitter, there is a voltage drop as one goes from the top to bottom. That means it can be considered as negative in the KVL equation. The same is true for the voltage drop across the collector resistor.
Here Vcc is just show by a small dot. But if in doubt, then you can draw a Vcc with both positive and negative terminal. The positive terminal will be connected with Rc, while negative will get connected with ground. And then you can apply KVL in the loop.
ALL ABOUT ELECTRONICS thank you so much sir, Sir also could you please tell me the software or app that you are using to make videos, I want to do a math video like this. please do tell
The timestamps for the different topics covered in the video:
0:17 What is Biasing? The basics of the Transistor Biasing
2:19 What is Q-point (operating point) and the variation in the Q-point due to temperature
5:40 Fixed Bias (Base Bias) Configuration
8:21 What is Load Line?
10:48 Effect of the change in the current gain (β) on the operating point in fixed bias configuration
Wow...
Super
Take a bow for ur patience in editting part
It would have taken too many hours 🥲
3 seconds of online zoom meetings: 😴💤💤💤
7 hours of incredibly well explained Indian electronics lessons: 🧐🍷
Not that much 🙄
Explained in a superb manner. Loved it.
At around 13:23, the lecturer plots the obtained value pair of 7.75V and 1.5 mA on the graph on the left side of the screen. However, the lines in sky blue color which represent Ib (the base current) should have been changed to reflect the change in beta value. The sky blue lines are still representing beta value of 100 rather than 50 which he just used for calculation. If they were to represent beta value of 50, they would have come down closer to the horizontal axis, and the dot ( 7.75 V , 1.5 mA) would be riding on Ib = 30 uA curve. Right now in the graph, dot ( 7.75V, 1.5 mA ) looks like it is riding on Ib = 10 uA curve, which is very wrong.
This is true. If this plot (13:23) represents the relationship between beta and Ic then when beta is halved from 100 to 50 then, keeping the ordinate scale the same, would compress the collector lines into the bottom half of the graph as, for each value of Ib, we would only have half the value of Ic. Similarly increasing the beta from 100 to 200 would expand the collector lines to twice it's exiting territory. Nevertheless the gist of the argument is sound. Namely that the fixed bias configuration is very sensitive to changes in beta.
Excellent. I did not discover until recently that transistors made by the same manufacturer within the same batch, often differ wildly from one another. Hence emphasis on finding matching pairs of transistors (a problem not faced by valves which tend to be virtually homogenous). Fascinating. Thank you.
i dont understand why so?
You are the greatest techer I ever met in my clg life thank you sir for teaching in such a nice manner sir❤
You saved my life. Thanks alot for such simiplified explanation.
This video is the best one on youtube hands down
Thank you for all the videos you upload. I love your channel. 👍
Thanks! For clear all my question.
Thanks . I really appreciate your support
u save my midterm :>
You're better than my professor.
This is one of the best educational videos I have ever watched❤
Sir u must also deal with input DC load line before discussion on output DC load line
yea , i thought that too
I am preparing for entrance and your videos help me understand better.... thankyou😊
Malayali aanalle
pucha kisi ne bhai???
Sir please explain..we can find operating point without condering load line by observing the active region of the experimental output graph then why we introduce load line what is the significance??
Nice explanation sir
Buffers, Inverters, Gates, Latches, Toggle Flip Flops, and Data Flip Flops made with only SPDT Relays are a fun starting point for digital electronics since no resistance or voltage need be considered. All is mostly a switch being in one of two positions as controlled by an electromagnet being energized or unenergized. From there ICs can be substituted as needed as long as the rules for those ICs are followed.
(13:15)
You have just calculated the new Ic using Ib= 30uA, so why the new operating point shifts to Ib=10uA line?
Nevermind, I understood it by myself (I'm leaving the comment still for others benefit)
In short, if you would plot the new curves of the β=50 transistor on top of the ones shown (for when β=100), the Ib lines for the new transistor would actually have 2x the Ib value.
In other words, for the β=50 transistor the Ib=30uA line is further down and equivalent to the Ib=15uA line of the β=100 transistor (not the 10uA as drawn).
Yes, that's true.
justpaulo Yes changing the beta changes the output characteristic curves. I think he better correct that part of the video.
@@user-mj3ef So how ill the load line look like for Beta =200?? Since Ib is clearly not 30uA, I'm unable to get my head around it. Could you guys help with a rough image or something?
Very Nice Explanation
Well done. Thank you. Nice greetings from Austria
Thank you very much! You are amazing!
Well explained
Excellent 👌
Very good
Very useful sir
what if Q Point is on the negative area, what happen on that condition, please explain.. thank you..
Awesome thanks for this video
Don't you also work for Microsoft security?
ALL ABOUT ELECTRONICS Does the AC/DC load line mean the maximum output wattage power of the transistor or does the AC/DC load line mean the power dissipation of the transistor? Because the AC/DC load line is selected by the EE designer of the operating voltage and operating current for the transistor and the DC bias Q point which will determine the maximum output wattage power out of the transistor and the power dissipation of the transistor. I'm not sure what the LOAD means in the AC load line and DC load line what they are calling the LOAD.
In nonlinear cct analysis the (nonlinear) electronic device is defined as the source; the biasing cct and the load resistor forms the load to the device. Refer to book by Belanger, Adler, and Rumin.
Excellent
प्रणाम सर जी 🥰🙏
@13:25 with Beta=50 and Ib= 30 mA , Ic=1.5mA and Vce=7.75volt, why you have mapped Q point on Ib=10 micro Amp? Please explain why are we mapping the Q point on Ib = 10 micro Amp , and does this mean Ib will also change?
👍🔥Good Video
Sir, I couldn't find load line concept here? Could you please help me out to understand dc and ac load line?
Very nice explanation
Perfect sir.
Great explanation please keep up the good work.
At 5:50 you say the AC voltage is applied BETWEEN the base and the emitter terminal. I don't see this in the circuit schematic. Can you please explain?
00:16 Basics of transistor biasing and its importance
02:12 The proper amplification depends on how well the BJT is biased in the active region.
03:56 The biasing point of a BJT affects its operation and stability.
05:50 The circuit can be redrawn and analyzed in DC
07:50 The operating point of the transistor is determined by the voltage Vce and the collector current Ic.
09:42 Operating point varies with changes in Vcc, Rc, Ib, temperature, and transistor replacement.
11:23 Beta affects the operating point of a transistor.
13:14 Transistor biasing and fixed bias configuration
Sir , in the last part You showed the change in the Operating Point due to change in Beta . For Beta 50 and 200 while calculating IC you considered IB = 30 microamps , but as the operating point changed the IB changed to 10 and 50 microamps . I cannot relate the two . IB is chosen to be 30 how can it change ????????
Good catch. The characteristic curves themselves (or at least the IB labels) needed to change along with the change in Beta. See also walkalone's comment below.
I have the same question.
itu perbandingan saat transistor kita hitung dalam kondisi suhu stabil
tetapi saat transistor dalam keadaan panas nilai hfe/beta juga berubah, alhasil kurva menunjukkan hasil yang berbeda juga dan tentu kita juga harus faham wilayah saturasi dan wilayah aktif transistor. itu menurut saya
The quiz channel is very beneficial 👌🏻👌🏻
I don't understand a single thing, i am so dissapointed at myself
Me*
Us bhai
Bhai kal exam hai
Us bhai
😥
Interesting 🤔
Your videos are very good which software you used to make such a great videos
Very nice explained ❤️❤️❤️
So clearly explained! Awesome 👏
how did you get that sine wave showing it gets clipped at those peaks? ( @3:33 )
Let me explain with some numbers.
Let's say you have biased the BJT in a such a way that, VCE = 2V. And on top of that biasing voltage the output sinewave swings by +- 3V.
That means on the positive side, it will go maximum up to 5V, while on the negative side, it will minimize to (+2 - 3) = -1V.
But it won't be able to go below 0V.
So, output voltage won't go below 0V. And for that portion where the output supposed to go below 0V, gets clipped.
The same thing is represented graphically.
If you observe, on the horizontal axis, the VCE is close to 0V. (Maybe around 1V or 2V)
If the voltage swing is reduced, then the output signal won't clip.
I hope it will clear your doubt.
@@ALLABOUTELECTRONICS it did clear mine thanks
thank you it is well elaborated
Nice sir ji 🙏🙏🙏🙏🙏
Too good sir , amazing explanations
Merci bq جزاك الله خيرا
Plz continue like this
3:35 , Here, Which AC Signal is applying Input & Which is Output.?? Plz Mention.
What is being shown here ( the pink waveform) is the AC voltage VCE and current IC based on the input signal. The input signal will be applied between base and emitter. While the output will be available between collector and emitter.
@@ALLABOUTELECTRONICS That mens here, the upper Waveform Ic is the output based on the Input Vce waveform (lower waveform)...???
@@ismail.eee18bsmrstu Both waveforms are the output waveforms. Its is Ic Vs VCE curve. You will get these two waveforms based on the input waveform applied between base and emitter. The input waveform is not shown over here.
EE’s, is this a easy first year topic or is it more advanced? Just asking to know where this falls on the curriculum. Thanks
2nd year subject
Thank you so much Sir
Thank you sir
No where in the explanation you talked about Vbb ..?why?
I didn’t get it, Please mention the timestamp where you are referring to in the video.
Subtitles covers the lower part of the circuit sir plz make some space for that
On the desktop, you can drag the subtitles anywhere on the screen.
Why the voltage Vce and collector current cant go below 0 volt and 0 amperes
In the given circuit, we have only positive biasing voltage. That means your output voltage can swing between +Vcc and 0V. It can't go below that.
If the circuit consist of both positive and negative supplies, then it may go below 0V (depending on the input signal)
04:20 how do you decide this point (5VCE and 10mA Ic) as Q point?
It depends on your operating current and voltage. You should select the values of resistors and hence the biasing in a such a way that, the Q point remains in the center of the curve.
09:00 when Uce=0, Ic=0 according to transistor output characteristics graph, but Ic=Vcc/Rc according to output loadline. Can anyone explain that to me?
What happens if i try to make Vce negative by Increasing Ic by increasing Ib? Vce can't become negative nah, so what happens?
Why in DC analysis capacitor acts as an open ckt...
Plz clear my doubt sir..
Once the capacitor is fully charged then there is no flow of current through it, and therefore it acts like an open circuit. Therefore, for DC analysis, we can assume that, the capacitor is open circuit.
@@ALLABOUTELECTRONICS
Got it
Thanku sir😊
Great presentation, but the flow seems to be a bit fast to absorb the material.
If required, you can watch the video at 0.75 X speed. It will become easier for you to understand.
@@ALLABOUTELECTRONICS Thanks, will do.
Thank u sir ❤️❤️
How can Ic be max when Vce is 0? When Vce is 0 doesn't the CB junction get forward biased causing no current in Ic except Icbo
I think you are talking about the load line. See, the two extreme points of the load line does not represent the actual operating point. The load line is just drawn from the equation, Vce = Vcc - Ic*Rc. The actual operating point is the intersection of the load line and device curve. So, of course the Vce can't be zero. But as the BJT goes into the saturation, Vce reduces to 0.1V or 0.2V. And hence, Ic increases. (The left portion of the device curve)
@@ALLABOUTELECTRONICS ah yes thanks that does make a lot of sense but what I don't understand is how when Ib is 0 Ic is also 0 even though there is a Vcc and similarly when Vce goes near 0 the CB junction should get forward biased which should stop the electrons from flowing from base to collector meaning Ic to be 0 but instead it gets to maximum. Other than this I have understood everything from your incredible videos. Thanks A LOTTTTTT!
At 9:00min graph i can't understand could you do with values in next video thank you
Consider any value of VCC and RC. Let's say, VCC = 10V and RC = 1KΩ. So, on the load line, Vce (max), the one end of load line on horizontal axis will be 10 V and ic ( max), the other end of load line will be 10 mA. That means, with the chosen values of VCC and RC, your operating point will be between two extremes.
I hope, it will clear your doubt.
When input signal is in negative cycle VBE will become reverse bias right ?? Then Ic should not flow ryt ??
Here we are discussing about the DC biasing. On top of it there will be small ac input signal for amplification. But because of the dc biasing, the overall signal won't go below 0.7V. Or altleast that's how the biasing is done.
If you go through the entire series on BJT then I have explained about large and small signal analysis.
For more information, you can go through it.
"It will look like..... thissssss" - of course on the output side
Explanation of neso academy is better.
Thanksss
Sir, is the triangular arrow at the end of the circuit a symbol that shows that the circuit is grounded?
Yes
awesome sir
Sir,can you have a similar playlist on MOSFET?
There is a playlist on MOSFET but yes, many topics are yet to be covered in it. Soon, the remaining topics will also be covered.
Ficoiff FGH40N60SFD I’m looking for this component for A IGBT ZX7-200 welding machine . have had no luck finding maybe someone will ? High voltage high current
So how we avoid that change in temperature affects our TR?
I have discussed that in the second video. (Emitter Bias and emitter Stabilized biasing) Please check that. Actually, there are a couple of parameters like β, Vbe and Reverse Saturation Current (Ico) which gets affected with temperature. For a while, during the discussion, it has been assumed that the Vbe and Ico are constant and only β changes with temperature. But in the upcoming videos, I will also cover the compensation techniques. (which may affect Vbe and Ico)
But with some specific biasing configuration, it is possible to make an operating point almost independent of the variation β (due to temperature).
What is the use of the capacitors in the analysis of the circuit with AC input at 5:53 ?
They are coupling capacitors. During the analysis it has been assumed that we have pure AC source, but actually sometimes the ac signal is the output of some other amplifier stage. ( And it might contain DC part as well). The capacitor blocks this DC part and only passes the ac signal to the circuit. The same is the case for the output side capacitor. ( To block DC biasing voltage overriding on top of the ac signal).
I hope it will clear your doubt.
Very nice and informative talk....
How you are calculating
Where is dc source placed when ac is in the input
DC source is applied as it is. On top of it,the ac input signal is applied using the coupling capacitor. To get better idea,I would suggest you to go through videos onthe small signal model and small signal analysis of BJT.
On the playlist of BJT, you will get those videos.
What is Vbb? Can someone please explain?
Vbb is the supply voltage (biasing voltage) applied at the base terminal.
Nizzzz explanation
The explanation is superb..... But the figure or cicuit diagram is hiding behind the literature text....... So please 🙏 improve it.
I think you are talking about the subtitles (CC). You can manually turn it off in the video settings.
Sir can you have other units also
Due to subtitles lower part of circuit not visible
Shit the subtitles downwords
you can turn off the subtitles
Retake
Sir at 7:08 why there is no Rπ aka input impedance please answer sir
This is DC analysis. It comes into the picture during AC analysis.
@@ALLABOUTELECTRONICS thank you, but I could not think of a possible explanation as we have for capacitors, at reasonable frequency impedance decreases but here we have something like a diode in between base and emitter .often base current is taken very low and if we compare to a diode at such current there is definitely a non zero resistance there and we are missing this in the expression of Ib at7:10
@@gulzarali6370 I recommend you to go through a video of the large-signal model of BJT. Please go through that video. Your doubts will get clear. Please check the BJT playlist on the channel. You will get that video. If you are not able to find the video, let me know.
@@ALLABOUTELECTRONICS thank you sir, you save my day
Wait... Shouldn't Vbb also equal Vcc in fixed bias?
Not necessarily. There has to have some fixed voltage. It could be VCC or some other fixed DC voltage. Usually to use a single supply, it is biased with VCC.
@@ALLABOUTELECTRONICS Oh i see, thanks for the swift reply! Need to fully understand this for my licensure exams. So a fixed bias is like a common emitter then?
Yes it is. Actually when we say common emitter configuration we are actually refering to the AC signal. That means the ac input signal is applied between the base and emitter while the output is measured between collector and emitter. But to use the BJT as an amplifier we need to bias it. ( We need to apply the DC voltage). There are many ways to bias it. And fixed bias is one of the way. I hope it will clear your doubt. If you go through all the videos on playlist, you will get it.
Sir, in this video you haven't explained how this fixed biasing actually helps in stabilizing the CE configuration in any way. Kindly provide that information also. Also, you could have explained about drawing the load line for those AC signals a little more clearly.
Can i get notes of this
Sir, 7:59 could u pls tell me the KVL rule, how it got that eqn, how to apply kvl rule
Just start applying KVL from the top. When there is a voltage drop, consider it as a negative voltage. Across the collector and emitter, there is a voltage drop as one goes from the top to bottom. That means it can be considered as negative in the KVL equation. The same is true for the voltage drop across the collector resistor.
ALL ABOUT ELECTRONICS so what abt Vcc
Here Vcc is just show by a small dot. But if in doubt, then you can draw a Vcc with both positive and negative terminal. The positive terminal will be connected with Rc, while negative will get connected with ground. And then you can apply KVL in the loop.
ALL ABOUT ELECTRONICS thank you so much sir.
ALL ABOUT ELECTRONICS thank you so much sir,
Sir also could you please tell me the software or app that you are using to make videos, I want to do a math video like this. please do tell
Perfact
Diagram is not visible.
Output chara is drawn based on what equation?
why did u consider Vrc whereas u ignored Vrb ? why
I didn't get your question. Please mention the timestamp where you are referring in the video.
Super sir
what is beta?
Sir how exactly the amplification is done ???
Why dont you give us pdf notes sir!