There is no need to be embarrassed. Going from the knowledge you gained from books, slides, lectures and whiteboard doodles to using it in practice is very often a "connecting the dots" moment and it's not so unusual to need an example, some hand holding, or just extra time to think about it before it all comes back. Great video as always, thank you very much.
I was on the edge of my seat most of the time. It always struck me, that the best teachers are the people who just learned someting new. If there was a complete series on electronics made by a novice, where he's explaining stuff as he learns it, it would be the best course ever. Add a few comments from his mentor and you have a solid education.
This guy's humbleness keeps amazing me again and again... An anecdote: I'm a power electronics guy and have worked with high voltage converters. So I used to design and build high frequency high voltage transformers all the time and measure the transformers parameters with the help of an impedance analyzer. I've developed reasonable experience, but the fun (sad) fact is: I had never thought of PDN this way! I guess we end up ignoring the basics when we're faced with a complex problem sometimes... Thank you for all the content!
Robert, I need THANK YOU so much for this video series! I've been waiting for these explanations to show up in UA-cam since 2010. This will help us understand everything from decoupling, ground loops, EMI, etc.; all the black magic stuff of PCB design. I'm very happy I finally get to watch this.
Thank you guillep2k PS: That is the reason why I am making these videos. There are some pdn videos on the internet, just ... it's not very easy to understand the topic. Many videos are too advanced or require some other knowledge to understand them properly. So I am trying to make a video which would be easy to understand - but as it is complicated topic I am not sure how successful with the explanation I will be. Let's see what people will say ...
For those interested in high speed processes happening on your PCBs I would recommend reading Howard Johnson's books "High Speed Digital Design: A Handbook of Black Magic" and "High Speed Signal Propagation: Advanced Black Magic". After these books you will clearly understand what is happening on your PCBs.
Hi! These videos are really, really interesting and useful. I am discovering a new world in the design of PCBs. Thank you so much to Robert, Eric and Florian for the content, It is highly appreciated! Great guys and teachers :)
Thank you all so much for explaining, after watching this video (part 1), you let me realized that even though the microcontroller is doing the switching (on and off), this situation can cause the microcontroller's voltage supply "Vcc" pin to fluctuate (having voltage ripple in millivolts), where the voltage across the microcontroller can become low depending on how large the "Power Delivery Network" (PDN) impedances is. You also summarized the 3 things that you've learnt, which is the key take aways of this video❤️ love your videos, Robert, Florence, and Eric🙌
Thank you for leaving in the video with Eric. It was a great refresher for myself as well, seeing the tank circuit, I recognized it and understood more clearly. Excellent video! We learn from our mistakes.
This video is an excellent combination of theory, measurements, and quick calculations. It is also a great reminder how important it is to try to gain an intuitive understanding of a design and its performance. Thanks!
Hi Robert, I definitely want to see the next part of this video. What I really like about this video is the collaboration of the different area of expertise that you are bringing together for us. For instance: 1) The board from your PCB design course which teaches us how to make the best use of the PCB layout tools and follow best industry practices, 2) The simulation software that you used and showed us how we even we can simulate our own designs if given the right tools. 3) Last but not the least, how you compare simulation results with actual waveform captures from oscilloscope and then bringing the expertise from Dr. Eric Bogatin who looks at circuits way differently than others given his background in physcis. Keep up the good work Robert, it is really educating young engineers like us.
Thank you so much for this explanation and demonstration, Robert, Florian and Eric ( no disrespect meant by omitting your surnames ). I thought I would not need to be this careful about switching noise at low frequencies and it's mitigation with decoupling capacitors. I have been so wrong and I stand corrected, but my curiousity about how this works is also awakened. Thanks again!
Thanks Robert for putting all of these things together is such a manner! After working on PCBs so long it's easy to start thinking about things in a given way. It's so good to see the tools and experience of others show that this may or may not be the correct case! You've given me more than one epiphany if your videos. Thanks!
i've been watching you're videos since my first year of my engineering bachelors until my final year , i'm very happy to see that you become THIS successful on youtube !!!
Wow, We've just almost built an oscillator accidentally!! Really really precious video!! The step response looks really awful. Can't wait to see a revision of the board, like adjust the capacitor values, modify the power connection(try a 4-layer board) , and perhaps remove the bead(?). Please upload the second part! Can't wait to see it!
Cannot wait for the second part!! Great video. You have gone straight to the guru on signal and power integrity - Eric Bogatin. I just got his latest book on SI integrity. Great read
bro u can be younger than me, but u dont have to separate out your knowledge without money! u r the master of this event. m also altium designer, but u r awesome mate
Escribire en mi idioma NATAL, muchas gracias Robert por compartir tu conocimiento, nos motiva a los que amamos esta carrera a seguir comprendiendo las hermosas imperfecciones de la Electronica. Thanks So much, for you Work. Regards from Perú
from that starting part of the noise and its effects I can see that everything we learned in the school is very important but why they didn't tell us the applications and its necessity to our further work in design many thanks to you Robert for your efforts and keep going bro
You asked if this video is useful? It is absolutely jaw droping! It is mind blowing! I'm very very anxious to see the next part! You have no idea how much information you put there, like you said, "why they don't teach this at school?"
The most simple method is to draw the return path of each signal/current, try to minimize the overlap between sensitive signal and noisy tracks. Always place the decoupling cap close to the chip.
Thank you very much. And don't be embarrassed it's been 5 years that I left university and remember nothing of these because of time I focused on embedded systems. It happens to all of us, we focus on one thing and forget the rest.
Thank you Robert for this amazing video. I have some idea that the power rails is a problem. BUT, never imagine that the problem is huge like that. Sure, continue with this parts, every parts you need to explain
Kudos Feranec.. Very Informative and explained them in a practical way.. Also making industry PCB design experts part of your lecture. Thank you very much..
Everything about your videos is great- the content, the pace of content delivery, the thought flow, the end results and its interpretation. Thank you so much for doing what you do! Your videos help us join the dots on everything we learnt in school.
This is so amazing! thank you. Cant wait for next part. Everithing is informative and it is always great to look and refresh the basics. NO shame in that :)
Great video - to get insight from Eric Bogatin is a real treat . World expert with humility ! . I used your cadence course some years ago which saved a ton of time 👍
Good video. I really enjoy every of your videos robert. As I am currently writing my master thesis I have to add something: Everything about decoupling you told does not apply to multi-layer boards as the inductance is almost non existent by the use of vias and power planes, rather its more about reducing the length of the trace in order to transmit faster waves with lower wavelength without reflections. That's why high capacitance values like 4,7u can be placed almost everywhere on the board when designing 4+ layer board :) Best Regards!
thank you Oizys. PS: we will speak about this in one of the next videos. I already have recording of this topic from my call with Eric, I just need to process and prepare the video.
No one has every subject mastered. I say we're born with faulty DRAM built in. We regularly need to manually reset the refresh rate and often start over. I was in the same boat as you when Mark asked you those questions. I was thinking, 'I should know/remember this,' but honestly didn't at the moment. It's okay though. I know I need to grab The Art of Electronics off the shelf and look in the first few chapters for my answer. Thanks for sharing.
Wow, thanks Robert! I had heard a lot of the theory before, but felt like I never could connect it together in a way that I could practically use it. This video helped a lot with that. Thanks for the moment at the end where you summarised the 3 things you learned from Eric Bogatin. That summary helped a lot too. My head is still spinning though ;-) I am eagerly looking forward to the next video. I hope you will be able to show how to put all this into practise when we design our circuits and do layout. For me that's the part that eluded me so far: how to bring this complex theory into day-to-day practise? Thanks again for your efforts and explaining it to us!
Fantastic video, as always! I wish I had access to such high quality learning materials when I first started working on high speed designs. Never too late to learn though :)
It's no wonder so many MCU datasheets recommend connecting decoupling capacitors directly to the power pins (NOT through vias) with the shortest traces possible. Having a PDN characteristic low impedance is neat, but better to suffer a few ohms and have a flat impedance profile. I was familiar with processes for measuring frequency response of the PDN with instruments for that (I'm guessing you will reveal in future videos), but I hadn't considered the remarkable DIY approach you show here. Thanks Robert
Thank you Greg. We will mention flat impedance in next video(s). And yes, Florian will mention how we measured it - we used Bode 100 ( www.omicron-lab.com/shop/Bode-100.html ) and a probe which Steve Sandler from Picotest borrowed me ( www.picotest.com/products_index.html )
Robert, Nice work with Florian and Eric. I would like to suggest some vocabulary. The waveform that the switching load forces onto the power supply nets is best called "interference". It is a signal that will mix into other loads sharing the same power supply and interfere with the expected signals there. I would reserve the word "noise" for non correlated and unpredictable disturbances such as, but not limited to, the thermal excitation in conductors called Johnson Noise. This distinction is helpful. Next the series elements in a power supply network should be called "Decoupling beads" or even "Decoupling resistors". These elements decouple one interference source (one load) from another (other loads also known as other victims). They also decouple the capacitors near the load from the distant and usually very large capacitors in the power supply which prevents typically the lowest frequency ringing in a power supply distribution. The capacitors to ground on the power pins of a load should be called "Bypass capacitors" . They offer a low impedance path for current between the power pins of a load and the ground pins of a load and the current the load consumes comes from them in proportion to how easy it is to flow (You have to think conductivity here). This last sentence shows why it becomes insightful to think of the currents that flow as the load is active. It is providing this current to the load the bypass capacitors are doing. The current bypasses the power distribution network and stays local to the load and it's bypass capacitor(s). At high frequencies the load current is supplied by the local bypass capacitors and they (the bypass capacitors) are recharged only at lower frequencies through the decoupeling components of the power distribution network. For good electromagnetic compatibility you never want high frequency currents traveling a long distance over power networks. To have high frequency currents traveling over long distances is to build a magnetic loop antenna which couples interference into adjacent circuits and even perhaps outside the product where your friendly FCC compliance people will measure them (thus causing you to have to revisit an FCC test after design changes). Sage advise I learned from a mentor. "Never use more bandwidth in any circuit than you need for that circuit's proper operation." So for example put a 1K resistor on all of your UART TX and RX nets cause they are going to be very sloooow compared to the typical processor clock. And for best effect the resistor on the RX line should be near the level shifter not the processor. Do you see why? I hope this helps. (Forrest) Lee Erickson Physicist who pretends to be an electrical engineer.
Would like to ask Florian if he has placed the Arduino sketch (that he used to operate the DUT at the various frequencies) somewhere public? Although I do not have a Fedeval Arduino I have some out of China with a QFP processor and the bypass capacitors are quite distant from the controller. Would like to measure my DUT.
@Robert Thanks for making this video! It has been 25 years since college so there was a lot in this video that was new to me. We did not have that kind of advanced software to run our simulations with. Mostly, it was by hand with a good calculator. Anyway, I enjoyed this one and I definitely want to see the next one.
I liked that @46:00 was left in, reminds me I'm not the only person who can get confused on a question when we really do know the answer haha. Like a simple question but we think its something else. Although I could understand why because I wouldn't be thinking about impedance graphs like that when talking about traces and thinking about other things like resonance and self resonance.
Thanks for sharing this information. I really liked how instead of simple, hand-wavey, "ringing happens and it's bad, mk" you actually showed how the ringing itself encodes detailed information about the nature of the circuit/issue...awesome. Also I'm quite curious about how you go about mapping the PDN impedance on actual boards (vs in sim)... Are you just sticking a VNA into the VCC pin? Is there a more "poor-man's" solution to this e.g. simply mapping the amplitude of a small signal from a generator or something? Can't wait to see how you did it.
Thank you very much PS: Thank you also for noticing it is a lot of work. I checked yesterday, it's been actually 5 months since I started working on this video! WOW time flies
Great work, Robert! The root of this problem is, while the capacitors are on the schematic the inductance and resistance is not, even though they all affect the PCB. It’s not really black magic, just seems that way :)
FesZ Electronics had an excellent video on this as well. In my opinion in the end it's all very relative. So, yes you can sometimes get resonance peaks in the impedance, but in the end of the day it's lower than without additional decoupling. Also it always will be a compromise between decoupling vs noise reduction not only from the power supply but also INTO the power supply (something people really seem to forget).
I will have a look, thank you P_Mouse. PS: I will continue explaining in the next part ... if people like this kind of content. Eric also spoke a little bit more about decoupling, so I would also include that ... it was very interesting call.
@@RobertFeranec yes, I am definitely interested in part 2. Basically instead of using Excel you can just simulate a lot in LTSpice. Just saves a lot of time.
Great video. I have not looked up the exact parts used, but I suspect the discrepancy in resonant frequency of 30 kHz vs 60 kHz likely comes from the reduction in capacitance as DC voltage is applied over that physically small 10 uF ceramic capacitor. Small ceramic high-capacitance tend to have a very strong dependency, sometimes with the capacitance reducing to 1/10 of the rated capacitance (!) when at rated voltage. Most types except C0G are affected. Also the inductance of the ferrite bead could decrease with increased DC current. Possibly by a lot. If these effects are not taken into account in the simulation models, the real resonant frequency will be higher than the simulated as both the inductance and capacitance are lower at the real operating point.
I'm surmising at high frequencies that the other down loop inductors become unimportant because the nearest capacitor starts becoming the path of least reactance for the current. Eager to see the next video to find out.
Thanks Mr Feranec, great video again. Of course, such videos are really useful I would appreciate if these kinds of videos keep coming. Moreover, we always want to learn new things and refresh our memories from time to time. What is more, for the noise we see at the VCC pin can it also exist at the ground? Can it affect the noise level especially at mixed-signal boards?
Got electronic education, key point and important thing you learn is that components are not ideal but have parasitic atributes. I also have education in Automotive. And wenn I was young also into car hifi. Those huge buffer 1F elco with protection circuit. To buffer the slow chemical car Battery for heavy bass line in the music. Or insane capacitance device the size of small freezer to fire Gas laser. For making holes in PCB it also about fast power. All parasitic inductans from decoupling C tot internals IC all adds up. That why short trace and close to pins means less inductance to add. Well its nice refresh of knowledge.
Sir, thanks for your vital input! I would like to know which Simulator programme you used to trace this kind of circuit...? Please keep sharing these kinds of knowledge which great like you can only bring to light...
for future video, i hope you can make some discussion about this important topic for more specific application, in this case, the microcontroller running in lower switching, for example in motor application where the switching output (PWM) usually around 20 kHz (not in range of 5 MHz as shown in video).
Wanted to make a "quick" video about decoupling capacitors. Oh how I laughed ! I recommend Signal Integrity Simplified by Eric Bogatin. Saved to watch later.
@@RobertFeranec Whilst at Nokia, I developed a Xilinx based FPGA board for camera image manipulation development. My boss at the time was very unhappy that I had spent a whole three days working out the decoupling capacitor network for the board. I pointed out that the design would have a PDN impedance of under 0.1 Ohm flat upto 800 MHz and that he'll be able to switch all the outputs simultaneously on/off without the device glitching. I used Agilent ADS 2010 back then and modelled each capacitor as a combination of series RCL and parallel R lumps. The data was provided by the detailed AVX datasheets. Xilinx provide a very good application note for "Power distribution system design: Using bypass/decoupling capcitors" ref XAPP623
The imaginary part of the impedance @52:27 should be X_L - X_C (though, the value calculated by your formula will not different from the correct version for the square gives of the difference always gives positive values)
@Robert Feranec, you mention in the video that at 66kHz there is something special, and there certainly is, but you mentioned “when we are operating at that frequency.” However in digital design, we are always operating in that frequency because a square wave (at least a perfect/really good one) is made up of “all” the frequencies. So it is important to have a PDN impedance as low as possible in ALL locations within your given bandwidth otherwise this ringing will occur.
Perfect video, perfect topic 100 x thumbs up !!! Any track between the coupling capacitor and the power pin is an Inductor and it influences the PDN network. I find it sometimes hard (with a BGA FPGA totally impossible) to position the coupling capacitors as close to the microcontroller and on the same layer. I sometimes have to position the capacitors on the bottom layer and connect the power pins the caps using a via. And this is sometimes inevitable. In your opinion would this create in the long term a catastrophic problem?
Thank you very much Kerem. PS: I have not seen any problems on boards where decoupling capacitors are placed on the bottom (that is a standard recommendation from the big chip manufacturers, you will find decoupling capacitors under power pins on boards from Intel, AMD, etc ...).
Thank you very much for your reply Robert. Having heard your experience, from this point on, I will be confident to place the decoupling capacitors on bottom side of the board. You really helped me gaining valuable information from your courses and now through UA-cam. Thank you very much for your effort. Kind Regards,
@Robert Feranec at 23:38 the table in excel sheet shows different freuqncies of IO switchings and also the ripple voltage and current at each frequency. My doubt is that current is same 42mA for all frequencies of IOs...is it not that current increases with higher switching frequencies?
Here is practical comment how this board could be improved. I would route power trace to the decoupling capacitor pad from the above instead directly to the chip pin. I would make that power trace thinner. Only when it goes form capacitor to the chip it needs to be thick. 1.Thinner supply line will filter the noise that may go to other component 2. Connecting the track from the above will reduce EMI on the power trace, as the chip will not be drawing power from it directly, since the cap will be closer. 3. Thicker line from the cap will improve power delivery to the chip.
The first anti resonance at 60kHz is caused primarily by the parallel resonance of the bead and the 10uF capacitor. The reason the simulation was off, was because the models don’t take into account the inductance drop with DC bias, and may not take into account the capacitance drop with DC bias. Both of these model discrepancies cause the resonance to be predicted lower than reality.
I noticed people always neglect DC bias in ceramic capacitors. I always wonder when application notes are calling for xx nF capacitor,what actual capacitance they are asking for.
Hi Robert, thanks for your interesting video. As i watched it, i have questions, i will appreciate if you answer. Is it good approach to choose power tracks as much as short to eliminate inherent inductors? Does it need really using ferrite bead on the power track which it has own inductor?
Before we go to the part 2, I have a question. Since we are talking about frequency going into GHz range, it must be remember that the non-ideal characteristics of the inductor mean that it behaves like capacitor at very high frequencies and thus has a self resonance and that the capacitor behaves like an inductor at very high frequencies and thus has a self resonance. This is not discussed in the graphs near the end of this video.
@@RobertFeranec hi there is no explanation why Eric considered only the first LC loop for very high frequencies? Could please upload the whole video call of you with Eric. Or could you please complete the explanation for the pdn graph from low frequency to high frequency. You did not continue Eric explanation after 47min. Please upload complete explanation. Thanks
@@santoshgurral66 It is explained in the next part. Basically, for some frequencies some of the capacitors will behave as a short circuit (or inductor) - so it is not important what is connected behind these "short circuits".
There is no need to be embarrassed. Going from the knowledge you gained from books, slides, lectures and whiteboard doodles to using it in practice is very often a "connecting the dots" moment and it's not so unusual to need an example, some hand holding, or just extra time to think about it before it all comes back. Great video as always, thank you very much.
Great job Robert
Your Humility and passion for continued learning make you a true educator
I was on the edge of my seat most of the time.
It always struck me, that the best teachers are the people who just learned someting new. If there was a complete series on electronics made by a novice, where he's explaining stuff as he learns it, it would be the best course ever. Add a few comments from his mentor and you have a solid education.
I feel it the same way.
No...
I love your honesty and willingness to ask questions to get to a better understanding.
This guy's humbleness keeps amazing me again and again... An anecdote: I'm a power electronics guy and have worked with high voltage converters. So I used to design and build high frequency high voltage transformers all the time and measure the transformers parameters with the help of an impedance analyzer. I've developed reasonable experience, but the fun (sad) fact is: I had never thought of PDN this way! I guess we end up ignoring the basics when we're faced with a complex problem sometimes... Thank you for all the content!
Thank you Andre
Robert, I need THANK YOU so much for this video series! I've been waiting for these explanations to show up in UA-cam since 2010. This will help us understand everything from decoupling, ground loops, EMI, etc.; all the black magic stuff of PCB design. I'm very happy I finally get to watch this.
Thank you guillep2k PS: That is the reason why I am making these videos. There are some pdn videos on the internet, just ... it's not very easy to understand the topic. Many videos are too advanced or require some other knowledge to understand them properly. So I am trying to make a video which would be easy to understand - but as it is complicated topic I am not sure how successful with the explanation I will be. Let's see what people will say ...
That’s some ultra high quality content! Thank you!
Thank you very much nenharma82
For those interested in high speed processes happening on your PCBs I would recommend reading Howard Johnson's books "High Speed Digital Design: A Handbook of Black Magic" and "High Speed Signal Propagation: Advanced Black Magic". After these books you will clearly understand what is happening on your PCBs.
Agree . The best purchase i have ever made .
I remember reading the high speed circuit designs...definitely worthwhile
Will check it out. Thanks for the recommendation.
Bogatin's book are better imho for this particular topic
It is only math, not a book for hardware designer
Who we are?
PCB DESIGNERS
What we want?
PART TWO OF THIS VIDEO
who we love?
ROBERT FERANEC
:D
can't agree more hehe
Hi! These videos are really, really interesting and useful. I am discovering a new world in the design of PCBs. Thank you so much to Robert, Eric and Florian for the content, It is highly appreciated! Great guys and teachers :)
Thank you all so much for explaining, after watching this video (part 1), you let me realized that even though the microcontroller is doing the switching (on and off), this situation can cause the microcontroller's voltage supply "Vcc" pin to fluctuate (having voltage ripple in millivolts), where the voltage across the microcontroller can become low depending on how large the "Power Delivery Network" (PDN) impedances is.
You also summarized the 3 things that you've learnt, which is the key take aways of this video❤️ love your videos, Robert, Florence, and Eric🙌
Thank you for leaving in the video with Eric. It was a great refresher for myself as well, seeing the tank circuit, I recognized it and understood more clearly. Excellent video! We learn from our mistakes.
This video is an excellent combination of theory, measurements, and quick calculations. It is also a great reminder how important it is to try to gain an intuitive understanding of a design and its performance. Thanks!
Hi Robert,
I definitely want to see the next part of this video. What I really like about this video is the collaboration of the different area of expertise that you are bringing together for us. For instance:
1) The board from your PCB design course which teaches us how to make the best use of the PCB layout tools and follow best industry practices, 2) The simulation software that you used and showed us how we even we can simulate our own designs if given the right tools.
3) Last but not the least, how you compare simulation results with actual waveform captures from oscilloscope and then bringing the expertise from Dr. Eric Bogatin who looks at circuits way differently than others given his background in physcis.
Keep up the good work Robert, it is really educating young engineers like us.
Thank you very much Nihar PS: After making this video, I may need to do some improvements on the board :D
Well done Robert, really appreciate the time taken to do these!
Thank you very much Andrew
@Následovník Nikoly Tesly Slovak
@Následovník Nikoly Tesly :D
Thank you so much for this explanation and demonstration, Robert, Florian and Eric ( no disrespect meant by omitting your surnames ).
I thought I would not need to be this careful about switching noise at low frequencies and it's mitigation with decoupling capacitors. I have been so wrong and I stand corrected, but my curiousity about how this works is also awakened. Thanks again!
Fantabulous ! There is no word which can express my feeling. Great job Robert !
Thanks Robert for putting all of these things together is such a manner! After working on PCBs so long it's easy to start thinking about things in a given way. It's so good to see the tools and experience of others show that this may or may not be the correct case! You've given me more than one epiphany if your videos. Thanks!
i've been watching you're videos since my first year of my engineering bachelors until my final year , i'm very happy to see that you become THIS successful on youtube !!!
Wow, We've just almost built an oscillator accidentally!!
Really really precious video!!
The step response looks really awful. Can't wait to see a revision of the board,
like adjust the capacitor values, modify the power connection(try a 4-layer board) , and perhaps remove the bead(?).
Please upload the second part! Can't wait to see it!
Thank you Zhitai
As a nerd myself, this phrase (and the fact that I felt it so true) made me feel very proud: "and this is where the fun begins"!
:)
Thank you Robert! With yours channel and yours curses I’m learning a lot. You are a very good teacher. Please continue yours great work.
Thank you very much Jorge
Cannot wait for the second part!! Great video. You have gone straight to the guru on signal and power integrity - Eric Bogatin. I just got his latest book on SI integrity. Great read
Thank you Jayakrishnan
bro u can be younger than me, but u dont have to separate
out your knowledge without money! u r the master of this event. m also altium designer, but u r awesome mate
OMG! I was just about to start placing bypass caps for my PCB and this showed up! Can't wait for the next part! :)
Thank you hri124
Escribire en mi idioma NATAL, muchas gracias Robert por compartir tu conocimiento, nos motiva a los que amamos esta carrera a seguir comprendiendo las hermosas imperfecciones de la Electronica.
Thanks So much, for you Work.
Regards from Perú
from that starting part of the noise and its effects I can see that everything we learned in the school is very important but why they didn't tell us the applications and its necessity to our further work in design
many thanks to you Robert for your efforts and keep going bro
Thank you Amr PS: I agree
You asked if this video is useful? It is absolutely jaw droping! It is mind blowing! I'm very very anxious to see the next part! You have no idea how much information you put there, like you said, "why they don't teach this at school?"
Thank you very much Xtian for nice words.
Thank you, invaluable information. Very generous of you all for putting this together for the community. I'll share around.
Looking forward Part II
Thank you very much
Big thumps up for taking a stab on illuminating the dark messy world of PDN. Bogatin book last chapter is probably the best intro on this subject.
The most simple method is to draw the return path of each signal/current, try to minimize the overlap between sensitive signal and noisy tracks. Always place the decoupling cap close to the chip.
Thank you very much.
And don't be embarrassed it's been 5 years that I left university and remember nothing of these because of time I focused on embedded systems.
It happens to all of us, we focus on one thing and forget the rest.
Thank you Amir
Thank you Robert for this amazing video. I have some idea that the power rails is a problem. BUT, never imagine that the problem is huge like that. Sure, continue with this parts, every parts you need to explain
Thank you very much Pablo.
Well done Robert 👏 brilliant video. Very interesting and educational discussion relating to PDN. I'm looking forward to watching the follow up video.
Hello Robert, grate video about decoupling & power supply! I'll be waiting for part 2 eagerly. Thanks!
Thank you
Kudos Feranec..
Very Informative and explained them in a practical way..
Also making industry PCB design experts part of your lecture.
Thank you very much..
Everything about your videos is great- the content, the pace of content delivery, the thought flow, the end results and its interpretation. Thank you so much for doing what you do! Your videos help us join the dots on everything we learnt in school.
This is so amazing! thank you. Cant wait for next part. Everithing is informative and it is always great to look and refresh the basics. NO shame in that :)
Thank you :)
Unfortunately I cannot add one million likes under this video. Waiting second part. THANK YOU Robert!!!!!!!!
Thank you very much Andrej
Great video - to get insight from Eric Bogatin is a real treat . World expert with humility ! . I used your cadence course some years ago which saved a ton of time 👍
Thank you Hedley. PS: I am very happy you found the course helpful
Good video. I really enjoy every of your videos robert. As I am currently writing my master thesis I have to add something: Everything about decoupling you told does not apply to multi-layer boards as the inductance is almost non existent by the use of vias and power planes, rather its more about reducing the length of the trace in order to transmit faster waves with lower wavelength without reflections. That's why high capacitance values like 4,7u can be placed almost everywhere on the board when designing 4+ layer board :) Best Regards!
thank you Oizys. PS: we will speak about this in one of the next videos. I already have recording of this topic from my call with Eric, I just need to process and prepare the video.
No one has every subject mastered. I say we're born with faulty DRAM built in. We regularly need to manually reset the refresh rate and often start over.
I was in the same boat as you when Mark asked you those questions. I was thinking, 'I should know/remember this,' but honestly didn't at the moment. It's okay though. I know I need to grab The Art of Electronics off the shelf and look in the first few chapters for my answer.
Thanks for sharing.
Thank you. PS: Yes, I had to refresh a LOT of theory when working on this video.
Wow, thanks Robert! I had heard a lot of the theory before, but felt like I never could connect it together in a way that I could practically use it. This video helped a lot with that. Thanks for the moment at the end where you summarised the 3 things you learned from Eric Bogatin. That summary helped a lot too. My head is still spinning though ;-)
I am eagerly looking forward to the next video. I hope you will be able to show how to put all this into practise when we design our circuits and do layout. For me that's the part that eluded me so far: how to bring this complex theory into day-to-day practise?
Thanks again for your efforts and explaining it to us!
Thank you very much Christe4N
Great video tutorial Robert, I can't wait to see the second part!
Thank you very much Edgar
sure we want the 2nd part of this video. this is really important and amazing
Thank you Blu PS: Part 2 and 3 are now available, there still should be also at least part 4
From every video, something or the other new concepts are being learned every time.
Thank you Aniket. I am very happy you found the videos useful.
@@RobertFeranec Yess Robert your videos are very insightful.
really premium content. you clarified a lot of doubts I had... Thanks..!!
Fantastic video, as always! I wish I had access to such high quality learning materials when I first started working on high speed designs. Never too late to learn though :)
I wish the same! :) Thank you.
It's no wonder so many MCU datasheets recommend connecting decoupling capacitors directly to the power pins (NOT through vias) with the shortest traces possible. Having a PDN characteristic low impedance is neat, but better to suffer a few ohms and have a flat impedance profile. I was familiar with processes for measuring frequency response of the PDN with instruments for that (I'm guessing you will reveal in future videos), but I hadn't considered the remarkable DIY approach you show here. Thanks Robert
Thank you Greg. We will mention flat impedance in next video(s). And yes, Florian will mention how we measured it - we used Bode 100 ( www.omicron-lab.com/shop/Bode-100.html ) and a probe which Steve Sandler from Picotest borrowed me ( www.picotest.com/products_index.html )
@@RobertFeranec Yay! Exactly the method and tools and expert advice source I had in mind.
Robert,
Nice work with Florian and Eric.
I would like to suggest some vocabulary. The waveform that the switching load forces onto the power supply nets is best called "interference". It is a signal that will mix into other loads sharing the same power supply and interfere with the expected signals there.
I would reserve the word "noise" for non correlated and unpredictable disturbances such as, but not limited to, the thermal excitation in conductors called Johnson Noise.
This distinction is helpful.
Next the series elements in a power supply network should be called "Decoupling beads" or even "Decoupling resistors". These elements decouple one interference source (one load) from another (other loads also known as other victims). They also decouple the capacitors near the load from the distant and usually very large capacitors in the power supply which prevents typically the lowest frequency ringing in a power supply distribution.
The capacitors to ground on the power pins of a load should be called "Bypass capacitors" . They offer a low impedance path for current between the power pins of a load and the ground pins of a load and the current the load consumes comes from them in proportion to how easy it is to flow (You have to think conductivity here).
This last sentence shows why it becomes insightful to think of the currents that flow as the load is active. It is providing this current to the load the bypass capacitors are doing.
The current bypasses the power distribution network and stays local to the load and it's bypass capacitor(s).
At high frequencies the load current is supplied by the local bypass capacitors and they (the bypass capacitors) are recharged only at lower frequencies through the decoupeling components of the power distribution network.
For good electromagnetic compatibility you never want high frequency currents traveling a long distance over power networks. To have high frequency currents traveling over long distances is to build a magnetic loop antenna which couples interference into adjacent circuits and even perhaps outside the product where your friendly FCC compliance people will measure them (thus causing you to have to revisit an FCC test after design changes).
Sage advise I learned from a mentor. "Never use more bandwidth in any circuit than you need for that circuit's proper operation." So for example put a 1K resistor on all of your UART TX and RX nets cause they are going to be very sloooow compared to the typical processor clock. And for best effect the resistor on the RX line should be near the level shifter not the processor. Do you see why?
I hope this helps.
(Forrest) Lee Erickson
Physicist who pretends to be an electrical engineer.
Would like to ask Florian if he has placed the Arduino sketch (that he used to operate the DUT at the various frequencies) somewhere public?
Although I do not have a Fedeval Arduino I have some out of China with a QFP processor and the bypass capacitors are quite distant from the controller. Would like to measure my DUT.
Thank you very much Lee
@@forresterickson6225 Lee, here is the code:
//storage variables
boolean toggle = 0;
void setup(){
//set pins as outputs
pinMode(0, OUTPUT);
pinMode(1, OUTPUT);
pinMode(2, OUTPUT);
pinMode(3, OUTPUT);
pinMode(4, OUTPUT);
pinMode(5, OUTPUT);
pinMode(6, OUTPUT);
pinMode(7, OUTPUT);
pinMode(8, OUTPUT);
pinMode(9, OUTPUT);
pinMode(10, OUTPUT);
pinMode(11, OUTPUT);
pinMode(12, OUTPUT);
pinMode(13, OUTPUT);
pinMode(14, OUTPUT);
pinMode(15, OUTPUT);
pinMode(16, OUTPUT);
pinMode(17, OUTPUT);
pinMode(18, OUTPUT);
pinMode(19, OUTPUT);
cli();//stop interrupts
setInterrupt(159); // = ((16*10^6) / (frequency*2)) - 1
//50kHz = 159
//60kHz = 132
sei();//allow interrupts
}//end setup
void setInterrupt(int divid){
TCCR1A = 0;// set entire TCCR1A register to 0
TCCR1B = 0;// same for TCCR1B
TCNT1 = 0;//initialize counter value to 0
OCR1A = divid;// = (16*10^6) / (freq*2) - 1
// turn on CTC mode
TCCR1B |= (1
Thanks Robert as always loved this video as well. Appreciate your efforts to make us educated about some really difficult concepts.
Thank you very much Chethan
@Robert Thanks for making this video! It has been 25 years since college so there was a lot in this video that was new to me. We did not have that kind of advanced software to run our simulations with. Mostly, it was by hand with a good calculator. Anyway, I enjoyed this one and I definitely want to see the next one.
Thank you for watching and leaving feedback wrekced
Thank You Robert for your efforts.....excellent concepts.
Bro please keep making more videos 🙏 for us that can't afford a master's degree, you are our open free university
I liked that @46:00 was left in, reminds me I'm not the only person who can get confused on a question when we really do know the answer haha. Like a simple question but we think its something else. Although I could understand why because I wouldn't be thinking about impedance graphs like that when talking about traces and thinking about other things like resonance and self resonance.
Eric have change the world
Thanks for sharing this information. I really liked how instead of simple, hand-wavey, "ringing happens and it's bad, mk" you actually showed how the ringing itself encodes detailed information about the nature of the circuit/issue...awesome.
Also I'm quite curious about how you go about mapping the PDN impedance on actual boards (vs in sim)... Are you just sticking a VNA into the VCC pin? Is there a more "poor-man's" solution to this e.g. simply mapping the amplitude of a small signal from a generator or something? Can't wait to see how you did it.
Thank you very much. PS: We will be talking about the measurement. But simple answer is, we used BODE 100 www.omicron-lab.com/shop/Bode-100.html
thank you for the detailed explanation of this subject
Really great Video.
Looking forward for the next ten parts ;)
Thank for the lot of work you put into it
Thank you very much PS: Thank you also for noticing it is a lot of work. I checked yesterday, it's been actually 5 months since I started working on this video! WOW time flies
very good lecture... so informative and practical.
Thank you yusie
Great work, Robert! The root of this problem is, while the capacitors are on the schematic the inductance and resistance is not, even though they all affect the PCB. It’s not really black magic, just seems that way :)
inductance and resistance of the capacitors?
I'm very interested in all of this. You are helping me understand some of the mysteries that can sometimes bite me in the... !!!
Thank you Roger
FesZ Electronics had an excellent video on this as well. In my opinion in the end it's all very relative. So, yes you can sometimes get resonance peaks in the impedance, but in the end of the day it's lower than without additional decoupling. Also it always will be a compromise between decoupling vs noise reduction not only from the power supply but also INTO the power supply (something people really seem to forget).
I will have a look, thank you P_Mouse. PS: I will continue explaining in the next part ... if people like this kind of content. Eric also spoke a little bit more about decoupling, so I would also include that ... it was very interesting call.
@@RobertFeranec yes, I am definitely interested in part 2. Basically instead of using Excel you can just simulate a lot in LTSpice. Just saves a lot of time.
@@RobertFeranec oh and btw, don't be embarrassed. We all had our blackout moments haha 🤣👍🏻
@@p_mouse8676 initially I started simulation in Circuit lab ... and it blocked me out and asked for registration, so I opened Excel spreadsheet :D
@@p_mouse8676 :D PS: I have never been the smartest at school, there were much smarter people.
Thank you so much sir for explaining this important topic.
Great video.
I have not looked up the exact parts used, but I suspect the discrepancy in resonant frequency of 30 kHz vs 60 kHz likely comes from the reduction in capacitance as DC voltage is applied over that physically small 10 uF ceramic capacitor.
Small ceramic high-capacitance tend to have a very strong dependency, sometimes with the capacitance reducing to 1/10 of the rated capacitance (!) when at rated voltage. Most types except C0G are affected.
Also the inductance of the ferrite bead could decrease with increased DC current. Possibly by a lot.
If these effects are not taken into account in the simulation models, the real resonant frequency will be higher than the simulated as both the inductance and capacitance are lower at the real operating point.
Learned a lot! Thanks Robert
Thank you Raza
I'm surmising at high frequencies that the other down loop inductors become unimportant because the nearest capacitor starts becoming the path of least reactance for the current. Eager to see the next video to find out.
Thank you Jack
Thanks Mr Feranec, great video again. Of course, such videos are really useful I would appreciate if these kinds of videos keep coming. Moreover, we always want to learn new things and refresh our memories from time to time. What is more, for the noise we see at the VCC pin can it also exist at the ground? Can it affect the noise level especially at mixed-signal boards?
Got electronic education, key point and important thing you learn is that components are not ideal but have parasitic atributes.
I also have education in Automotive. And wenn I was young also into car hifi. Those huge buffer 1F elco with protection circuit. To buffer the slow chemical car Battery for heavy bass line in the music. Or insane capacitance device the size of small freezer to fire Gas laser. For making holes in PCB it also about fast power.
All parasitic inductans from decoupling C tot internals IC all adds up. That why short trace and close to pins means less inductance to add.
Well its nice refresh of knowledge.
Sir, thanks for your vital input!
I would like to know which Simulator programme you used to trace this kind of circuit...?
Please keep sharing these kinds of knowledge which great like you can only bring to light...
Well Done Robert!
Robert, really great video... Thanks for it...
for future video, i hope you can make some discussion about this important topic for more specific application, in this case, the microcontroller running in lower switching, for example in motor application where the switching output (PWM) usually around 20 kHz (not in range of 5 MHz as shown in video).
Wow, this is really good content! Thanks for opening this large can of worms :-) I'm really excited to see the next episode!
Thank you very much
I want to see second part pls. It is really usefull. Thanks for your videos
Thank you Freddy
I loved the vídeo! Can't wait to see next part
Thank you Leo
Wanted to make a "quick" video about decoupling capacitors. Oh how I laughed ! I recommend Signal Integrity Simplified by Eric Bogatin. Saved to watch later.
Yeah ... I know now .... it's not so simple :)
@@RobertFeranec Whilst at Nokia, I developed a Xilinx based FPGA board for camera image manipulation development. My boss at the time was very unhappy that I had spent a whole three days working out the decoupling capacitor network for the board. I pointed out that the design would have a PDN impedance of under 0.1 Ohm flat upto 800 MHz and that he'll be able to switch all the outputs simultaneously on/off without the device glitching.
I used Agilent ADS 2010 back then and modelled each capacitor as a combination of series RCL and parallel R lumps. The data was provided by the detailed AVX datasheets.
Xilinx provide a very good application note for "Power distribution system design: Using bypass/decoupling capcitors" ref XAPP623
@@BobBeatski71 Nice!
The imaginary part of the impedance @52:27 should be X_L - X_C (though, the value calculated by your formula will not different from the correct version for the square gives of the difference always gives positive values)
Hi robert,
You can understand pdn from eric bogatin book to understand how this decoupling nw is designed and works.
Surely fruitful! Thanks!
My god this video is so helpful, thank you so much
That was an awesome video! Many many thanks!!!
Thank you very much Andriy
Advising you to see Eric's PDN webinars in his site. he explains this subject great!
@Robert Feranec, you mention in the video that at 66kHz there is something special, and there certainly is, but you mentioned “when we are operating at that frequency.” However in digital design, we are always operating in that frequency because a square wave (at least a perfect/really good one) is made up of “all” the frequencies. So it is important to have a PDN impedance as low as possible in ALL locations within your given bandwidth otherwise this ringing will occur.
I really appreciate these videos, really good stuff! And I also enjoy that you are making me think about things in a new light
Thanks Robert. Always enjoy your videos and learn a lot.
Where do I get the 8min call with Eric? Cant find it...
What an awesome video! Thanks so much🙏
Btw. Love the Fermi type of problem solving from Eric Bogatin.
Perfect video, perfect topic 100 x thumbs up !!!
Any track between the coupling capacitor and the power pin is an Inductor and it influences the PDN network.
I find it sometimes hard (with a BGA FPGA totally impossible) to position the coupling capacitors as close to the microcontroller and on the same layer. I sometimes have to position the capacitors on the bottom layer and connect the power pins the caps using a via. And this is sometimes inevitable.
In your opinion would this create in the long term a catastrophic problem?
Thank you very much Kerem. PS: I have not seen any problems on boards where decoupling capacitors are placed on the bottom (that is a standard recommendation from the big chip manufacturers, you will find decoupling capacitors under power pins on boards from Intel, AMD, etc ...).
Thank you very much for your reply Robert. Having heard your experience, from this point on, I will be confident to place the decoupling capacitors on bottom side of the board. You really helped me gaining valuable information from your courses and now through UA-cam. Thank you very much for your effort. Kind Regards,
@Robert Feranec at 23:38 the table in excel sheet shows different freuqncies of IO switchings and also the ripple voltage and current at each frequency. My doubt is that current is same 42mA for all frequencies of IOs...is it not that current increases with higher switching frequencies?
thank you for sharing this video, very helpful!
Here is practical comment how this board could be improved.
I would route power trace to the decoupling capacitor pad from the above instead directly to the chip pin. I would make that power trace thinner. Only when it goes form capacitor to the chip it needs to be thick.
1.Thinner supply line will filter the noise that may go to other component
2. Connecting the track from the above will reduce EMI on the power trace, as the chip will not be drawing power from it directly, since the cap will be closer.
3. Thicker line from the cap will improve power delivery to the chip.
Also moving the gnd via above the cap would allow to move the cap closer to IC chip which would further improve everything.
Interesting. Please do second part of video.
Thank you Adam
The first anti resonance at 60kHz is caused primarily by the parallel resonance of the bead and the 10uF capacitor. The reason the simulation was off, was because the models don’t take into account the inductance drop with DC bias, and may not take into account the capacitance drop with DC bias. Both of these model discrepancies cause the resonance to be predicted lower than reality.
I noticed people always neglect DC bias in ceramic capacitors.
I always wonder when application notes are calling for xx nF capacitor,what actual capacitance they are asking for.
Hi Robert, thanks for your interesting video. As i watched it, i have questions, i will appreciate if you answer. Is it good approach to choose power tracks as much as short to eliminate inherent inductors? Does it need really using ferrite bead on the power track which it has own inductor?
excellent video robbert!
Thank you very much Paul
Please upload 2nd part, very interesting and eager to see
Thank you Harish
Before we go to the part 2, I have a question. Since we are talking about frequency going into GHz range, it must be remember that the non-ideal characteristics of the inductor mean that it behaves like capacitor at very high frequencies and thus has a self resonance and that the capacitor behaves like an inductor at very high frequencies and thus has a self resonance. This is not discussed in the graphs near the end of this video.
very informational ... TY for sharing ... more please .. cheers :)
Thank you very much Tim
Great content...thanks for making these videos
Thank you very much
@@RobertFeranec hi there is no explanation why Eric considered only the first LC loop for very high frequencies? Could please upload the whole video call of you with Eric. Or could you please complete the explanation for the pdn graph from low frequency to high frequency. You did not continue Eric explanation after 47min. Please upload complete explanation. Thanks
@@santoshgurral66 It is explained in the next part. Basically, for some frequencies some of the capacitors will behave as a short circuit (or inductor) - so it is not important what is connected behind these "short circuits".
Robert you crawled for us to walk, no worries!😁