Implementing a D Flip Flop (Posedge) in Verilog

[@Hav0c1000]

You should have used a non-blocking statement when you assign Q.

[@qoap]

hey great video derek ! thank you

[@ragzzz07]

Hi Derek, I tried the same steps as you have done on this video with all the same names of the files and everything but I am getting an error like this
No top level modules, and no -s option.
Can you or anyone suggest somekind of rectification for such error.

[@ComputerEngineeringCPE]

Subbed, great content!

[@twoticks]

Very helpful tutorial!

[@gianmarcopolizia7345]

Hi, can you tell me which are the keys for making the character before "timescale"?

[@Aker]

backtick( ` ) key usually on escape or near tilde

[@Anindita_Palit]

So what does D represent? Is it like the opcode?

[@vishalraja1543]

D flip flop's input

[@pariya4149]

Very helpful

[@loyal8060]

How to download this software?