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ADITYA RAJ
Приєднався 10 вер 2014
Verilog code(simulation and synthesis) and design of a 4x1 MUX using decoder and buffers
Verilog code(simulation and synthesis) and design of a 4x1 MUX using decoder and buffers
Переглядів: 5 713
Відео
crop protection from animals and smart irrigation system
Переглядів 2164 роки тому
Working of the projects
Smart crop protection from animal and smart irigation system
Переглядів 2824 роки тому
Introduction to the component
i am getting error
can you verify the code
Bro. haven't you studied MAVEN confidential note???? 😄
Bhi hindi me bole achha se samajh me aa jata .
Bro but u have to blur the name of maven silicon because they didn't gave any permission to use there content anywhere...
coding post panunga
there is some error
I think u r from maven silicon right 😊
I think so Bcoz I am also from maven😅
write verilog code for the bidirectional buffer and verify using testbench
Hello aditya raj can i get circuit Diagram of all the things
Best in the world
Bahot mst pdhaya sirr itni baar pdh liya tha kabhi smjh na aaya aaj mere sare doubts clr ho gye