I'm getting a ERC error, saying floating psub not allowed. It is coming when i connected the isolated pwell to some other node other than the global psub connection(we are using dnw device for this purpose only). Even in your video also you got an ERC error i think it is same as the error that I'm also getting. Is that error ignorable ? or Is there a way to correct that error ? please help !!
@@analoglayout Thanks for the reply. Soon I'm going to finish the top level layout of my chip for the tape-out. It would be very helpful for me if you could tell how that error can be cleared in top level.
@@analoglayout Thanks for the reply. In my circuit only one mosfet is dnw mosfet and its body is connected to some node not to the ground and all the others mosfets body is connected to ground and I have drawn the psub contacts and connected to the ground. Is this what you are suggesting ?? If so still the error is there. The "floating psub error" is coming and its highlighting the isolated psub of the dnw device. When i connected the isolated psub also to the ground then that error is going(this is not what i wanted).
It's a pmos or nmos, bcos dnw name can be present in both p & n Mos, if it's nmos then dnw ring is needed, for pmos no need dnw, if possible send a clear picture of your schematic to my mail id
Hi, my question is after we add the Deep NWELL in NMOS transistor here, i am having soft-connections issues, do we have any methods to sovle this? The error is "Net gnd is selected for stamping. Rejected nets: vee"
One of the most wanted video for layout engineers. Thanks a lot for that...
I'm getting a ERC error, saying floating psub not allowed. It is coming when i connected the isolated pwell to some other node other than the global psub connection(we are using dnw device for this purpose only). Even in your video also you got an ERC error i think it is same as the error that I'm also getting. Is that error ignorable ? or Is there a way to correct that error ? please help !!
Psub error you can ignore, this can be cleared in top level
@@analoglayout Thanks for the reply. Soon I'm going to finish the top level layout of my chip for the tape-out. It would be very helpful for me if you could tell how that error can be cleared in top level.
Add one psub ring in top level or sub block level and connect that psub rig into ground
@@analoglayout Thanks for the reply. In my circuit only one mosfet is dnw mosfet and its body is connected to some node not to the ground and all the others mosfets body is connected to ground and I have drawn the psub contacts and connected to the ground. Is this what you are suggesting ?? If so still the error is there. The "floating psub error" is coming and its highlighting the isolated psub of the dnw device. When i connected the isolated psub also to the ground then that error is going(this is not what i wanted).
It's a pmos or nmos, bcos dnw name can be present in both p & n Mos, if it's nmos then dnw ring is needed, for pmos no need dnw, if possible send a clear picture of your schematic to my mail id
Hi, my question is after we add the Deep NWELL in NMOS transistor here, i am having soft-connections issues, do we have any methods to sovle this?
The error is "Net gnd is selected for stamping.
Rejected nets: vee"
It's a ring error, you have to look out for guard ring connection
Hi
Where to Deep N well 3terminals need to connected
One is global ground
Plus is to active device
Minus terminal where connect?
Global ground
Sir if pmos and nmos is present in this deep n well then how can I do tapping as well biasing for pmos?
can you tell us about 6 terminal devices in tsmc library. an inverter example would be very good.
Sure,my friend ... Asap
Can you please tell me which technology it is ??
Tsmc 65 nm
Hi, my question is after we add the Deep NWELL in NMOS transistor here, i am having soft-connections issues, do we have any methods to sovle this?
It's a vdd or gnd connection is missing in the device or ring
Hi Sir
Can you do a video and tell us how lvs is working in calibre
Where i can find Deep N-well in layout window? How to draw? sir... You didn't tell about how to draw deep n well
I will add new video asap to cover this topic