A better and simpler description of Direct-Mapped is to consider each set as a completely different physical cache block, not as a part of a single cache. So for example K=1 You have 1 cache block that holds 1 red cache line. You have a different cache block (instance) for blue etc.
I think that you need N < M/3 because the segments aren't guaranteed to fit into the cache efficiently because the cache is stored line by line. If the line size is x bytes, the worst case would be a segment of x+2 bytes which went just over the beginning and end of a line, and so you would need 3x bytes of cache to store x+2 bytes of data. In the limit as x grows, this means that you need N
Cache doesn't know which memory is stack and which is on heap. They're the same plain ram memory for cache. But by nature, stack is more cache friendly because usually things in stack are very close to each other.
*My takeaways*
1. Cache hardware 0:35
2. Fully associative cache 4:32
3. Direct-mapped cache 7:40
4. Set associative cache 11:50
5. Taxonomy of cache misses 14:45: cold miss, capacity miss, conflict miss, sharing miss
- Conflict miss example 19:20
6. Ideal cache model 26:38
7. Cache analysis of matrix multiplication 42:40
- Tiled matrix multiplication 54:00
- Divide and conquer 1:02:00: Cache-oblivious algorithms 1:12:37
A better and simpler description of Direct-Mapped is to consider each set as a completely different physical cache block, not as a part of a single cache.
So for example K=1
You have 1 cache block that holds 1 red cache line.
You have a different cache block (instance) for blue etc.
It would have been nice if the lecture included a live demo (e.g.: a benchmark [Yes, I just really like benchmarks]). 🤔
Benchmarks are always nice 👍
34:37 anyone knows why do we need to particuarly assume N < M/3, not just N < M? Seems it doesn't affect the derivation below...
I think that you need N < M/3 because the segments aren't guaranteed to fit into the cache efficiently because the cache is stored line by line. If the line size is x bytes, the worst case would be a segment of x+2 bytes which went just over the beginning and end of a line, and so you would need 3x bytes of cache to store x+2 bytes of data. In the limit as x grows, this means that you need N
These students are basically paying for someone to read them a text book.
💯
Isn't the stack also cached?
Cache doesn't know which memory is stack and which is on heap. They're the same plain ram memory for cache. But by nature, stack is more cache friendly because usually things in stack are very close to each other.
I think such topics should have been taught by Prof. Leiserson himself.
"Who doesn't care"
Uhhhhhh yeah... |Raises hand|
Andreas.kristanto.the.power.tuhan.fisika.production.alat.tools.good.Mit.open.course.ware.looking.good