DRAM - circuit ,read and write operations

[@ShrenikJain]

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[@oheldad]

thanks a lot , instead watching 2 hours lecture , watched it out and understand very well

[@shaikakbarali846]

Smooth Shrenik bhai Smooth!! Best explanation in less time...

[@pseudohawk1656]

You explained it sooo simply man!!. Thanks

[@jobsearcheasy4294]

itne ache se koi padhi hi nhi sakta #simplified

[@akshaiambro702]

pwoli pwoli..#GRATITUDE

[@445gautam]

Bahoot khoob,its going to help me a lot during exams. thanks a lot.

[@ShrenikJain]

welcome :)
share with your friends as well :)

[@shraddhachakor8065]

Woaaaah 🔥🔥🤸🏼‍♀️

[@drummatick]

i didn't get how does Cs shares its potential to the data line. Mosfets do not work like that. The only way it can alter the potential at data line is to make flow a current and that could only happen if Vds>Vgs-Vt( saturation )

[@SubashKannoth]

This video is misleading !!! I agree with you. This is pseudo science!!

[@PradeepYadav-fg2yg]

nailed it bro you are saviour!! 🙏

[@anveshka]

What will be the role of Cl capacitor in write operation?

[@vedanshkatara8447]

Very easily explained rhe process.. Nice

[@ShrenikJain]

Ty

[@shilpa1949]

drain of transistor is connected to capacitor. ?

[@vamosabv]

Well done bro, well explained!

[@hamedaria7504]

How read info dram?

[@ramilawijesuriya7259]

Excellent !! Thanks

[@chiragmaru1515]

I didn't get vdd/2.
What's that..

[@dgaborus]

He sais that the voltage sum will be 2 x (vdd/2) because of the external capacitor, but that is complete nonsense. They are in parallel.

[@ShrenikJain]

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[@GaneshJadhav-us7zx]

Thank you sir...nice explanation...

[@anamsrinivas6674]

what is vdd/2

[@maazkhanpanezaimaazkhanpan608]

Great information bro

[@sandeepsemwal5436]

This is 1T-1C (1 Transistor and 1 Capacitor) DRAM, not 1T-DRAM. 1T-DRAM (or capacitorless DRAM) is different technology where we don't need capacitors. Please correct

[@maazkhanpanezaimaazkhanpan608]

What is vdd/2 plz reply must

[@DeepakKumar-so8rc]

When DL is made 1 or 0, then would it not affect the voltage across precharged capacitor by increasing or decreasing it's value from Vdd/2??

[@sss2393]

very helpful thanks

[@mohithreddy2315]

hi shrenik, can you explain about 1T - SRAM cell

[@CurmeThackeray-m1d]

Kihn Station

[@rishavsrivastav3468]

Is pre charge required in write operation?

[@ShrenikJain]

rishav srivastav
Yup

[@rishavsrivastav3468]

Shrenik from which CLG r u? Very clear concepts..

[@ShrenikJain]

rishav srivastav
Kjsce vidyavihar

[@rishavsrivastav3468]

Shrenik Jain have u given gate ? If so wat was ur air.?.. u r just outstanding

[@ShrenikJain]

rishav srivastav
I am in sem7
Will give upcoming gate2018
1st attempt

[@IF9]

thanks

[@rishabhpareek5205]

Brother 4 t dram ki working ho toh pls

[@ShrenikJain]

Rishabh Pareek
Similar to 6T dram working
Do watch 6t dram

[@bhavyabhatnagar8732]

Jhaat ni h uske paas.. hahahaha

[@akhilburada4524]

Use pen bro instead of marker

[@BrianRosenthal-m4e]

Diego Shore