if you use switch cases or if statements the cpu will take more time figuring out whether the imposed condition is true or false, i am fairly new to verilog but i've learnt C, embedded C and assembly, so i was wondering, can you use decoders or encoders instead of MUXs and DEMUXs in order to avoid conditional statements?
@@paulfranzon2229 That's good. Thanks. When you mentioned the full course, I thought you meant as you'd taught it to your students, but that it wasn't covered in your UA-cam videos.
My professor is having us write a decoder in Verilog, and I understand the code, but I can't find a single example of how to compile the code or what the output of the code is supposed to look like...
@@paulfranzon2229 Hello Paul. Is there any way I can access the sub module quizzes mentioned by you in the Digital Design online course? That would be very helpful. Thanks in advance.
The constant clicking in the background made if very hard for me to follow along to this otherwise good video. I have ADHD though, so maybe others weren't so bothered.
I must admit I dont know where the tapping comes from. Possibly its some artifact introduced along the way, possibly by the audio compression in Camtasis.
hello have you an email can l contact with you ? because I have a project and I need to help to do my project please. my project can make by verilog language
the k and aspirated k sounds are interchangeable in english, to the point where many native speakers can't tell the difference unless it's exaggerated.
What are you talking about? He's pronouncing it with his British accent what's your problem lol? Your accent is a lot worse for pronunciation, so I wouldn't be talking if I was you, at least his is one native to the English language.
This is so amazing. Your lesson was perfect,good job. Thank you
i learned some main ideas of verilog as a molecular biology and genetics undergrad, for understanding some synthetic biology coding. thank you.
I wonder if I fed my dog today.....that being said....thank you for the presentation. Very Helpful !
This cleared up a week's worth of confusion, thank you!!
There might be a problem at 6:15, where variable a is not defined. Otherwise, thanks, very helpful.
The quizzes are in our learning management system and not publicly accessible. Thanks for your interest.
Lots of questions but this was very useful. Thank you.
There's another way to implement the foo function. You can also do it like this:
always @(a or b or c)
case (a)
0 : foo = b | c;
1 : foo = b ^ c;
Kevin:
You need the begin and end if there is more than one statement following the always trigger.
Great work looking for more videos
For what b are used for and why D has not been declared as an input?
My whole semester of learning didn't make it as clear as this short video
Thank you very much
if you use switch cases or if statements the cpu will take more time figuring out whether the imposed condition is true or false, i am fairly new to verilog but i've learnt C, embedded C and assembly, so i was wondering, can you use decoders or encoders instead of MUXs and DEMUXs in order to avoid conditional statements?
decoders and encoders are still coded using case statements.
Thank you very much this is useful for beginners like me..:)
its Very clear for me now , thank you sir
I need to come back to this once I understand what kind of assignment that is (
This is covered in the full class playlist in the Verilog 2 section. Thanks for watching and the comment.
@@paulfranzon2229 That's good. Thanks.
When you mentioned the full course, I thought you meant as you'd taught it to your students, but that it wasn't covered in your UA-cam videos.
@@TooSlowTube The full course can be found at ua-cam.com/play/PLfGJEQLQIDBN0VsXQ68_FEYyqcym8CTDN.html . This is covered in the Verilog2 section.
@@paulfranzon2229 Excellent. Thanks, Paul.
Is it really necessary to have the begin and end in the verilog module for flipflop?
very helpful, thank you!
Thank you very nice video
What is difference between Standard verilog, power verilog and fast verilog?
i cant find this link mentioned in the video .. showing error 404
Thank You Sir....
My professor is having us write a decoder in Verilog, and I understand the code, but I can't find a single example of how to compile the code or what the output of the code is supposed to look like...
You need a synthesis tool. You can download the student version of Quartus from Alterra (now Intel) for free.
@@paulfranzon2229 Hello Paul. Is there any way I can access the sub module quizzes mentioned by you in the Digital Design online course? That would be very helpful. Thanks in advance.
thank you
Good fucken video thank you sir
thank you very much!
very good lecture,... thank you sir
Thank you.
Sir,
Can we convert a C language code into verilog .
Not very efficiently
Very good
Dead link... :(
yes
The constant clicking in the background made if very hard for me to follow along to this otherwise good video. I have ADHD though, so maybe others weren't so bothered.
I must admit I dont know where the tapping comes from. Possibly its some artifact introduced along the way, possibly by the audio compression in Camtasis.
Thanks!
hello
have you an email can l contact with you ? because I have a project and I need to help to do my project please. my project can make by verilog language
A search engine turns me up. My affiliation is clear from the slides.
@@paulfranzon2229 thanks🌸 I send you an email I hope to help me please
👍👍
Sir thank u
IMHO: Real hardware is continuously evaluating an expression, not just when the inputs change.
why u people pronounce code(which is "kode") as "khode"
Himanshu Doley Dear sir, he is trying to teach you something important. Don't ask stupid questions about his accents!
the k and aspirated k sounds are interchangeable in english, to the point where many native speakers can't tell the difference unless it's exaggerated.
What are you talking about? He's pronouncing it with his British accent what's your problem lol? Your accent is a lot worse for pronunciation, so I wouldn't be talking if I was you, at least his is one native to the English language.
Cover (kover) as khover
Not everybody is a poop-juggling street shitter like you bro
For what b are used for and why D has not been declared as an input?
b is an input do this module. D is not since its the ouput of a gate inside the module (a mux.)