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0:05 Part 3: Circuit Verification4:46 Part 4: Functional Verification5:43 Testbench-Based Functional Testing9:55 Simple Testbench11:44 Self-Checking Testbench17:16 Automatic Testbench22:09 Part 5: Timing Verification25:42 Meeting Timing Constraints
Very clear informations
I wonder if something like TLA+ could be used for defining the golden model, verifying it, and generating test patterns via its usual state space exploration. Obviously not possible for every state in realistic circuits
0:05 Part 3: Circuit Verification
4:46 Part 4: Functional Verification
5:43 Testbench-Based Functional Testing
9:55 Simple Testbench
11:44 Self-Checking Testbench
17:16 Automatic Testbench
22:09 Part 5: Timing Verification
25:42 Meeting Timing Constraints
Very clear informations
I wonder if something like TLA+ could be used for defining the golden model, verifying it, and generating test patterns via its usual state space exploration. Obviously not possible for every state in realistic circuits