Launching CXL Memory in Hyperscale Deployments with a Holistic CXL Ecosystem

"Chris Petersen (Fellow Of Technology And Ecosystems) - Astera Labs
Prakash Chauhan (Hardware Technologist) - Meta
Compute Express Link (CXL) specs and CXL memory have been in development for a few years as the ecosystem works through the HW-SW challenges of deploying a new technology. Several use cases have been previously discussed with many Hyperscalers focusing on deploying CXL memory as tiered memory to reduce server TCO. This presentation focuses on the critical ingredients necessary for deploying a holistic CXL memory solution in a hyperscale environment for tiered memory use cases. These include CXL memory controllers- boards- firmware- fleet management- RAS- and security components- as well as tiering software for production applications to continue to run seamlessly. We will touch on the detailed interoperability validation required for interfacing with diverse CPUs and DDR memory offerings to complete the solution. We will demonstrate that all the necessary components are not only implemented for functionality but hardened to support the deployment of CXL memory in at-scale environments."