I really love the hand drawn diagrams and the pull-the-paper-away reveals. No dumb animations that are all flash without actually enhancing the knowledge being shared.
@@el_chivo99 no, 3b1b leverages the animations quite effectively in most of his videos, eg: quaternions. But since he can't just change up his style every video just because he doesn't need it, he animated most of them, he talks in front of a camera or does what Ben does in the rest.
Same, but it makes me wonder. He writes and draws on them during the video. Does that mean he never does retakes? Or does he redraw the entire "slide deck" for a retake?
That was awesome when the carry in on the first adder swooped in like a hero at the end to bring us to two's complement! Really enjoying these, thanks for your time and effort!
I really is fucking amazing when he brings such a simple and elegant sollution to a seimingly tough problem. It had me wandering why the hell would he draw the active inverter circuit so close, like where and how is he going to draw the adder for the missing bit, and then BOOM! a misley little cable connecting the inverter enable to the carry in solves it all in one merciles swoop.
Very satisfying indeed. Also, the carry out of the second adder might be used as a signal of an overflow, and for example stop the clock or something...
lol even before he showed how to invert the signal, I was already like "oh, and for adding one he can just use the carry thing on the 4 bit adder" so then he says "it just so happens that our 4 bit adder..." me: "do it! do it!" him: "...has a carry in" he draws the line me: "oh my god! oh my god! he did it, he drew the line! I feel so smart right now!" I never thought i'd ever be this excited about a line...
I remember when I first saw the method of converting the second input to 2s complement using xor gates and the carry-in, and I was simply fascinated at the genius and simplicity of it. This is the kind of stuff an engineer needs to be able to do, and I hope I can keep up with stuff like this.
I am still amazed by this series of videos. This is simply magnificent. I do not even know how to explain how much I appreciate your tutorials. Thank you so much for this open gift to all people who looks for understand how a computer works from scratch. As a PhD student in particle physics who never found college instructive I can honestly say this is how things must be taught in any branch of knowledge. Thanks again!!!
What I really enjoy about these videos is Ben will introduce a system or premise but not overwhelm you with everything in one go, but rather reveal things as they're necessary. Loving these videos and really appreciate the preparation you go through in order to make it as clear as possible!
Yeah, the first time I saw it during a computer organization class, I was surprised. It's so simple yet so ingenious (as well as the xor gate thing) this is the kind of engineering prowess I hope to achieve. It's all in the simple stuff like this.
@@hayden.A0 Can relate. The solutions that stoke me the most are the simplest ones which don't compromise on optimisation. And it is the case, most of the times, that it is better to use a solution because it is simple and thus is even better in optimisation.
@@thakermahek2501 you need 2x 7483 ic(4 bit parallel adders), 2 7486 ic (4 for gates), then connect the 2 adders such that c4(carry 4) of first adder is connected to c0 of the second adder. Connect each B input of the 7483 ics to output of an xor gate and short 1 input of all xor gates and connect to c0 of first 7483 ic. Now the inputs are given to a0-a7 of 7483 ics and to other input of the xor gates, by giving 1 to c0 of first 7483 ic you get A-B by giving a 0 to c0 you get A+B, A-B is outputted in 2s complement form, because the xor gates with one of their input as 1 act like not gates and invert the bits of the other input so you get B complement which is added to A By the adder ic and a 1 from c0 is added to the result which makes it 2s complement instead of 1s complement, you can also get 1st complement by simple modifications as well.
@@prateekmahajan1929 bhai.... Tnnk u so much for this information, it means a lot for me. Bt brother yet i hve some doubt so can we share our contact number or email id through which i can get u... My id 17ec.mahek.thaker@gmail.com
Fantastically beautiful design! I am a software developer, and these days maybe only 1% of developers know how the processor is working on the very low level of registers, logic gates and transistors. We just write high level code and have no idea how it is processed 😅
I think I have watched this video over 5 times; not because I am having difficulty understanding it, this IS a Ben Eater video after all. No, it is because I just love the carry in twist. Pure paracetamol.
You're the best tutor I've had! I went through five tutors a while back: two of which were through a professional tutoring agency and zero of which were provided by my school because they didn't have any. In all cases the reason for lack of qualified tutors was because no one understood any of this. I needed to understand this stuff for programming classes I was taking. Thank you!! And, finally!!
Definitely better than my university course as always. Idk why YT videos have became better learning platforms than most schools. Don't go to uni guys you can learn everything online
i dont have components to play with but i found this piece of software that allows you to design and simulate circuits with logic gates and i made a 8 bit addition and subtraction circuit and when i got it to work it was the most amazing thing ever. This is without a doubt the most fun part of computers.
I recommend reading the book 'But How Do it Know', it's a great book about computer architecture and even though I am a software developer, and not a computer engineer, it still helped me to understand a ton about computer languages, especially assembly.
A good companion to this video series is the Coursera course "Nand to Tetris." The course itself doesn't actually reach Tetris -- it was going to be a 2 part course but I'm not sure they ever got around to recording part 2 -- but the book the profs wrote does. Essentially it's a computer architecture course where you build a 16 bit computer in simulation using a simplified HDL. They give you two 'givens' -- a nand gate, and a D flip-flop. The exercises have you build the rest. First you build the simple logic chips -- NOT, AND, OR, XOR, and so on. Then you build a half adder & full adder, then a register, then multiplexers/demultiplexers, then a single RAM chip, then a much bigger RAM, before going onto an ALU and then a full CPU. The final project is to write an assembler for the machine code for the machine you just 'built.' Again, it uses a version of an HDL (a programming language that is used to describe digital logic chips), so you're not actually playing around with breadboards, but you still get to see how everything works. They provide a pretty good simulator that shows the values of registers, as well as providing a simple simulated monitor for graphical output. For me, the biggest OMG moment in my entire experience learning CS was when I realized that all an opcode is is a set of 1s and 0s that are used as inputs into control lines for chips. Learning that felt like I finally got a satisfactory answer to the question I had had since I was a kid -- "Okay, it's all 1s and 0s, but how does it _do_ stuff??" (This is probably more of a helpful mental model nowadays than the reality of modern superscalar CPUs, given microcode and so on, but still deeply satisfying.)
I was wondering why, when programming for the 6502, you generally _clear_ the carry bit before adding but _set_ the carry bit before subtracting. Not anymore. This is brilliant.
nice ! finally i can continiue with my 8bit computer !! i was waiting this video and i will wait for the rest of them so i can build my 8bit computer !! i am 15 years old and i love binary greetings from greece ! keep up !!
These videos are so relaxing and mesmerizing. The clarity and patient, thorough examples in yoru explanations are just amazing. I know this is an ancient video but if you're still readin comments on it, I just want you to know. You rock! This is really awesome.
Excellent videos! I love all of these. I gave you a thumbs up. I especially like your use of XOR as a conditional negation for subtraction, and that was a very easy and clever way to add 1 using the carry-in.
If the Carry has to be kept (for handling bigger data sizes), then another XOR gate should be included, with one input acting as Carry IN, the other as Enable SUBSTRACTION (connected to the XOR conditional negation input). The output is then connected to the Carry input of the Adder. Will work with both Addition and Subtraction.
Hey Ben! I just wanted to say you are the best teacher I've ever seen. I'm a mechanical engineering student and I've never seen explanations as good as yours. I really love your channel and your videos! PS: It has been a while since the last time I got surprised by tricky solutions, 13:30 just blew my mind
Really excellent, I am learning a lot. I sort of knew it before but this makes it very clear as I work my way through all of your videos. Thank you for taking the time to make these videos.
The ALU carry that is used for subtracting is a bit interesting because if you look at e.g. the 6502 processor (by MOS/Commodore) you actually have to do a SEC (set carry) before you do your SBC (subtract) in order for there to be a correct 8 bit subtraction (ofc when doing 16 bit subtracts you actually use whatever carry was from the lower 8 bit subtract when you do the 8 upper bits). Same when doing an ADC (add) you do a CLC to clear the carry (again used to carry oveflow from previous add if doing a 16 bits addition). This video sort of explains everything perfectly.
Having the carry set depending on whether the operation is add or subtract, will limit you to doing 8 bit math. Possibly why the 6502 required setting or clearing the carry, so the carry flag could be input into the ALU from the result of a previous addition or subtraction, rather than having it fixed by operation. Does give you an insight into the ALU of the 6502 though, they must have just used the ones complement (the XOR gates) and rely on the programmer to set or clear the carry correctly.
@@threeMetreJim No it does not. Even if you have 128 bit number the two's complement is invert and add 1. It is not invert 8 bits sequences and add 1 to each. So to substract two 16 bit numbers in 8 bit chunks you set the carry on lowest 8 bits and use the carry resulting from that on the higher 8 bits. And just continue to do that if you want 48, 64 80, 96 or what not bit subtraction.
@@topilinkala1594 I know how to do multiple byte addition and subtraction. What I was trying to say that the programmer has to set/clear the carry - if the instructions cleared the carry for adc and set it for sbc, you would not be able to do multi byte addition or subtraction (you'd lose the carry or _borrow from the previous adc/sbc operation). The sbc instruction is only performing the invert, the programmer supplies the +1 through the carry flag (set).
@@threeMetreJim Why wouldn't addition and subtraction not set the carry? That would be stupid processor design. Even this dincky SAP-1 based processor has the carry line.
@@topilinkala1594 before the instruction is executed, not after - hence having to manually set or clear the carry before the first adc or sbc instruction (or the only one), which is what the OP was saying - I was describing the processor internal circuitry (XOR'ing the data with all ones is an invert for the 1's complement before setting the carry for a subtraction). If you build up some logic gates into a set of cascaded full adders, then the initial state of the carry is set by the programmer. Maybe it was done to save space on the chip - it was 1975 after all. For subtract you invert the data you are subtracting, and setting the carry is the +1 for two's complement. For addition you don't invert the data and clear the carry. If you want to play with things manually, program some 8 bit PIC16 code in assembly... Also watch the videos on designing your own simple CPU - the designers left out the set or clear carry per instruction. It was implemented in logic, rather than use a lookup ROM and microcode on the 6502.
Great series! My one comment is that in ALU, the word arithmetic is actually an adjective (and it's pronounced like AIR-ith-MET-ic) describing the type of logic, it's not an "Arithmetic and Logic Unit"
Man this guy deserves more views its dumb that everybody is to interested in v-logs and Minecraft lets plays (which I have watched a few) but keep up the good work!!
This technology is nothing short of amazing. Whoever thought of all this, I hope they experienced true prosperity and happiness. One of the small, but nonetheless incredible pinnacles of human achievement.
Actually, not really. If you add a positive number with a negative 2's compliment, it always has a carry that we basically ignore. An actual overflow indicator for a 2's compliment adder has to check whether both numbers with the first bit are 0 have a result with first bit 1 or the inverse. Basically, in the first case would mean that you're adding two positive numbers and having a negative result, or the inverse. A logic for that would check if both register's first bit have the same value and if the result has a different one.
If you add two unsigned numbers and get a carry out then you have overflow. If you subtract two unsigned numbers A-B by adding A and the two's complement of B, then if you don't get a carry out have underflow (borrow out). If you consider your numbers to be signed from the beginning, the conditions are different, then I believe you have overflow if the carry into the highest bit is different from the carry out of it; there are other ways to formulate the condition as well.
13:30 The whole time I was wondering how to add one, I was thinking maybe store and intermediary number and then use the 8 bit adder to add 1. And then, mind blown, use the carry in ^^
"So we need to take the two's complement. We invert everything with this xor gates and then..." Oh, right, probably gonna need an extra adder to add one after inverting, that's gonna look complicated. "we just set the carry-in to high to add one" 😯😲🤯
very nice. I would have added an AND gate to the CI input, one input coming from SU and another comes from an enable EN, this is to prevent possible errors to times due to gates delays in transmitting the data, having the EN on the AND ensures that everything happens step by step instead of throwing the data on the bus.
Why error? There is nothing erroneous in it. But you can use it as a carry flag in your status register to indicate e.g. that there was an overflow during addition, or to be used in a subsequent addition to emulate 16-bit arithmetics, or as a flag indicating difference in comparison instructions ;)
i stand corrected, i was too quick to call it an error signal, but rather a flag that could be seen as an error signal, just made me realise that all signals are errors until we flag/use them, thank you!
Dale Smith No problemo ;) Later on you can also use a zero flag which is useful in comparisons: it indicates equality of numbers when you subtract them. Just a simple NOR of all the output lines will do ;) Some processors (like MOS Technology's 6502 used in those old Atari & Commodore computers and Nintendo consoles) also use an additional carry flag from 3rd to 4th bit for binary-coded decimal (BCD) arithmetics. Kinda useful for counters in games, because one can easily convert such BCD numbers to their corresponding character strings ;)
Bon Bon Yeah! I can see the NOR gates working to compare, could you go even further to compare the most sig bits to see which number is bigger too? I don't understand the carry flag you're talking about, you make it sound like certain bytes of info have additional info encoded into them?? if so thats cool! if not then would this be possible? lol. Could you read a byte one way for a certain piece of info, then read it another way for another? Also makes me think about how to order info in memory, it seems so arbitrary in my mind, if the layout of the data itself could be used to extract info from then that would make programs more efficient??
Could you write a program where the order of the information itself can be used the encode how the information itself should be manipulated?? a kind of program within the data??? my head hurts
Yeah, me too :/ The damned control unit and sequencer - the least documented parts of the CPU in every course I could find so far. So this is the part I'm waiting for the most.
Hi, I'm a teacher assistant in the university in a course of computer organization and will recommend these videos to them. Also, do you happen to explain how to set the flags when doing subtraction, especially how you modify the carry out to indicate borrow (since this is the part where students struggled the most)
There’s no need to “modify” the carry-out for subtractions. It just works as is, only that it has an inverted meaning. All processors use that convention
It occurred to me that you could make this "ALU" (which is really only an arithmetic unit) into a proper ALU by adding more circuits to perform the missing logic operations, with a "rotate" possibly being the easiest to implement. You then just "gate" the outputs of every logic operation you've added so that only the selected result is sent to the A register. In other words, all of the calculations and logical operations are done, but only one of the outputs is used at a time, depending on the operation selected.
There are memory chips that can shift and rotate and there are memory chips that can increment the content. So you can use first kind for A and the second kind for B then have your instructor dechiper perform those funcitions in appropriate accumulator.
Correct me if I'm wrong, but instead of worrying about enabling the initial carry with the subtract enabled, can't we just leave off the XOR gate on the ones bit for the B register?
No, this would only apply if the 1s bit was initially high on the B register. Otherwise, if the 1s bit is low on the B register it would remain low and there would be no carry to the other bits. For example, if the B register has a value of 2, in normal operation this would be negated in the following way (assuming signed 8-bit integers): 00000010 B = 2 11111101 (NOT B) = -3 11111110 (NOT B) + 1 = -2 Whereas, if you omit the inversion of the 1s bit, we receive: 00000010 B = 2 11111100 (NOT B except 1s bit) = -4
When building the ALU do you need both registers? Cant you do the all the Arithmetic from the first Register and what ever program memory you plan on building in the future?
I'm rewatching this series for the fun (at this point I already know pretty much all of what's covered), but I think this is the first time I noticed that the adder chips say they're carry lookahead adders. Not a particularly important detail, but interesting.
Hello Ben ! I just watched all of your videos till this one in a row, and I must admit I am really impressed about your work ! (nice catch for the carry in technique to get your twos complement) I wonder why you use LS logic chips ? What does LS stands for ? I started a project a few weeks ago and went to HC chips, I was told they were faster and cheaper in terms of energy
Sorry for necroposting. Original chips were just 74xx. (for example 7400 for quad 2-input NAND). There were also low-consumption low-speed version called with letter L (low). Then the new technology emerged: TTL with shottky diodes which made IC faster at same consumption or of the same speed at lower consumption. These were called S (shottky) and LS (low shottky). At last, when CMOS technology became fast enough (first CMOS chips were 4000 series: very low-consuming but slow as hell), this new series HC was created, which means High (speed) CMOS. Unfortunately, HC may not be compatible with other: circuit made entirely from HC works fine, but when you use both HC and LS, there may be problems.
+Ben Eater, are you going to make some other arithmetic operations too? Like multiplication or division? The simplest way for multiplication is to emulate it with repeated addition, but it is also very inefficient, because it gets very slow as the multiplier gets bigger :P But there's another (better) way to do it, quite simple as well: with bit shifting & adding. You can do the bit shifting with a loadable shift register on one of your inputs, and then shift it 8 times to the left (multiplication by 2), and whenever there is 1 at that position in your multiplier, you also accumulate this shifted multiplicand into your output register. So it's pretty much the ancient Egyptian multiplication algorithm ;) It is better because the time needed to calculate the result doesn't grow linearly with the input, but it is a constant number of shifts & additions: equal to the number of bits of your data bus. If you don't want to use shift registers and do 8 subsequent shifts & additions, but you do have some more money to spend on adders, you can simply connect several adders together and instead of shift registers you can simply shift the wires to the right by one position for each of the partial adders. You also need some control lines to turn these shifted inputs on, controlled by the bits of the multiplier. This is the best solution because it can calculate the result in just one clock cycle! :) (but there might be some delay on the carries to ripple through all the adders).
InductiveOrange Well, this is pretty much what I meant by the last option: summing up the shifted (that is, multiplied by 2) partial results in parallel. If you look closely at the example circuit you linked, this is pretty much two adders made of two XOR gates and two AND gates and connected together in a certain way, and the additional AND gates are there to "gate" the input signals, the original one and the shifted one (because you can do the shift by just wiring them off by one wire). Unfortunately, such approach is less modular if you have all these gates fleshed out. It is easier to understand when you encapsulate all the pieces of the circuit in blocks and then connect these blocks together into bugger blocks etc. Then the design is more modular and it is easier to extend it to more bits.
So now you can input negative number only from register B? And if you then do the same to register A you can input a negative num. from both registers and sum 2 negative numbers right?
just a thought but how would you incorporate and use a shifting "slide rule" in these ALU, and would it increase 8bit/16bit calculation speeds to assist (x264/x265) integer style assembly instructions hardware as a practical 2019 real life use case ?
Let's say for an alu I was using many 74f181's can I just link the cn+4 output and the following cn input together (I'm using 16 of them by the way). I was wondering if I needed to use the 74f182 with all of those or i can just connect the cn and cn+4? together thanks ahead of time.
Decimal places are normally done with floating point values. These would be not very useful at 8 bits because those 8 bits would need to be split between the sign (1 bit), significand (maybe 4 bits) and exponent (3 bits) and would be very time-consuming to implement in logic gates. Fixed point arithmetic (where the exponent is fixed in advance) would be possible, but that's because it can be done with the same instructions as integer arithmetic: the programmer just has to remember that a given memory location is fixed point and so means e.g. an eighth or a 256th of the integer stored there. It's possible that 16-bit floating point could be implemented in software on this device using two memory locations next to each other though. Multiplication and division even of integers would take a lot of logic gates, but again could be implemented in software.
I have a problem my registers I can not verify my registers on buss. When I set the LOAD to low , LEDs ( of registers) turn on but when I put the ENABLE to low it does not output on the bus .
So, if you are trying to add two negative numbers, the A will be set as a negative by program? Why can't the same be done for the B? Or it would take something like A=0-B prior? Or it just isn't possible? Or is it in the next episode? Edit: Ah, I get it. The numbers will be programmed as negative for both A and B if necessary, and the invertors will only change the addition/subtraction, kk. The +(-5) sent me in the wrong direction :D
Z80 used a 4 bit ALU. (first it calculate bits 0-3, and stroed on register, then it calculate bits 4-7, and send 0-7 to bus) wouldn't this way have been easier for you too?
I've a dumb question, Can you just have registers and ALU conected by the same bus? I see in the diagram that you connect directly A and B registers directly to the ALU and Kind of makes sense, and have a porpuse have 2 registers but, there is a way to just conect all to the same Bus right? obvisly is not gonna be efficient but, it works, Am I right? (I know ALU should be share an I/O bus in that case)
No: conventional and-gates output 'active' 0 signal which would conflict with other outputs to the same bus. So you need either tri-state buffers, so you are totally disconnected from bus when inactive, or you could make bus with open collector or-gates and common pull-up resistors. Not recommended, because it works slower than conventional bus. Or, instead of bus, you could use multiplexer for all the devices you have. That's the only way it is done on FPGAs which surprisingly don't have tristate logic 'inside', only for I/O pins.
Why don't you make the carry out of the second adder go into anything? Wouldn't it be good to have that go somewhere that could alert a user that there was an integer overflow?
Tyler Hilbert A sidenote: carry out does not indicate overflow. You can't just set your OF flag to the state of carry out. An ALU can have a carry out and not be in overflow state. They are separate things (deceptively so).
13:40 What if we want to use that carry-in for an actual carry-in too? E.g. to pipeline calculations on some longer numbers? (in which case the carry out from the previous sum stays in the carry flag, and then it is used in the calculation of the next part of the sum).
Use another XOR gate, and connect one of its inputs to the "enable negation" input of the XOR array and use it as "enable subtraction" onwards. The other input of the XOR gate is used as the carry-in, for both addition and substraction and the output is connected to the carry input of the adder chip. I used that for my test ALU in Logisim, and it works. In addition (not exacly required), you could use another XOR gate, to fix the carry-out polarity of the adder, since it is inverted when substracting. One input of the XOR gate is connected to the "enable subtraction" input, the other to the carry-out of the adder. The output of the XOR gate is afterwards the fools-proof carry-out, for both addition (most call it carry) and substraction (some call it borrow).
Most processors (that have flags anyway) have instructions for add with carry and subtract with carry / subtract with borrow in addition to their normal add / subtract. Add with carry just means that you use the carry flag for the carry in, instead of setting it to zero. For subtraction, you have to choose how to interpret the carry flag (different processors do this differently) * carry high means borrow (e g x86) * carry low means borrow (e g 6502) The first version is more intuitive to me, but then you need to invert the carry flag going in and out in case you're doing subtraction. So you need to add some logic to either take a hardcoded carry or feed in the existing carry flag (plus maybe the xor stuff above). The 6502 actually only has add with carry (adc) and subtract with carry (sbc) instructions. If you want to do a regular add then you need to clear the carry first, and if you want to do a regular subtract then you need to set the carry flag first. That's a way to solve that logic in software I guess :)
So, I have a question; If I have a subtractor and adder, how could I 'store' the values? For example, there is absolutely no difference between 15 and -1, so, how could I store those without an extra bit? My only guess would be to slash the number of inputs, so that the only maximum output for a 4 bit ALU would be 7, with the minimum being -8.
It's been 3 months, but... just in case, and for anyone else reading: The 8-bit representation of 15 is 0000 1111. The 8-bit representation of -1 is 1111 1111. The highest value you can store is 0111 1111, which is 127. If you want to add 1 to 127 and store 128, that would be 1000 000. Tough luck, because that's the representation for -128. You just got an integer overflow.
So I was thinking to build this PC but I found that some of ICs( Ram, Registers and EEPROM) are discontinued and nowhere to found. (Found some but with insane price tags). Can anyone suggest replacement parts for these?
I really love the hand drawn diagrams and the pull-the-paper-away reveals. No dumb animations that are all flash without actually enhancing the knowledge being shared.
Exactly, I am glad someone else agrees!
shots fired @ 3b1b. also love the hand drawn sketches
@@el_chivo99 no, 3b1b leverages the animations quite effectively in most of his videos, eg: quaternions. But since he can't just change up his style every video just because he doesn't need it, he animated most of them, he talks in front of a camera or does what Ben does in the rest.
Same, but it makes me wonder. He writes and draws on them during the video. Does that mean he never does retakes? Or does he redraw the entire "slide deck" for a retake?
No kidding ❤🎉 i think using paper is seriously the best way
That was awesome when the carry in on the first adder swooped in like a hero at the end to bring us to two's complement! Really enjoying these, thanks for your time and effort!
I really is fucking amazing when he brings such a simple and elegant sollution to a seimingly tough problem. It had me wandering why the hell would he draw the active inverter circuit so close, like where and how is he going to draw the adder for the missing bit, and then BOOM! a misley little cable connecting the inverter enable to the carry in solves it all in one merciles swoop.
So satisfying
Very satisfying indeed. Also, the carry out of the second adder might be used as a signal of an overflow, and for example stop the clock or something...
u funnyman
I felt the same way, how fucking clever is that!
lol even before he showed how to invert the signal, I was already like "oh, and for adding one he can just use the carry thing on the 4 bit adder"
so then he says "it just so happens that our 4 bit adder..."
me: "do it! do it!"
him: "...has a carry in"
he draws the line
me: "oh my god! oh my god! he did it, he drew the line! I feel so smart right now!"
I never thought i'd ever be this excited about a line...
ya
I love it when something like that happens :-)
Totally predicted it too, and felt very proud!
Me 10
I remember when I first saw the method of converting the second input to 2s complement using xor gates and the carry-in, and I was simply fascinated at the genius and simplicity of it. This is the kind of stuff an engineer needs to be able to do, and I hope I can keep up with stuff like this.
I am still amazed by this series of videos. This is simply magnificent. I do not even know how to explain how much I appreciate your tutorials. Thank you so much for this open gift to all people who looks for understand how a computer works from scratch. As a PhD student in particle physics who never found college instructive I can honestly say this is how things must be taught in any branch of knowledge. Thanks again!!!
What I really enjoy about these videos is Ben will introduce a system or premise but not overwhelm you with everything in one go, but rather reveal things as they're necessary. Loving these videos and really appreciate the preparation you go through in order to make it as clear as possible!
number of surprises is equal to the number of A4 papers
13:30 that carry in solution blew my mind
Hello my quarantine friend :D
Was the best part of this video
Yeah, the first time I saw it during a computer organization class, I was surprised. It's so simple yet so ingenious (as well as the xor gate thing) this is the kind of engineering prowess I hope to achieve. It's all in the simple stuff like this.
slick af
@@hayden.A0 Can relate. The solutions that stoke me the most are the simplest ones which don't compromise on optimisation. And it is the case, most of the times, that it is better to use a solution because it is simple and thus is even better in optimisation.
@@Mayank-mf7xr Yeah, totally agree.
Ben, I would just like to thank you for taking the time to make these videos. They are brilliant! Thank you.
"The different between 1's complement and 2's complement is 1", Awesome
Brother Bt how could I do or perform it on bred bod?
@@thakermahek2501 you need 2x 7483 ic(4 bit parallel adders), 2 7486 ic (4 for gates), then connect the 2 adders such that c4(carry 4) of first adder is connected to c0 of the second adder. Connect each B input of the 7483 ics to output of an xor gate and short 1 input of all xor gates and connect to c0 of first 7483 ic. Now the inputs are given to a0-a7 of 7483 ics and to other input of the xor gates, by giving 1 to c0 of first 7483 ic you get A-B by giving a 0 to c0 you get A+B, A-B is outputted in 2s complement form, because the xor gates with one of their input as 1 act like not gates and invert the bits of the other input so you get B complement which is added to A By the adder ic and a 1 from c0 is added to the result which makes it 2s complement instead of 1s complement, you can also get 1st complement by simple modifications as well.
@@prateekmahajan1929 bhai.... Tnnk u so much for this information, it means a lot for me.
Bt brother yet i hve some doubt so can we share our contact number or email id through which i can get u...
My id 17ec.mahek.thaker@gmail.com
Fantastically beautiful design!
I am a software developer, and these days maybe only 1% of developers know how the processor is working on the very low level of registers, logic gates and transistors. We just write high level code and have no idea how it is processed 😅
I think I have watched this video over 5 times; not because I am having difficulty understanding it, this IS a Ben Eater video after all. No, it is because I just love the carry in twist. Pure paracetamol.
The implementation came together so elegantly with the xor inversions and the carry in adjustment. Blew my mind!
You're the best tutor I've had! I went through five tutors a while back: two of which were through a professional tutoring agency and zero of which were provided by my school because they didn't have any. In all cases the reason for lack of qualified tutors was because no one understood any of this. I needed to understand this stuff for programming classes I was taking. Thank you!! And, finally!!
No you didnt.
Definitely better than my university course as always. Idk why YT videos have became better learning platforms than most schools. Don't go to uni guys you can learn everything online
I love that I could easily build all of this solely from logic gates or even just transistors with these videos
i dont have components to play with but i found this piece of software that allows you to design and simulate circuits with logic gates and i made a 8 bit addition and subtraction circuit and when i got it to work it was the most amazing thing ever. This is without a doubt the most fun part of computers.
I recommend reading the book 'But How Do it Know', it's a great book about computer architecture and even though I am a software developer, and not a computer engineer, it still helped me to understand a ton about computer languages, especially assembly.
Arseniy 7
@@grantwhite1144 that book actually led me here
A good companion to this video series is the Coursera course "Nand to Tetris." The course itself doesn't actually reach Tetris -- it was going to be a 2 part course but I'm not sure they ever got around to recording part 2 -- but the book the profs wrote does. Essentially it's a computer architecture course where you build a 16 bit computer in simulation using a simplified HDL. They give you two 'givens' -- a nand gate, and a D flip-flop. The exercises have you build the rest. First you build the simple logic chips -- NOT, AND, OR, XOR, and so on. Then you build a half adder & full adder, then a register, then multiplexers/demultiplexers, then a single RAM chip, then a much bigger RAM, before going onto an ALU and then a full CPU. The final project is to write an assembler for the machine code for the machine you just 'built.'
Again, it uses a version of an HDL (a programming language that is used to describe digital logic chips), so you're not actually playing around with breadboards, but you still get to see how everything works. They provide a pretty good simulator that shows the values of registers, as well as providing a simple simulated monitor for graphical output. For me, the biggest OMG moment in my entire experience learning CS was when I realized that all an opcode is is a set of 1s and 0s that are used as inputs into control lines for chips. Learning that felt like I finally got a satisfactory answer to the question I had had since I was a kid -- "Okay, it's all 1s and 0s, but how does it _do_ stuff??" (This is probably more of a helpful mental model nowadays than the reality of modern superscalar CPUs, given microcode and so on, but still deeply satisfying.)
I was wondering why, when programming for the 6502, you generally _clear_ the carry bit before adding but _set_ the carry bit before subtracting. Not anymore. This is brilliant.
watching this series again after 7 years and it's still unbeatable.
Unbelievable simplicity of explanation, I wish I know about you 5 years ago.
Well done Ben 👏
the architecture of the 2s compliment adder is very simple and beautiful. congraturations to the lucky person who made this first.
I'm only 2 weeks into my CS Masters, and my mind has been blown, thank you so much!
Why does every video I see from you give me exacly what I need?! Your video safed me again.
nice ! finally i can continiue with my 8bit computer !! i was waiting this video and i will wait for the rest of them so i can build my 8bit computer !! i am 15 years old and i love binary
greetings from greece ! keep up !!
15 yrs old wow nice
Ξεκινησα να το φτιαχνω!
These videos are so relaxing and mesmerizing. The clarity and patient, thorough examples in yoru explanations are just amazing. I know this is an ancient video but if you're still readin comments on it, I just want you to know. You rock! This is really awesome.
Absolutely brilliant. I'm binge watching your videos.
I'm using your tutorials to make a 8 bit computer similar to this but in Minecraft, God bless you for sharing this videos to the world
Excellent videos! I love all of these. I gave you a thumbs up. I especially like your use of XOR as a conditional negation for subtraction, and that was a very easy and clever way to add 1 using the carry-in.
If the Carry has to be kept (for handling bigger data sizes), then another XOR gate should be included, with one input acting as Carry IN, the other as Enable SUBSTRACTION (connected to the XOR conditional negation input). The output is then connected to the Carry input of the Adder.
Will work with both Addition and Subtraction.
Hey Ben! I just wanted to say you are the best teacher I've ever seen. I'm a mechanical engineering student and I've never seen explanations as good as yours. I really love your channel and your videos!
PS: It has been a while since the last time I got surprised by tricky solutions, 13:30 just blew my mind
My feelings exactly! I was almost cheering at that moment! :-)
Excellent teaching quality, complex details presented simply. GREAT
Brilliant, I was wondering for half a video how two's compliment will be implemented. Connecting SU with CI is genius!
I am so Grateful for all your help.I have been searching for this topics for long time. Thank you very much.
How does it feel still being the best guy on UA-cam when it comes to learning this kind of stuff?
This channel replaces a dim half-understood almost-knowledge with clarity. Fantastic.
Really excellent, I am learning a lot. I sort of knew it before but this makes it very clear as I work my way through all of your videos. Thank you for taking the time to make these videos.
The ALU carry that is used for subtracting is a bit interesting because if you look at e.g. the 6502 processor (by MOS/Commodore) you actually have to do a SEC (set carry) before you do your SBC (subtract) in order for there to be a correct 8 bit subtraction (ofc when doing 16 bit subtracts you actually use whatever carry was from the lower 8 bit subtract when you do the 8 upper bits). Same when doing an ADC (add) you do a CLC to clear the carry (again used to carry oveflow from previous add if doing a 16 bits addition). This video sort of explains everything perfectly.
Having the carry set depending on whether the operation is add or subtract, will limit you to doing 8 bit math. Possibly why the 6502 required setting or clearing the carry, so the carry flag could be input into the ALU from the result of a previous addition or subtraction, rather than having it fixed by operation. Does give you an insight into the ALU of the 6502 though, they must have just used the ones complement (the XOR gates) and rely on the programmer to set or clear the carry correctly.
@@threeMetreJim No it does not. Even if you have 128 bit number the two's complement is invert and add 1. It is not invert 8 bits sequences and add 1 to each. So to substract two 16 bit numbers in 8 bit chunks you set the carry on lowest 8 bits and use the carry resulting from that on the higher 8 bits. And just continue to do that if you want 48, 64 80, 96 or what not bit subtraction.
@@topilinkala1594 I know how to do multiple byte addition and subtraction. What I was trying to say that the programmer has to set/clear the carry - if the instructions cleared the carry for adc and set it for sbc, you would not be able to do multi byte addition or subtraction (you'd lose the carry or _borrow from the previous adc/sbc operation). The sbc instruction is only performing the invert, the programmer supplies the +1 through the carry flag (set).
@@threeMetreJim Why wouldn't addition and subtraction not set the carry? That would be stupid processor design. Even this dincky SAP-1 based processor has the carry line.
@@topilinkala1594 before the instruction is executed, not after - hence having to manually set or clear the carry before the first adc or sbc instruction (or the only one), which is what the OP was saying - I was describing the processor internal circuitry (XOR'ing the data with all ones is an invert for the 1's complement before setting the carry for a subtraction). If you build up some logic gates into a set of cascaded full adders, then the initial state of the carry is set by the programmer. Maybe it was done to save space on the chip - it was 1975 after all. For subtract you invert the data you are subtracting, and setting the carry is the +1 for two's complement. For addition you don't invert the data and clear the carry. If you want to play with things manually, program some 8 bit PIC16 code in assembly... Also watch the videos on designing your own simple CPU - the designers left out the set or clear carry per instruction. It was implemented in logic, rather than use a lookup ROM and microcode on the 6502.
Great series! My one comment is that in ALU, the word arithmetic is actually an adjective (and it's pronounced like AIR-ith-MET-ic) describing the type of logic, it's not an "Arithmetic and Logic Unit"
Man this guy deserves more views its dumb that everybody is to interested in v-logs and Minecraft lets plays (which I have watched a few) but keep up the good work!!
This technology is nothing short of amazing. Whoever thought of all this, I hope they experienced true prosperity and happiness. One of the small, but nonetheless incredible pinnacles of human achievement.
This series is priceless 😮 thanx so much
carry out of upper adder will indicate overflow?
Actually, not really. If you add a positive number with a negative 2's compliment, it always has a carry that we basically ignore.
An actual overflow indicator for a 2's compliment adder has to check whether both numbers with the first bit are 0 have a result with first bit 1 or the inverse. Basically, in the first case would mean that you're adding two positive numbers and having a negative result, or the inverse.
A logic for that would check if both register's first bit have the same value and if the result has a different one.
He is trying to hack your machine, just ignore that bit
If you add two unsigned numbers and get a carry out then you have overflow.
If you subtract two unsigned numbers A-B by adding A and the two's complement of B, then if you don't get a carry out have underflow (borrow out).
If you consider your numbers to be signed from the beginning, the conditions are different, then I believe you have overflow if the carry into the highest bit is different from the carry out of it; there are other ways to formulate the condition as well.
13:30 The whole time I was wondering how to add one, I was thinking maybe store and intermediary number and then use the 8 bit adder to add 1. And then, mind blown, use the carry in ^^
This is actually helping a lot with my Minecraft Computer Lol, awesome video
"So we need to take the two's complement. We invert everything with this xor gates and then..."
Oh, right, probably gonna need an extra adder to add one after inverting, that's gonna look complicated.
"we just set the carry-in to high to add one"
😯😲🤯
Mr. Ben you are more than my teacher's to me
Brilliant solution to add one using the carrier
Hey Ben, how do you acquire the the knowledge of all this electronics/computing. Do you have qualifications or is this self taught.
I think he has a computer science degree, but I could be wrong
Can you make a video on multiplication and division?
Looking at how these 8 bit data process work I realize what a truly genius Steve Wozniak building apple ii 8 bit computer from scratch.
very nice. I would have added an AND gate to the CI input, one input coming from SU and another comes from an enable EN, this is to prevent possible errors to times due to gates delays in transmitting the data, having the EN on the AND ensures that everything happens step by step instead of throwing the data on the bus.
I'm over here clapping and cheering whenever he connects the subtract input to the carry thingy.
Awesome vids! I was thinking you could even use the carry out from the top adder as an error signal.
Why error? There is nothing erroneous in it. But you can use it as a carry flag in your status register to indicate e.g. that there was an overflow during addition, or to be used in a subsequent addition to emulate 16-bit arithmetics, or as a flag indicating difference in comparison instructions ;)
i stand corrected, i was too quick to call it an error signal, but rather a flag that could be seen as an error signal, just made me realise that all signals are errors until we flag/use them, thank you!
Dale Smith No problemo ;)
Later on you can also use a zero flag which is useful in comparisons: it indicates equality of numbers when you subtract them. Just a simple NOR of all the output lines will do ;)
Some processors (like MOS Technology's 6502 used in those old Atari & Commodore computers and Nintendo consoles) also use an additional carry flag from 3rd to 4th bit for binary-coded decimal (BCD) arithmetics. Kinda useful for counters in games, because one can easily convert such BCD numbers to their corresponding character strings ;)
Bon Bon Yeah! I can see the NOR gates working to compare, could you go even further to compare the most sig bits to see which number is bigger too?
I don't understand the carry flag you're talking about, you make it sound like certain bytes of info have additional info encoded into them?? if so thats cool!
if not then would this be possible? lol. Could you read a byte one way for a certain piece of info, then read it another way for another? Also makes me think about how to order info in memory, it seems so arbitrary in my mind, if the layout of the data itself could be used to extract info from then that would make programs more efficient??
Could you write a program where the order of the information itself can be used the encode how the information itself should be manipulated?? a kind of program within the data???
my head hurts
That carry in convenience blew my mind :D
Great video, please upload more often.
Quality vs. Quantity
+Thoughtyness True point, but it has been two months, and I have already done everything except for the control matrix.
Yeah, me too :/ The damned control unit and sequencer - the least documented parts of the CPU in every course I could find so far. So this is the part I'm waiting for the most.
Hi, I'm a teacher assistant in the university in a course of computer organization and will recommend these videos to them. Also, do you happen to explain how to set the flags when doing subtraction, especially how you modify the carry out to indicate borrow (since this is the part where students struggled the most)
There’s no need to “modify” the carry-out for subtractions. It just works as is, only that it has an inverted meaning. All processors use that convention
It occurred to me that you could make this "ALU" (which is really only an arithmetic unit) into a proper ALU by adding more circuits to perform the missing logic operations, with a "rotate" possibly being the easiest to implement. You then just "gate" the outputs of every logic operation you've added so that only the selected result is sent to the A register. In other words, all of the calculations and logical operations are done, but only one of the outputs is used at a time, depending on the operation selected.
There are memory chips that can shift and rotate and there are memory chips that can increment the content. So you can use first kind for A and the second kind for B then have your instructor dechiper perform those funcitions in appropriate accumulator.
Correct me if I'm wrong, but instead of worrying about enabling the initial carry with the subtract enabled, can't we just leave off the XOR gate on the ones bit for the B register?
No, this would only apply if the 1s bit was initially high on the B register. Otherwise, if the 1s bit is low on the B register it would remain low and there would be no carry to the other bits.
For example, if the B register has a value of 2, in normal operation this would be negated in the following way (assuming signed 8-bit integers):
00000010 B = 2
11111101 (NOT B) = -3
11111110 (NOT B) + 1 = -2
Whereas, if you omit the inversion of the 1s bit, we receive:
00000010 B = 2
11111100 (NOT B except 1s bit) = -4
XORing the SUB input and the carry to get borrow is a nice thing to do btw.
When building the ALU do you need both registers? Cant you do the all the Arithmetic from the first Register and what ever program memory you plan on building in the future?
I'm rewatching this series for the fun (at this point I already know pretty much all of what's covered), but I think this is the first time I noticed that the adder chips say they're carry lookahead adders. Not a particularly important detail, but interesting.
So does this mean that the upper 4-bit register Carry Out line can be used for an 8-bit overflow register?
Yo Einstein😅 keep up the good work!!
Thanks!
Hello Ben ! I just watched all of your videos till this one in a row, and I must admit I am really impressed about your work ! (nice catch for the carry in technique to get your twos complement)
I wonder why you use LS logic chips ? What does LS stands for ? I started a project a few weeks ago and went to HC chips, I was told they were faster and cheaper in terms of energy
Sorry for necroposting. Original chips were just 74xx. (for example 7400 for quad 2-input NAND). There were also low-consumption low-speed version called with letter L (low). Then the new technology emerged: TTL with shottky diodes which made IC faster at same consumption or of the same speed at lower consumption. These were called S (shottky) and LS (low shottky).
At last, when CMOS technology became fast enough (first CMOS chips were 4000 series: very low-consuming but slow as hell), this new series HC was created, which means High (speed) CMOS.
Unfortunately, HC may not be compatible with other: circuit made entirely from HC works fine, but when you use both HC and LS, there may be problems.
Thanks from Texas.
Can you show how to design the ALU in the Breadboard by step by step process
Ys brother i also hve same doubt.
If u know now how to do plz let me tell that immediately 🙏 thnxs
These videos are a god damn masterpiece !!!
Man, you are simply glorious.
+Ben Eater, are you going to make some other arithmetic operations too? Like multiplication or division?
The simplest way for multiplication is to emulate it with repeated addition, but it is also very inefficient, because it gets very slow as the multiplier gets bigger :P
But there's another (better) way to do it, quite simple as well: with bit shifting & adding. You can do the bit shifting with a loadable shift register on one of your inputs, and then shift it 8 times to the left (multiplication by 2), and whenever there is 1 at that position in your multiplier, you also accumulate this shifted multiplicand into your output register. So it's pretty much the ancient Egyptian multiplication algorithm ;) It is better because the time needed to calculate the result doesn't grow linearly with the input, but it is a constant number of shifts & additions: equal to the number of bits of your data bus.
If you don't want to use shift registers and do 8 subsequent shifts & additions, but you do have some more money to spend on adders, you can simply connect several adders together and instead of shift registers you can simply shift the wires to the right by one position for each of the partial adders. You also need some control lines to turn these shifted inputs on, controlled by the bits of the multiplier. This is the best solution because it can calculate the result in just one clock cycle! :) (but there might be some delay on the carries to ripple through all the adders).
+Bon Bon , Or a binary multiplier circuit can be used: en.wikipedia.org/wiki/Binary_multiplier#Example
InductiveOrange Well, this is pretty much what I meant by the last option: summing up the shifted (that is, multiplied by 2) partial results in parallel. If you look closely at the example circuit you linked, this is pretty much two adders made of two XOR gates and two AND gates and connected together in a certain way, and the additional AND gates are there to "gate" the input signals, the original one and the shifted one (because you can do the shift by just wiring them off by one wire). Unfortunately, such approach is less modular if you have all these gates fleshed out. It is easier to understand when you encapsulate all the pieces of the circuit in blocks and then connect these blocks together into bugger blocks etc. Then the design is more modular and it is easier to extend it to more bits.
Cool. Didn't notice that.
+Bon Bon how can i do division ? i already have multiplication with the repeated addition .. but i cant find how to to division
Great explanation. I just subscribed.
So now you can input negative number only from register B? And if you then do the same to register A you can input a negative num. from both registers and sum 2 negative numbers right?
just a thought but how would you incorporate and use a shifting "slide rule" in these ALU, and would it increase 8bit/16bit calculation speeds to assist (x264/x265) integer style assembly instructions hardware as a practical 2019 real life use case ?
You are an amazing human being.
Let's say for an alu I was using many 74f181's can I just link the cn+4 output and the following cn input together (I'm using 16 of them by the way). I was wondering if I needed to use the 74f182 with all of those or i can just connect the cn and cn+4? together thanks ahead of time.
This is brilliant.
Do you need 8 wires for the 8 bits? Is there a way to use one wire to send 8 signals for 8 bits
What's the best/easiest way to generate the Manchester fm 2 tones?
Where could I find chips like the 4 bit adder or logic gates or rom, etc.?
I would love to see some videos on multiplication and division. Also handling decimal places.
Decimal places are normally done with floating point values. These would be not very useful at 8 bits because those 8 bits would need to be split between the sign (1 bit), significand (maybe 4 bits) and exponent (3 bits) and would be very time-consuming to implement in logic gates. Fixed point arithmetic (where the exponent is fixed in advance) would be possible, but that's because it can be done with the same instructions as integer arithmetic: the programmer just has to remember that a given memory location is fixed point and so means e.g. an eighth or a 256th of the integer stored there. It's possible that 16-bit floating point could be implemented in software on this device using two memory locations next to each other though.
Multiplication and division even of integers would take a lot of logic gates, but again could be implemented in software.
I have a problem my registers I can not verify my registers on buss. When I set the LOAD to low , LEDs ( of registers) turn on but when I put the ENABLE to low it does not output on the bus .
You have great knowledge
So, if you are trying to add two negative numbers, the A will be set as a negative by program? Why can't the same be done for the B? Or it would take something like A=0-B prior? Or it just isn't possible? Or is it in the next episode?
Edit: Ah, I get it. The numbers will be programmed as negative for both A and B if necessary, and the invertors will only change the addition/subtraction, kk. The +(-5) sent me in the wrong direction :D
If you are going to do 16 bit arithmetic in the future wouldn't you need the carry in?
Z80 used a 4 bit ALU. (first it calculate bits 0-3, and stroed on register, then it calculate bits 4-7, and send 0-7 to bus)
wouldn't this way have been easier for you too?
hi i have adder ic which has inverted inputs, really cant find a way to to work it out please help
I've a dumb question, Can you just have registers and ALU conected by the same bus? I see in the diagram that you connect directly A and B registers directly to the ALU and Kind of makes sense, and have a porpuse have 2 registers but, there is a way to just conect all to the same Bus right? obvisly is not gonna be efficient but, it works, Am I right? (I know ALU should be share an I/O bus in that case)
I am new to this and have a question. Instead of using tri-state buffer to enable output to the bus , could you use and-gates to do the same thing?
No: conventional and-gates output 'active' 0 signal which would conflict with other outputs to the same bus. So you need either tri-state buffers, so you are totally disconnected from bus when inactive, or you could make bus with open collector or-gates and common pull-up resistors. Not recommended, because it works slower than conventional bus. Or, instead of bus, you could use multiplexer for all the devices you have. That's the only way it is done on FPGAs which surprisingly don't have tristate logic 'inside', only for I/O pins.
Aren't the tri-state buffers basicaly transistors?
love the tutorials
Why don't you make the carry out of the second adder go into anything? Wouldn't it be good to have that go somewhere that could alert a user that there was an integer overflow?
Tyler Hilbert A sidenote: carry out does not indicate overflow. You can't just set your OF flag to the state of carry out. An ALU can have a carry out and not be in overflow state. They are separate things (deceptively so).
How to design 8 bit ALU using 74LS181 integrated circuit
13:40 What if we want to use that carry-in for an actual carry-in too?
E.g. to pipeline calculations on some longer numbers? (in which case the carry out from the previous sum stays in the carry flag, and then it is used in the calculation of the next part of the sum).
Use another XOR gate, and connect one of its inputs to the "enable negation" input of the XOR array and use it as "enable subtraction" onwards.
The other input of the XOR gate is used as the carry-in, for both addition and substraction and
the output is connected to the carry input of the adder chip.
I used that for my test ALU in Logisim, and it works.
In addition (not exacly required), you could use another XOR gate, to fix the carry-out polarity of the adder, since it is inverted when substracting.
One input of the XOR gate is connected to the "enable subtraction" input, the other to the carry-out of the adder.
The output of the XOR gate is afterwards the fools-proof carry-out, for both addition (most call it carry) and substraction (some call it borrow).
Most processors (that have flags anyway) have instructions for add with carry and subtract with carry / subtract with borrow in addition to their normal add / subtract.
Add with carry just means that you use the carry flag for the carry in, instead of setting it to zero.
For subtraction, you have to choose how to interpret the carry flag (different processors do this differently)
* carry high means borrow (e g x86)
* carry low means borrow (e g 6502)
The first version is more intuitive to me, but then you need to invert the carry flag going in and out in case you're doing subtraction.
So you need to add some logic to either take a hardcoded carry or feed in the existing carry flag (plus maybe the xor stuff above).
The 6502 actually only has add with carry (adc) and subtract with carry (sbc) instructions. If you want to do a regular add then you need to clear the carry first, and if you want to do a regular subtract then you need to set the carry flag first. That's a way to solve that logic in software I guess :)
Persuading the carry in to be a useful pawn in the 2's conversion.... Cant get this on Netflix. :)
How do you add numbers greater than 255?
So, I have a question; If I have a subtractor and adder, how could I 'store' the values? For example, there is absolutely no difference between 15 and -1, so, how could I store those without an extra bit? My only guess would be to slash the number of inputs, so that the only maximum output for a 4 bit ALU would be 7, with the minimum being -8.
It's been 3 months, but... just in case, and for anyone else reading:
The 8-bit representation of 15 is 0000 1111.
The 8-bit representation of -1 is 1111 1111.
The highest value you can store is 0111 1111, which is 127.
If you want to add 1 to 127 and store 128, that would be 1000 000.
Tough luck, because that's the representation for -128. You just got an integer overflow.
Did you said you have 8 bit sum wires? Don't you have a carry out wire?
So I was thinking to build this PC but I found that some of ICs( Ram, Registers and EEPROM) are discontinued and nowhere to found. (Found some but with insane price tags). Can anyone suggest replacement parts for these?
great great value video. thanks. no such thing as way tsx, can say/say anyx no matter whatx tho
Why wouldn't you connect the Registers to the ALU via the bus?
Why do you attach the a and b registers directly to the ALU rather than having them loaded through the bus?
There is no nead , why not , if you want to use those registers for odher purpose than adding / subtracting than just turn off the output of the alu
I might have missed something but why have 2 4 bit adders instead of building an 8 bit adder in one chunk? I assume it ultimately doesnt matter but jw
To show how to connect them