Thank You so much sir , for uploading very useful and explaining in very simple manner We can understand one of our course, without depending on our college professor, Thank you so much sir once again
Very nice presentation! I learned z-80 and 8080 assembly during the 8-bit era and it was fine. I much prefer register letters or names (A,B, X,Y, etc) instead of numbers R0, R1, etc. For RISC, I disagree with combining functions, like the shift to the add, but I really like that all memory access is with load and store. I designed an architecture that has Registers IR (instruction register), PC (program counter), F (flags), A (accumulator), B (ALU partner), M (memory pointer), S (stack) and only 16 instructions, which allows for a 4-bit opcode. Only RDM (A gets the contents of Address M) and STA (address M gets contents of A) access memory, and they do it through M register only. All good wishes.
Thank you for this series. Minor suggestion - it would be great if you can cut down on the repetitions. Like, "what is an instruction set? It is a set of instructions"
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This series is gold. Thanks.
Thank you ☺️
This playlist alone was more than enough to ace ARM questions in my Exam! Thank you so much sir!
You're welcome! I'm glad it helped!😊
Thank You so much sir , for uploading very useful and
explaining in very simple manner
We can understand one of our course, without depending on our college professor, Thank you so much sir once again
Very nice presentation! I learned z-80 and 8080 assembly during the 8-bit era and it was fine. I much prefer register letters or names (A,B, X,Y, etc) instead of numbers R0, R1, etc. For RISC, I disagree with combining functions, like the shift to the add, but I really like that all memory access is with load and store. I designed an architecture that has Registers IR (instruction register), PC (program counter), F (flags), A (accumulator), B (ALU partner), M (memory pointer), S (stack) and only 16 instructions, which allows for a 4-bit opcode. Only RDM (A gets the contents of Address M) and STA (address M gets contents of A) access memory, and they do it through M register only. All good wishes.
Thanks For Your Playlist...
This was exactly what i needed...
you're a great teacher sir thank you so much
Excellent lecture 🙌
Thank you
Thank you! High quality content!
Thank you
Excellent lecture series ✨❤️
Thanks! 😊
please dont stop posting these videos!!! do more videos about low level things
Thank you so much sir.. awesome sir
Thank you
Thank you for this series. Minor suggestion - it would be great if you can cut down on the repetitions. Like, "what is an instruction set? It is a set of instructions"
It's not about extending the video length it's my teaching habit during lecture. Hope you understand.
Can you provide soft copy as documents
15:26 If we are using the lsl operator also in the same instruction, won't it be a 4-address instruction
No
is there any diff between arm 7 vs arm 8
Yes till 7 it is 32 bit but 8 is 64 bit. So there will be small difference in code to give space to additional bits.
@@geniusmad5518 thanks
Can you give me a link to read these concepts arm-v7 language, I'm trying to look for a book but I can't find a book like that in the video
Ok
Sir can you provide the pdf link for the above presentation
Plz check comments
CAN YOU PLEASE PROVIDE THE SLIDES OF THE VIDEOS SIR
Ok
drive.google.com/folderview?id=1zjiT5q1EjCTJAURVeBBJ2o0IA84Fi6lW
@@VishalGaikwad THANK YOU SO MUCH SIR
At 23.12 , slight correction , it should be data corresponding to address and not address corresponding to data
streak 1/14 =7.14%
%AI assume any a large number of sufficiency of evidence code 2024 to %AI assume any a large number of sufficiency of evidence code 2024
rutu dhan ley moss uh