Dave, the simulation was working just fine. If the dropout of the linear reg exceeds the gate threshold of the FET (0.7V for IRF7404), then that dropout alone will switch the FET on (Vgs = voltage across linear reg). When the FET conducts, FB pin rises, boost output voltage stagnates. 100% spot-on simulation with that FET. Debug before blaming sim. "Why is the FB pin low already? The FET is *already* conducting? What's it's Vgs? Oh, maybe I should check the Vgs(th) of this particular FET. Oh."
@kiyotewolf I forgot the credits this time, but I removed the music because UA-cam's stupid automated system kept flagging it and I had to explain how and why I own the rights. I just got jack of doing that.
The graph at 9:00 is Vgs(th) relative to Vgs(th) at 25'C, not absolute voltage. That's why it appears to say 1V at 25'C, because that's the voltage it's normalised to.
For greater precision, the "SET" pin can connect to an emitter of a common-base PNP diffpair (PNP A)... the diffpair base is diode-connected to A's collector, then a resistor (say, 10k) to GND. PNP B's emitter is connected through a LM431 to the switcher's output/LT3080's input. PNP B's collector connects to a resistor to GND as well. PNP B's collector is then connected to the switcher's FB node. This is more complex and probably adds some cost, but it can save headache in manufacturability...
I haven't SPICE'd it but it should work. Also, you should always hit your PSU with a load step to ensure stability, while varying operating point. Check load step response for ringing; ~1 noticeable ring corresponds to ~60° phase margin; more ringing = less phase margin. For a robust bench supply, things should generally be overdamped.
It's funny, the IC circuit designers at LT actually use LTSpice for their designs... It's remarkable because IC design is considered the technical pinnacle of electronics, and the guys at LT are the best IC designers in the business...
Dave, try enabling 'start external sources at 0V' in the simulation settings window. That usually fixes these kind of issues for me. I think the simulator is trying to find a stable startup state before starting the actual simulation, which isn't what you want with a switching regulator of course.
Agree with 'TheHue'. Just pick a Vt=-2V and be done. Vt's of -1V or so do not work. With a 2V in-to-out on an LT3083, even a 2A load causes just 4W of dissipation in the LDO. The 3083 is a bigger brother to the 3080.
If you look at the threshold voltage plot in the datasheet, note that the graph shows the normalized voltage, not the actual voltage. Just a little thing.
Hello Dave what is wrong with this project 3 years now no updates or any info?, is there any place where we can download the source code for this psu, or this project is dead :( ?
@EEVblog I see what I've mistaken. I was thinking of the LM317 as it has its feedback pin reference with respect to Vout, and most switchers have its reference with with respect to ground
Just a tiny correction, around min 9 you are showing the Vth vs Temp graph, and say it's 1V at ambient temperature, but the graph is actually variation on Vth respect the ambient temp. Vth.
Don't know if anyone alredy came up with this thought, but, wouldn't the LT3080 and thus the simulator be confused if it's fed only an input voltage 0.7V greater then the output, since the VGS for the IRF7404 is stated as min -0.70 V in the datasheet?
Couldn't you just take the FET feedback after the shunt rather than create the extra headroom with extra components? Unless that would make the whole thing unstable in some way...
Dave, what happened with the rest of this project? It would be a shame if it's bitten the dust as I was wanting to build one of these babies for my lab.
Dave, the simulation was working just fine. If the dropout of the linear reg exceeds the gate threshold of the FET (0.7V for IRF7404), then that dropout alone will switch the FET on (Vgs = voltage across linear reg). When the FET conducts, FB pin rises, boost output voltage stagnates. 100% spot-on simulation with that FET.
Debug before blaming sim. "Why is the FB pin low already? The FET is *already* conducting? What's it's Vgs? Oh, maybe I should check the Vgs(th) of this particular FET. Oh."
@kiyotewolf I forgot the credits this time, but I removed the music because UA-cam's stupid automated system kept flagging it and I had to explain how and why I own the rights. I just got jack of doing that.
The graph at 9:00 is Vgs(th) relative to Vgs(th) at 25'C, not absolute voltage. That's why it appears to say 1V at 25'C, because that's the voltage it's normalised to.
What happened to this project? I would still love to see this get done...
For greater precision, the "SET" pin can connect to an emitter of a common-base PNP diffpair (PNP A)... the diffpair base is diode-connected to A's collector, then a resistor (say, 10k) to GND. PNP B's emitter is connected through a LM431 to the switcher's output/LT3080's input. PNP B's collector connects to a resistor to GND as well. PNP B's collector is then connected to the switcher's FB node. This is more complex and probably adds some cost, but it can save headache in manufacturability...
I haven't SPICE'd it but it should work. Also, you should always hit your PSU with a load step to ensure stability, while varying operating point. Check load step response for ringing; ~1 noticeable ring corresponds to ~60° phase margin; more ringing = less phase margin. For a robust bench supply, things should generally be overdamped.
Keep it up Dave! You got me into electronics and I'm loving the hobby!
It's funny, the IC circuit designers at LT actually use LTSpice for their designs... It's remarkable because IC design is considered the technical pinnacle of electronics, and the guys at LT are the best IC designers in the business...
@Goncalgood Good to hear!
Dave, try enabling 'start external sources at 0V' in the simulation settings window. That usually fixes these kind of issues for me. I think the simulator is trying to find a stable startup state before starting the actual simulation, which isn't what you want with a switching regulator of course.
Agree with 'TheHue'. Just pick a Vt=-2V and be done. Vt's of -1V or so do not work. With a 2V in-to-out on an LT3083, even a 2A load causes just 4W of dissipation in the LDO. The 3083 is a bigger brother to the 3080.
Dammit Dave, you're not giving your shunt regulator negative feedback :P
If you look at the threshold voltage plot in the datasheet, note that the graph shows the normalized voltage, not the actual voltage. Just a little thing.
It might be interesting to add a variable load to the simulation and make sure there are no strange effects due to multiple feedback loops.
Dave , please continue this project!
Hello Dave what is wrong with this project 3 years now no updates or any info?, is there any place where we can download the source code for this psu, or this project is dead :( ?
@dakiller322 I can't see how that one would work? Vfb would always be greater than the internal reference voltage.
@EEVblog I see what I've mistaken. I was thinking of the LM317 as it has its feedback pin reference with respect to Vout, and most switchers have its reference with with respect to ground
Is there a part fourteen or a thread on the EEVBlog forum? I'm having trouble finding what happens next.
Part 14: ua-cam.com/video/wg_J9WElvBY/v-deo.html
I wonder how well this method will work in current limit mode, as well as when the load changes rapidly.
wow great! =) i realy hope u continue this project.
Just a tiny correction, around min 9 you are showing the Vth vs Temp graph, and say it's 1V at ambient temperature, but the graph is actually variation on Vth respect the ambient temp. Vth.
Don't know if anyone alredy came up with this thought, but, wouldn't the LT3080 and thus the simulator be confused if it's fed only an input voltage 0.7V greater then the output, since the VGS for the IRF7404 is stated as min -0.70 V in the datasheet?
On second thought, you don't even need a LM431... a simple resistor will do.
@ondrej3737 Seems like a got lucky the first go!
Couldn't you just take the FET feedback after the shunt rather than create the extra headroom with extra components? Unless that would make the whole thing unstable in some way...
Why is a 10K resistor needed on the GATE of the mosfet?
When can we buy the PSU??????????
Dave, what happened with the rest of this project? It would be a shame if it's bitten the dust as I was wanting to build one of these babies for my lab.
Are there going to be more MakerBot videos soon?
Whats the latest with this project?
Hey Dave! Have U ever created a PCB design for this PSU?
Not going to simulate in altium?
I like LT spice, but I hate how long it takes to remember all their stupid shortcut keys and the time it takes to simulate the bloody thing.
404 mosfet, correct output not found.
This is the type of tracking pre-regulator that I was thinking of, even simpler. bit ly/zoo1Gp
Nope, it's not that.