SystemVerilog Assertions From Scratch | Crack VLSI Interview

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  • Опубліковано 13 січ 2025

КОМЕНТАРІ • 5

  • @saireddy6676
    @saireddy6676 6 місяців тому +3

    hi mam
    you should check that spellings when you are typing ,that so confusing when I am coding that occurs me syntax errors. And one more thing, sometime you are saying one thing and typing different while your explaining. So except that everything is perfect about the topic. You are doing great to VLSI students.
    Thank you so much.

  • @lakhansinghh3637
    @lakhansinghh3637 2 місяці тому +1

    PLEASE CAN YOU SHARE PDFS.

  • @saipadhy8114
    @saipadhy8114 2 місяці тому

    Ma'am please share that PDF

  • @youssefzaafan4480
    @youssefzaafan4480 25 днів тому

    PLEASE CAN YOU SHARE PDFS.