VHDL Basics-IF Statement| IF statement in VHDL Design

[@AbhishekGupta-kr7co]

ma'am are there more important things in VHDL?
also, thanks for these amazing vids

[@EasyElectronics975]

I will post them soon

[@amazingcontent4213]

Please complete this series

[@EasyElectronics975]

Sure

[@loyal8060]

Please upload verilog lecture series.

[@EasyElectronics975]

Sure,, slowly

[@subhashgupta2617]

Frst view mam☺

[@radhavideoboy7259]

hello ma'am where is next videos?

[@EasyElectronics975]

Will be done soon

[@radhavideoboy7259]

@@EasyElectronics975 oh thank you ma'am actually you uploaded this video 2 years ago.