Awesome project! Something I would mention is that the erasable core memory is non-volatile when it loses power. I am more of a software guy than a hardware guy, but when developing an AGC emulator, I found that deliberately initializing erasable memory to random values at computer startup (excluding registers), would frequently cause crashes or failure to boot properly. If you aren't already, that might be something to consider since you mentioned you plan to use static RAM for erasable memory, which I think might have a similar issue in practice due to its volatile nature.
Awesome project! Something I would mention is that the erasable core memory is non-volatile when it loses power. I am more of a software guy than a hardware guy, but when developing an AGC emulator, I found that deliberately initializing erasable memory to random values at computer startup (excluding registers), would frequently cause crashes or failure to boot properly. If you aren't already, that might be something to consider since you mentioned you plan to use static RAM for erasable memory, which I think might have a similar issue in practice due to its volatile nature.
Good point, I may need to consider some kind of battery backup for the SRAM to at least replicate the non-volatile characteristics of the memory