How to fix congestion in placement, Max tran, max cap, max fanout, setup timing - Video 5

[@refreshment567]

Hlo sir , can you provide the design data for this too so that we can work on this?

[@slinger40100]

We're not allowed to share it 😅

[@refreshment567]

⁠@@slinger40100can we talk offline on this? I can find the db but its cadence db synthesised with other tech. i can manage to get RTL , can u show how to synthesise the design ? Are individual macros like pll, memories that u used are synthesised with tech u used ?