Lec 35 GATE Question Discussion on Synchronous Counter

[@diptikuvarbasolanki2152]

Really appreciative teaching sirji. Best lectures related to digital electronics.

[@vaishnavipatil4410]

Excellent

[@SHASHANKRUSTAGII]

Thanks bro, the way you are teaching this is as if you invented it.
Amazing work
Loved it.
We need more creators like you
Amazing

[@priyak3132]

Thank you sir...no one can make this subject simple like you. spl counter.🙏

[@nikunjgajjar4]

Aap jsa teacher digital electronics padhate hue nhi dekha !!!!! Big big thanks a lot sir !!!! Though having done job, you try to do give such a quality videos !!!! Hats off sirji!!!!

[@pawandhanotiya9280]

Ultimate method.....this type of questions....AAG LGA DI SIR....APPNE.... DIGITAL M

[@chs_dhanu]

Thank you is a small word for this crash course

[@sanjuthakur7221]

sir make video on DAC and ADC

[@upendrasingh-ow4fw]

one of the best digital lecture i ever saw....

[@maptalha]

Please make 2s complement

[@shourya_trueiitian3858]

superb video ....thank u sir for the video

[@hemavarhanumanth2757]

U lectures are superb

[@SaritaSingh-xj3gu]

I wish jab bhi analog pdhaya jaye genique par aap hi handle kre.... thank you for your support

[@rahuldagar8270]

Sir....marks ka pta nhi....but apke lectures sun k maza ..aa gya....jo nhi dekh rhe h....woh bhut kuch miss kar rhe h.....

[@purnachandrasekhar5110]

What about the given clock duty cycle question 35:11

[@GeniqueEducationTeam]

that has no use as clock will trigger the FF once in a clock(one positive edge in a clock period) even if it has 30% duty cycle..

[@purnachandrasekhar5110]

@@GeniqueEducationTeam thank you sir

[@geeta_ka_VANI]

SIR,its a humble request please try to make video on ADC and DAC ..... so that we make our concept crystal clear

[@shubhambhatt634]

chandan sir,,,your leactures are superb...i really enjoyed your teaching
thnks sir

[@suhailashraf4332]

Sir u r one among millions ❤❤❤.......

[@gugulothsuman6770]

Sir please make a video on 8051 microprocessor and ADC and DAC converters

[@lonesurvivor6067]

happy teachers day teachers ...

[@nahasn7679]

7:55 😂😂🤣🤣🤣

[@kapilmotwani7742]

Awesome Sir The way you taught to tackle questions in limited time that's so Good .

[@monubairwa9133]

really sir u r great thnk u very much

[@gateeasysolution-vijaykuma7238]

Vvvvvvvvvvvvvv ry thanks sir Mai 3month se prsan that ye sikhne ke le ab counter mera favourite topic hogya h

[@dipuindia4037]

Sir please make video on EMT.

[@manishkumarrawat5341]

chanadan sir is the best,.....

[@danyalislam]

Thank you Sir

[@shiwangikeshri9225]

sir..we want videos on analog electronics

[@sonubishwas5300]

Thank you sir we are waiting for analog now

[@AkashBaruah]

Plz upload analogs after 1 or 2 days so that we can fully prepare digital electronics.

[@mauryashivom7984]

and first also find avg voltage then power or not ?

[@GeniqueEducationTeam]

use formula for power calculation...if you will find the power from avg value of voltage then tell me the power of pure sine wave..its avg value is zero..is the power zero..hope you got it..

[@Shubham-eo9qr]

Sir jab sara padh hi diye h aap to ADC aur DAC Bhi padha digiye....Pls..

[@shibamsarkar8765]

Sir avg power to v(rms) ^2/r v to kar sakte hay na

[@GeniqueEducationTeam]

shibam sarkar tou can use that formula...but find out Vrms carefully here..here repeation of wave form is after 5 clock period...you will get the same result..

[@m.k.gvideo3843]

very very much fast video
agar aapko esa padhaya jata to aap kabhi nhi samajh pate

[@vijayprajapati1040]

SIR ANALOG ME TRANSISTOR KE RMODEL AND H MODEL KRANA PLEASE AGR TIME MILE TO

[@shivg0077]

Sir avg power wale question me duty cycle ka koi role kyon nahi liya ??

[@GeniqueEducationTeam]

shivansh gautam that has no use as clock will trigger the FF once in a clock(one positive edge in a clock period) even if it has 30% duty cycle..

[@SADDAMHUSSAIN-ft9es]

Sir EC wala ka kitna % syllabus complete karne ka plan hai CRASH COURSE main bahut dar lag raha hai
Communication restart hoga keh nhi
EMT aur EDC cover kiya jayga ya nhi...yeh sab soch kr bahut dar lag raha hai
@Team Genique ki tarf se convience kiya gaya tha tha keh December tak 90 to 95% syllabus will be completed & January for revision...
plz rply Team Genique...thnx

[@shibamsarkar8765]

Sir sequence generation to table se bhi kar sakte hay na. Us se bhi to asaan hota hay

[@GeniqueEducationTeam]

shibam sarkar calculation of number of flip flop required in that case is different..and we generate that fron table..that will come in detailed course..

[@GeniqueEducationTeam]

and if you are comfirtable with table you can use that..if takes less time with accurate result ..then you can go for that..

[@shubhamdubey4067]

sir in avg power dissipation ques ...waveform se rms value nikal ke kr skte he ek cycle ke liye
sir i read comments below you have answered same thing ..thank you sir

[@sksalimali9267]

sir plz upload communication video

[@priyankabadhani4574]

sir at 26:28 where you discuss the question which is based on a race around condition sir, I think it occurs in SR flip flop in
jk flip flop it is actually a toggle mode condition which we practically used in our applications and racing is basically an uncontrolled situation which we can't use that way in SR where S=R=1 is not required if I am wrong then please correct me and Thank you so much for proving us such a great lecture.

[@ayushgupta6583]

Sir please make videos on DAC and ADC.....its very hard sir...