Charge Sharing in Dynamic CMOS | Solution of Charge Sharing in Dynamic CMOS

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  • Опубліковано 31 січ 2025

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  • @EngineeringFunda
    @EngineeringFunda  Рік тому

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  • @taukirali1148
    @taukirali1148 2 роки тому +2

    Thank you sir. You're helping me a lot. I pray for yr good🤲🏼

  • @pritikhanpara222
    @pritikhanpara222 4 роки тому +3

    Perfect explanation 👍👍

    • @EngineeringFunda
      @EngineeringFunda  4 роки тому

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  • @UECAshutoshKumar
    @UECAshutoshKumar 9 місяців тому +2

    Thank you sir 🙏

  • @gaming076u
    @gaming076u Місяць тому +2

    thanks sir

    • @EngineeringFunda
      @EngineeringFunda  Місяць тому +1

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  • @abhaykumarsingh3884
    @abhaykumarsingh3884 22 дні тому +1

    5:21 not explained properly.

  • @MR.ARKAJITPAL
    @MR.ARKAJITPAL Рік тому +2

    very informative

    • @EngineeringFunda
      @EngineeringFunda  Рік тому

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  • @travelfreakphani5933
    @travelfreakphani5933 4 місяці тому +1

    thanks man, very good video

    • @EngineeringFunda
      @EngineeringFunda  4 місяці тому

      Your Appreciations, care and share matters a lot to me. #EnginneringLove.
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    • @travelfreakphani5933
      @travelfreakphani5933 4 місяці тому

      @@EngineeringFunda cool

  • @SagarKumar-li1yb
    @SagarKumar-li1yb Рік тому +1

    Maza aa gya

    • @EngineeringFunda
      @EngineeringFunda  Рік тому

      Your Appreciations, care and share matters a lot to me. #EnginneringLove.
      All the subjects playlist of Engineering Funda is available in comment section. Share it with your friends to support us.
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  • @rajathmvenugopal8313
    @rajathmvenugopal8313 3 роки тому +2

    Thanks for the informative video. I had an query, at 5:15 if D is on, that doesn't mean clk should be on right?- in precharge input clk is 0 so nmos is off--- meaning c4 comes into play. Correct me, if i am wrong anywhere

    • @EngineeringFunda
      @EngineeringFunda  3 роки тому +1

      See it again, it is explained perfectly correct here

    • @rajathmvenugopal8313
      @rajathmvenugopal8313 3 роки тому

      @@EngineeringFunda ,charge sharing can be overcome, if we make sure that the input remains stable for a precharge/evaluation phase, is that right?

  • @atharvanand1785
    @atharvanand1785 4 місяці тому

    can you please make a video on ratioed logic and how it affects the noise margin

  • @NisreenAmerAlnaji
    @NisreenAmerAlnaji 3 місяці тому

    Hi sir, Do you have anything on the CMOS sizing? I didn't find anything on this topic, Do you have it only for premium subscribers? If yes how to join? thank you

    • @EngineeringFunda
      @EngineeringFunda  3 місяці тому

      In upgradation of subject, I will make sure to add it.

  • @theawakened7734
    @theawakened7734 2 роки тому

    Sir using zipper CMOS MAY BE another solution to it as it has different gated clocks

  • @sumitpahuja2858
    @sumitpahuja2858 4 роки тому

    the second solution will take more time to charge all capacitor instead of charging a single capacitor. Correct me if m wrong

    • @EngineeringFunda
      @EngineeringFunda  4 роки тому

      Charging and discharging will take more time, so it will minimize operational speed of integrated circuit

  • @jetk286
    @jetk286 2 роки тому +1

    Nice sir

    • @EngineeringFunda
      @EngineeringFunda  2 роки тому

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  • @digambarbhole9467
    @digambarbhole9467 2 роки тому

    sir ,can you provide its notes in the form of pdf ?