Thanks for watching. For more examples please see: VCA Electronic Gain Control (Part 1): Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html Thermometer Circuit Design with Op Amp & BJT transistor ua-cam.com/video/55YsraFE0rg/v-deo.html Analog Vector Summer Circuit Design with Op Amp and BJT Transistors ua-cam.com/video/PIAsa0QNVns/v-deo.html Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html Power Amplifier Design (Class A) with Transformer ua-cam.com/video/gKlJrqGqeCI/v-deo.html Op Amp Analog Computer Differential Equation Solver ua-cam.com/video/ENq39EesfPw/v-deo.html Push-Pull Power Amplifier with Darlington Transistors ua-cam.com/video/866MYibo8yE/v-deo.html Sallen-Key Analog Filter Design Tutorial ua-cam.com/video/KwUnQXbk7gM/v-deo.html For more analog circuits and signal processing examples see the Analog Circuits Video playlist: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these Circuit design and analysis videos are interesting and useful. 🙋♂
Thank you. I'm glad that you liked my video. Here are a few related Electronic Amplifier videos and tutorials: Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html VCA Electronic Gain Control explained ua-cam.com/video/cFzYZsPEtP0/v-deo.html Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html Let me know if these Circuit videos are helpful or if there is a specific Circuit you're interested in.
Thanks for sharing. I would put a cap between R2 and Drain of the T2 and put high impedance say 100K from drain of T2 to 1V and the same thing for T1( that is high impedance say 100K from drain of T1 to 1V). This way you ensure that the two transistors are matched at DC, to get your equivalent resistor. The AC signal gets coupled through the cap.
Thanks for watching and sharing your thoughts and practical considerations. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html Thanks again.🙋♂️
Yes I was thinking about the same issue that the drain on T2 is on a different DC level. I like your suggestion. I was also thinking about manipulating the DC level on Vin to (in this case to +1V) to bias the Drain on T2, but that becomes a mess as this will effect the output on the amplifier that will get a DC-level dependent on the gain.
Thanks for watching and sharing your thoughts and practical suggestions. To your good point, DC level manipulation adversely affects transistor bias points and output DC level. There are of course additional practical considerations for practical implementation of this circuit. For more Circuit examples pls see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html Thanks again.🙋♂️
You're welcome. Glad that this video is helpful. For more Electronic Amplifier examples see: Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html Power Amplifier Design (Class A) with Transformer ua-cam.com/video/gKlJrqGqeCI/v-deo.html VCA Electronic Gain Control: Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html I hope these Circuit design and analysis videos are interesting as well.
You're welcome. Glad that you like the explanation in this video. For more Electronic Amplifier examples see: Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html VCA Electronic Gain Control explained ua-cam.com/video/cFzYZsPEtP0/v-deo.html Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html I hope these Circuit videos are interesting as well.
You are welcome. Thanks for watching and your good questions. Glad that this video is useful. Sure, I will post an AGC circuit soon. And answering your question, At about minute 4:00 as one of design practical choices we set -3.5
@@sersheva Thanks again for watching and your comments. I will post more examples in the Analog Circuit video collection ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html Thanks again 🙋♂
I very much enjoy these analyses of yours but invariably questions pop up in my mind: what would happen if I wanted to assemble the real circuit, using concrete hardware, say a particular op-amp or a particular JFET? What parameters of the devices I should take into account, given a particular application, or what additional devices I would have to use to make this practical implementation work. It would be very interesting to have this discussion using an example of this or any other circuit you analyzed before. Anyway, thank you for this one; as always very interesting and educational.
Thanks for watching and your interest. Glad that you enjoyed this Gain-controlled Amplifier design video. You have a good question. I'd recommend to use a good general purpose Op Amp from Analog Devices or Texas Instruments as long as you are dealing with a nominal use case. Then in this case select a JFET that satisfies your max drain-source current and voltage and pinch-off Vth voltage. Then just start experimenting (that is the best way to learn further). During experimentation you will need to set values of coltrol/reference voltages. For example as a design practical choice we set -3.5
Did you solve the equation for the control function where the classic MOS/JFET function in linear region is used? I came across a similar problem where i want to adjust the MOS driving voltage for the switches in a R2R DAC so that they are a precise fraction of a linear resistor. One solution to this is to have a Vds voltage drop for the same unit current drop to the fraction resistor electronic regulated. The practical problem is that if the fractional voltage get into the region of the offset voltages of the regulator this get inprecise. I guess that the control function is nonlinear in both, the control voltage and the signal voltage. The nonlinearity of your problem sound similar to the problem i had; I need to operate the regulation circuit far from the operating point inside the R2D+MOS application to avoid strong mismatches because of regulator offset voltages. I found a solution by using a "third" MOS operating in saturation defining with the same Vgs the unit current. This current is different over PVT to the R2R+MOS but the solution is to force the Ids via a current mirror bank to the upscaled fraction resistor and the "rds" measurement resistor at the same time. Sadly the patent do not contain the math derivation: patentimages.storage.googleapis.com/61/52/50/6ec461abe5e4db/DE102007055104A1.pdf A good exercise would to apply the patent idea to a more linear control circuit with the basic operation like yours.
Thanks for watching, your interest in this circuit and your comment. We want to linearly control the resistance value between JFET drain-source as is the case in the presented circuit (notice that JFET drain-source resistance is nonlinearly controlled by Vgs (approximately quadratically)). The linear control is achieved by forcing the Ids current of the first JFET while keeping it in deep ohmic region via forcing Vref to say 1 volt. Notice that JFET transistor is a depletion device with max drain-source current Ids when gate-source voltage Vgs is zero. We can only reduce Vgs to negative values to deplete channel to reduce Ids current from its max value. MOSFET (say NMOS) on the other hand has zero channel and zero Ids at Vgs=0. We need to increase Vgs to increase Ids. Op Amps should be able to handle needed positive gate voltage of NMOS as well. The rest of concept should be the same in the sense that we need transistor to operate in deep Ohmic Region and hence Vds needs to be set properly to a small value (by properly setting drain voltage). I hope this explanation is helpful. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these further examples are interesting and helpful. 🙋♂
Thanks for watching and your good question. Yes, positive gain control is doable for Automatic Gain Control (AGC) circuit for instance using P-type JFET (there are numerous techniques). I will post such AGC circuit design example soon. For more JFET, BJT Circuit examples please see: Sawtooth signal generator with Op Amp, JFET and BJT Transistors ua-cam.com/video/5zHXTx-Vl20/v-deo.html Voltage Regulator design with BJT JFET & Op Amp ua-cam.com/video/CJl-urzeiTo/v-deo.html Push-Pull Power Amplifier with Darlington Transistors ua-cam.com/video/866MYibo8yE/v-deo.html For more analog signal processing examples see: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these are helpful. 🙋♂️
Very interesting! Never saw this topology before. Two questions: Is there any control voltage feedthru? Or it's free from it? And, is the Vref voltage be arbitrary? Or one have to find the correct one?
Glad that you liked this video. Depending on the chosen FET transistor, Vref needs to be adjusted to make sure transistor remains in deep ohmic region (so Vref might be required to be as low as ~0.5 volt). Here are few more examples: 1x, 10x, 100x, 1000x Switched-Gain Instrumentation Amplifier ua-cam.com/video/9-MLqyewXW8/v-deo.html Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html VCA Electronic Gain Control (Part 1): Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html Variable Gain Instrumentation Amplifier for designing Thermometer Current Source ua-cam.com/video/Ggf0yCaTTiY/v-deo.html Switched-Capacitor Amplifier Explained ua-cam.com/video/n8UOTmPI4aI/v-deo.html I hope these videos are interesting as well.
@@STEMprof Re. control voltage feedthru, I'd like to know if with this topology there is some of the control voltage superimposed on the output (since it is a common problem on all VCA topologies except when using optocouplers)
Thanks for comment & sharing your thoughts. As you pointed out, control Voltage feedthrough is a practical concern in all voltage-controlled electronic circuits. So while it should be minimal in this FET-based op amp circuit it needs to be simulated to make sure the level is low enough for the specific target application. I hope this is helpful. Please see Electronic Amplifiers Videos Playlist for more design choices and examples ua-cam.com/play/PLrwXF7N522y5679YAO-lFrNVYqV9XMNTr.html
For practical amplifier design, op amps and JFETs need to be selected carefully and if need be with proper temperature compensation. I suggest using zero-drift low-noise CMOS Op Amps possibly with internal temperature compensation from Texas Instruments or Analog Devices. It is also recommended to have small feedback capacitor between the output and negative input terminals of each op amp. Here are a few related videos: Gain & CMRR of Instrumentation Amplifier Explained ua-cam.com/video/Bw29QjHHzGo/v-deo.html PT100 RTD Temperature Sensor Explained with Error Compensation ua-cam.com/video/Fsd-X69awFk/v-deo.html Anti-Log Analog Computer with Temperature Compensation ua-cam.com/video/kk2c7Gk3nW4/v-deo.html I hope these videos are helpful.
Thanks for watching and your good question. JFET transistor is a depletion device with max drain-source current Ids when gate-source voltage Vgs is zero. We can only reduce Vgs to negative values to deplete channel to reduce Ids current from its max value. MOSFET (say NMOS) on the other hand has zero channel and zero Ids at Vgs=0. We need to increase Vgs to increase Ids. Op Amps should be able to handle needed positive gate voltage of NMOS as well. The rest of concept should be the same in the sense that we need transistor to operate in deep Ohmic Region and hence Vds needs to be set properly to a small value (by properly setting drain voltage). I hope this explanation is helpful. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these further examples are interesting. 🙏
Thanks for watching and your interest. Yes, it should, MOSFET & JFET are two different devices. For more analog circuits and signal processing examples see: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these Circuit videos are helpful.
Interesting ideas there, always a pleausre seeing different ideas especially around manipulating key paramters to mimic different use cases. I feel my question is trivial but i will ask it anyhow. I imagine the same can be made using a BJT or a mosfet? JFET are a little bit less ubiquitous than their relatives.
Thanks for watching and your good question. We can only use a transistor here that has a decent controllable Ohmic Region in its Current-Voltage I-V curve. Bipolar Junction Transistor (BJT) is a Diodic (PN junction) device with super small ohmic region that is extremely sensitive (exponentially) to tiny adjustments to the base-emitter control Voltage that is super limited in the range of 0.6-0.7 volt. Therefore BJT is not a proper choice when we want to realize a controllable resistor. On the other hand, Junction Field Effect Transistor (JFET) is a channel depletion device with a decent ohmic region in JFET drain-source voltage current characteristic curve. JFET current is quadratically related to control gate-source voltage (reasonable sensitivity) with a wide Vgs voltage range that works well in a stable feedback loop. I hope this explanation is helpful. For more JFET, BJT, Op Amp Circuit examples please see: Thermometer Circuit Design with Op Amp & BJT transistor ua-cam.com/video/55YsraFE0rg/v-deo.html Analog Logarithm Computer with BJT ua-cam.com/video/RpKEq5WyoLg/v-deo.html Sawtooth Waveform Generator design with OpAmp, JFET, BJT ua-cam.com/video/5zHXTx-Vl20/v-deo.html I will post more examples in my Analog Circuits Video playlist ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope this explanation & these Circuit videos are helpful. 🙋♂
@@STEMprof professor, I'm a fellow engineer. This is my bread and water. Exploring options is what I live for. However, we can't know all, my head is exploding with all I learned and recalling is now a bane. Earlier I was wondering if we could manipulate the gain using transconductance or transresistance for BJT and MOSFET. Sometimes the opamp feedback design doesn't integrate well, and I was surprised an actual opamp was used. Negative resistance oscillators use transresistance amplification, but not in a way one would like to control through an input. Like that video you suggested for temperature measurement using pnp transistors. Since temperature is an implicit control method ironically. There are those programmable potentiometers of late, but I suspect they can't be operated in reverse polarity which would render them useless I assume in a dynamic amplifier model. Suppose one is to model a resistor, bidirectional line, controlled by an external signal, jfet with their channel construction of mobile charges do make sense to be a variable resistor, and in both direction. My textbooks didn't have jfets 🤣. If I may impose on you, either guide me to the world of jfets or guide me to transresistance of the linear world. Thank you for your patience. I have bookmarked your playlist, the RF one as well. Those sit well within my domain. Your videos are underappreciated, you will always have my attendance.
@@STEMprof on a second thought, JFET isn't available for assembly. As much as i would like to learn JFET wizardry, i think I must find an alternative manner using more commonly available components. Discrete options may exist, but now after seeing your video, i have to get it out of my system and find a way to make it happen perhaps using transresistance method.
I'm probably missing something obvious. Why not use a single linear mosfet (generally used for its linear VI characteristics in instruments), use a control voltage to drive it directly and set the variable resistance in a single stage configuration ?
Thanks for watching and your good question. We want to linearly control the resistance value between JFET drain-source as is the case in the presented circuit. In your suggested scheme the drain-source resistance is nonlinearly controlled by Vgs (approximately quadratically). I hope this explanation is helpful. For more Amplifier, BJT, JFET Circuit examples please see: Sawtooth Oscillator with Op Amp, JFET and BJT Transistors ua-cam.com/video/5zHXTx-Vl20/v-deo.html Voltage Regulator design with BJT JFET & Op Amp ua-cam.com/video/CJl-urzeiTo/v-deo.html Push-Pull Power Amplifier with Darlington Transistors ua-cam.com/video/866MYibo8yE/v-deo.html Analog Computer to Raise Signal to power n ua-cam.com/video/IUTlBH1UraE/v-deo.html For more analog signal processing examples see: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope you also enjoy these circuit analysis videos. Thanks again. 🙏
We want to linearly control (for the second JFET) the resistance value between JFET drain-source as is the case in the presented circuit. Without OpAmp and its output connection to the Gate, the drain-source resistance would be nonlinearly controlled by Vgs (approximately quadratically). For more Amplifier, BJT, JFET Circuit examples please see my Analog Video playlist: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope this explanation is helpful.
Thanks for watching, your interest and suggestion. Please see a related circuit example ua-cam.com/video/C4tghZ-q6Zs/v-deo.html about an Instrumentation Amplifier with Electronic Gain Control. I will post more Gain-Controlled Amplifier examples in my Op Amp & Analog Circuit playlist ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these Circuit design and analysis videos are helpful. 🙋♂
Thanks for watching. Glad that you liked this Amplifier Circuit with electronic gain control. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html I hope these additional Circuit design & analysis examples are also interesting.🙋♂️
OK, from a first look - JFET resistance is equal to Vref / (-Vcontrol/R1). So voltage gain of second opamp is R2/RJfet + 1. This is because inverting input of opamp 1 is at virtual ground, so the opamp output will set Vgs of both JFETs in a way so that JFET1 will source current equal to Vcontrol/R1, as JFET2 is matched it will have identical resistance. Wonder if I'm right 😂
Thanks for watching and sharing your thoughts. Glad that this video is interesting. You summarized it well. I'd also add the following: As one of practical design choices we set -3.5
Nice example of an Op-Amp + FET based Variable gain amplifier, but you completely lost yourself in the explanation of the first half of the circuit. The idea being very simple, that is, to linearize the Vgs to Rds (on the first half), by inserting the 1st FET in the feedback loop of the 1st Op-Amp and, by doing so, generating a control voltage to the 2nd FET, that is compensated for the non-linear Vgs to Rds relationship of the FET, thus linearizing the -Vc to Gain relationship, one such a thing that would not be the case if one would apply -Vc to directly control the Rds of the 2nd FET.
Thanks for watching and sharing your thoughts & feedback. I am glad that this gain-controlled amplifier is interesting resulting in these good comments. I agree that there is always a better way to describe the operation of the circuit. I will post another example and will try to do a better job at explaining and analyzing the circuit. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html Thanks again.🙋♂️
Please put some kind of highlight around your cursor. With all the "this here" and "that there" commentary I constantly lose where you're writing and it makes it harder to follow. I have to back up and find it as you move it around, which is not helped by all the text in small font on the screen. Please take it constructively. Thank you! Otherwise good presentation.
Thank you for your feedback, and I appreciate your constructive comments! I'm glad to hear that you found the presentation useful otherwise. Your input is valuable for making the content easier to follow. I understand how it can be challenging to follow along when the cursor isn't highlighted, and the text is small. I'll take this into account for future videos and see how I can improve the experience by highlighting the cursor and adjusting the text size for clarity. Here are a few related videos: Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html Thanks again.
Thanks for watching. For more examples please see:
VCA Electronic Gain Control (Part 1): Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html
Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html
Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html
Thermometer Circuit Design with Op Amp & BJT transistor ua-cam.com/video/55YsraFE0rg/v-deo.html
Analog Vector Summer Circuit Design with Op Amp and BJT Transistors ua-cam.com/video/PIAsa0QNVns/v-deo.html
Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html
Power Amplifier Design (Class A) with Transformer ua-cam.com/video/gKlJrqGqeCI/v-deo.html
Op Amp Analog Computer Differential Equation Solver ua-cam.com/video/ENq39EesfPw/v-deo.html
Push-Pull Power Amplifier with Darlington Transistors ua-cam.com/video/866MYibo8yE/v-deo.html
Sallen-Key Analog Filter Design Tutorial ua-cam.com/video/KwUnQXbk7gM/v-deo.html
For more analog circuits and signal processing examples see the Analog Circuits Video playlist: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these Circuit design and analysis videos are interesting and useful. 🙋♂
Wow.... Thanks a lot!
Very useful!
You are welcome! 😊
That was awsome.
Thank you very much.
Thank you. I'm glad that you liked my video. Here are a few related Electronic Amplifier videos and tutorials:
Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html
VCA Electronic Gain Control explained ua-cam.com/video/cFzYZsPEtP0/v-deo.html
Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html
Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html
Let me know if these Circuit videos are helpful or if there is a specific Circuit you're interested in.
Thanks for sharing.
I would put a cap between R2 and Drain of the T2 and put high impedance say 100K from drain of T2 to 1V and the same thing for T1( that is high impedance say 100K from drain of T1 to 1V).
This way you ensure that the two transistors are matched at DC, to get your equivalent resistor. The AC signal gets coupled through the cap.
Thanks for watching and sharing your thoughts and practical considerations. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
Thanks again.🙋♂️
Yes I was thinking about the same issue that the drain on T2 is on a different DC level. I like your suggestion. I was also thinking about manipulating the DC level on Vin to (in this case to +1V) to bias the Drain on T2, but that becomes a mess as this will effect the output on the amplifier that will get a DC-level dependent on the gain.
Thanks for watching and sharing your thoughts and practical suggestions. To your good point, DC level manipulation adversely affects transistor bias points and output DC level. There are of course additional practical considerations for practical implementation of this circuit. For more Circuit examples pls see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
Thanks again.🙋♂️
I learned something new!!! Thx
You're welcome. Glad that this video is helpful. For more Electronic Amplifier examples see:
Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html
Power Amplifier Design (Class A) with Transformer ua-cam.com/video/gKlJrqGqeCI/v-deo.html
VCA Electronic Gain Control: Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html
Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html
Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html
I hope these Circuit design and analysis videos are interesting as well.
Very good explanation. Thank you.
You're welcome. Glad that you like the explanation in this video. For more Electronic Amplifier examples see:
Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html
VCA Electronic Gain Control explained ua-cam.com/video/cFzYZsPEtP0/v-deo.html
Analog Multiplier Circuit ua-cam.com/video/VP53A2zpVMQ/v-deo.html
Push-Pull Power Amplifier Design with Op Amp, Sziklai Darlington Transistors ua-cam.com/video/8BFzsi7-Vbs/v-deo.html
I hope these Circuit videos are interesting as well.
Thanks a lot for your videos my friend, they are extremely well explained.
In 4:07 why -3.5v??
You are welcome. Thanks for watching and your good questions. Glad that this video is useful. Sure, I will post an AGC circuit soon. And answering your question, At about minute 4:00 as one of design practical choices we set -3.5
@@STEMprof excellent my friend, now all circuit is clear.
@@sersheva Thanks again for watching and your comments. I will post more examples in the Analog Circuit video collection ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
Thanks again 🙋♂
I very much enjoy these analyses of yours but invariably questions pop up in my mind: what would happen if I wanted to assemble the real circuit, using concrete hardware, say a particular op-amp or a particular JFET? What parameters of the devices I should take into account, given a particular application, or what additional devices I would have to use to make this practical implementation work. It would be very interesting to have this discussion using an example of this or any other circuit you analyzed before. Anyway, thank you for this one; as always very interesting and educational.
Thanks for watching and your interest. Glad that you enjoyed this Gain-controlled Amplifier design video. You have a good question. I'd recommend to use a good general purpose Op Amp from Analog Devices or Texas Instruments as long as you are dealing with a nominal use case. Then in this case select a JFET that satisfies your max drain-source current and voltage and pinch-off Vth voltage. Then just start experimenting (that is the best way to learn further). During experimentation you will need to set values of coltrol/reference voltages. For example as a design practical choice we set -3.5
Did you solve the equation for the control function where the classic MOS/JFET function in linear region is used? I came across a similar problem where i want to adjust the MOS driving voltage for the switches in a R2R DAC so that they are a precise fraction of a linear resistor. One solution to this is to have a Vds voltage drop for the same unit current drop to the fraction resistor electronic regulated. The practical problem is that if the fractional voltage get into the region of the offset voltages of the regulator this get inprecise.
I guess that the control function is nonlinear in both, the control voltage and the signal voltage.
The nonlinearity of your problem sound similar to the problem i had; I need to operate the regulation circuit far from the operating point inside the R2D+MOS application to avoid strong mismatches because of regulator offset voltages. I found a solution by using a "third" MOS operating in saturation defining with the same Vgs the unit current. This current is different over PVT to the R2R+MOS but the solution is to force the Ids via a current mirror bank to the upscaled fraction resistor and the "rds" measurement resistor at the same time. Sadly the patent do not contain the math derivation:
patentimages.storage.googleapis.com/61/52/50/6ec461abe5e4db/DE102007055104A1.pdf
A good exercise would to apply the patent idea to a more linear control circuit with the basic operation like yours.
Thanks for watching, your interest in this circuit and your comment. We want to linearly control the resistance value between JFET drain-source as is the case in the presented circuit (notice that JFET drain-source resistance is nonlinearly controlled by Vgs (approximately quadratically)). The linear control is achieved by forcing the Ids current of the first JFET while keeping it in deep ohmic region via forcing Vref to say 1 volt. Notice that JFET transistor is a depletion device with max drain-source current Ids when gate-source voltage Vgs is zero. We can only reduce Vgs to negative values to deplete channel to reduce Ids current from its max value. MOSFET (say NMOS) on the other hand has zero channel and zero Ids at Vgs=0. We need to increase Vgs to increase Ids. Op Amps should be able to handle needed positive gate voltage of NMOS as well. The rest of concept should be the same in the sense that we need transistor to operate in deep Ohmic Region and hence Vds needs to be set properly to a small value (by properly setting drain voltage). I hope this explanation is helpful. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these further examples are interesting and helpful. 🙋♂
Is there a way to control the gain using a positive Vc between 0-5V, like an analog out from a microcontroller?
Thanks for watching and your good question. Yes, positive gain control is doable for Automatic Gain Control (AGC) circuit for instance using P-type JFET (there are numerous techniques). I will post such AGC circuit design example soon. For more JFET, BJT Circuit examples please see:
Sawtooth signal generator with Op Amp, JFET and BJT Transistors ua-cam.com/video/5zHXTx-Vl20/v-deo.html
Voltage Regulator design with BJT JFET & Op Amp ua-cam.com/video/CJl-urzeiTo/v-deo.html
Push-Pull Power Amplifier with Darlington Transistors ua-cam.com/video/866MYibo8yE/v-deo.html
For more analog signal processing examples see: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these are helpful. 🙋♂️
Very interesting! Never saw this topology before. Two questions: Is there any control voltage feedthru? Or it's free from it? And, is the Vref voltage be arbitrary? Or one have to find the correct one?
Glad that you liked this video. Depending on the chosen FET transistor, Vref needs to be adjusted to make sure transistor remains in deep ohmic region (so Vref might be required to be as low as ~0.5 volt). Here are few more examples:
1x, 10x, 100x, 1000x Switched-Gain Instrumentation Amplifier ua-cam.com/video/9-MLqyewXW8/v-deo.html
Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html
VCA Electronic Gain Control (Part 1): Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html
Variable Gain Instrumentation Amplifier for designing Thermometer Current Source ua-cam.com/video/Ggf0yCaTTiY/v-deo.html
Switched-Capacitor Amplifier Explained ua-cam.com/video/n8UOTmPI4aI/v-deo.html
I hope these videos are interesting as well.
@@STEMprof Thanks for your answer. Yes, of course I will watch all of them (and already watched some), they are all great. Thank you!
@@STEMprof Re. control voltage feedthru, I'd like to know if with this topology there is some of the control voltage superimposed on the output (since it is a common problem on all VCA topologies except when using optocouplers)
Thanks for comment & sharing your thoughts. As you pointed out, control Voltage feedthrough is a practical concern in all voltage-controlled electronic circuits. So while it should be minimal in this FET-based op amp circuit it needs to be simulated to make sure the level is low enough for the specific target application. I hope this is helpful. Please see Electronic Amplifiers Videos Playlist for more design choices and examples ua-cam.com/play/PLrwXF7N522y5679YAO-lFrNVYqV9XMNTr.html
Hey, how stable would this be over temp? I imagine it would drift a lot? What would be a solution for that?
For practical amplifier design, op amps and JFETs need to be selected carefully and if need be with proper temperature compensation. I suggest using zero-drift low-noise CMOS Op Amps possibly with internal temperature compensation from Texas Instruments or Analog Devices. It is also recommended to have small feedback capacitor between the output and negative input terminals of each op amp. Here are a few related videos: Gain & CMRR of Instrumentation Amplifier Explained ua-cam.com/video/Bw29QjHHzGo/v-deo.html
PT100 RTD Temperature Sensor Explained with Error Compensation ua-cam.com/video/Fsd-X69awFk/v-deo.html
Anti-Log Analog Computer with Temperature Compensation ua-cam.com/video/kk2c7Gk3nW4/v-deo.html
I hope these videos are helpful.
Is it possible to replace JFET->MOSFET somehow? What is THD of the circuit we could get?
Thanks for watching and your good question. JFET transistor is a depletion device with max drain-source current Ids when gate-source voltage Vgs is zero. We can only reduce Vgs to negative values to deplete channel to reduce Ids current from its max value. MOSFET (say NMOS) on the other hand has zero channel and zero Ids at Vgs=0. We need to increase Vgs to increase Ids. Op Amps should be able to handle needed positive gate voltage of NMOS as well. The rest of concept should be the same in the sense that we need transistor to operate in deep Ohmic Region and hence Vds needs to be set properly to a small value (by properly setting drain voltage). I hope this explanation is helpful. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these further examples are interesting. 🙏
Nowdays it's much more easy to find a dual nMOSFET 7002w SMD for example...@@STEMprof
Good point regarding availability of NMOS including 2N7002 MOSFET transistors from Infineon or Onsemi. Thanks for the comment. 🙋♂️
The falstad simulator shows difference in behavior between jfet and mosfet.
Thanks for watching and your interest. Yes, it should, MOSFET & JFET are two different devices. For more analog circuits and signal processing examples see: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these Circuit videos are helpful.
Interesting ideas there, always a pleausre seeing different ideas especially around manipulating key paramters to mimic different use cases. I feel my question is trivial but i will ask it anyhow. I imagine the same can be made using a BJT or a mosfet? JFET are a little bit less ubiquitous than their relatives.
Thanks for watching and your good question. We can only use a transistor here that has a decent controllable Ohmic Region in its Current-Voltage I-V curve. Bipolar Junction Transistor (BJT) is a Diodic (PN junction) device with super small ohmic region that is extremely sensitive (exponentially) to tiny adjustments to the base-emitter control Voltage that is super limited in the range of 0.6-0.7 volt. Therefore BJT is not a proper choice when we want to realize a controllable resistor. On the other hand, Junction Field Effect Transistor (JFET) is a channel depletion device with a decent ohmic region in JFET drain-source voltage current characteristic curve. JFET current is quadratically related to control gate-source voltage (reasonable sensitivity) with a wide Vgs voltage range that works well in a stable feedback loop. I hope this explanation is helpful. For more JFET, BJT, Op Amp Circuit examples please see:
Thermometer Circuit Design with Op Amp & BJT transistor ua-cam.com/video/55YsraFE0rg/v-deo.html
Analog Logarithm Computer with BJT ua-cam.com/video/RpKEq5WyoLg/v-deo.html
Sawtooth Waveform Generator design with OpAmp, JFET, BJT ua-cam.com/video/5zHXTx-Vl20/v-deo.html
I will post more examples in my Analog Circuits Video playlist ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope this explanation & these Circuit videos are helpful. 🙋♂
@@STEMprof I'm pretty sure they'll be quite useful.
Thanks again for watching and your interest in these circuit videos.
@@STEMprof professor, I'm a fellow engineer. This is my bread and water. Exploring options is what I live for. However, we can't know all, my head is exploding with all I learned and recalling is now a bane. Earlier I was wondering if we could manipulate the gain using transconductance or transresistance for BJT and MOSFET. Sometimes the opamp feedback design doesn't integrate well, and I was surprised an actual opamp was used. Negative resistance oscillators use transresistance amplification, but not in a way one would like to control through an input. Like that video you suggested for temperature measurement using pnp transistors. Since temperature is an implicit control method ironically. There are those programmable potentiometers of late, but I suspect they can't be operated in reverse polarity which would render them useless I assume in a dynamic amplifier model. Suppose one is to model a resistor, bidirectional line, controlled by an external signal, jfet with their channel construction of mobile charges do make sense to be a variable resistor, and in both direction. My textbooks didn't have jfets 🤣. If I may impose on you, either guide me to the world of jfets or guide me to transresistance of the linear world. Thank you for your patience. I have bookmarked your playlist, the RF one as well. Those sit well within my domain. Your videos are underappreciated, you will always have my attendance.
@@STEMprof on a second thought, JFET isn't available for assembly. As much as i would like to learn JFET wizardry, i think I must find an alternative manner using more commonly available components. Discrete options may exist, but now after seeing your video, i have to get it out of my system and find a way to make it happen perhaps using transresistance method.
I'm probably missing something obvious. Why not use a single linear mosfet (generally used for its linear VI characteristics in instruments), use a control voltage to drive it directly and set the variable resistance in a single stage configuration ?
Thanks for watching and your good question. We want to linearly control the resistance value between JFET drain-source as is the case in the presented circuit. In your suggested scheme the drain-source resistance is nonlinearly controlled by Vgs (approximately quadratically). I hope this explanation is helpful. For more Amplifier, BJT, JFET Circuit examples please see:
Sawtooth Oscillator with Op Amp, JFET and BJT Transistors ua-cam.com/video/5zHXTx-Vl20/v-deo.html
Voltage Regulator design with BJT JFET & Op Amp ua-cam.com/video/CJl-urzeiTo/v-deo.html
Push-Pull Power Amplifier with Darlington Transistors ua-cam.com/video/866MYibo8yE/v-deo.html
Analog Computer to Raise Signal to power n ua-cam.com/video/IUTlBH1UraE/v-deo.html
For more analog signal processing examples see: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope you also enjoy these circuit analysis videos. Thanks again. 🙏
Why the output of first opamp connected to gates of the FET??
The FET already has voltage on the gate from the current Id
We want to linearly control (for the second JFET) the resistance value between JFET drain-source as is the case in the presented circuit. Without OpAmp and its output connection to the Gate, the drain-source resistance would be nonlinearly controlled by Vgs (approximately quadratically). For more Amplifier, BJT, JFET Circuit examples please see my Analog Video playlist: ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope this explanation is helpful.
Hi, I think could be interesting a single power supply version of this circuit.
I would be rather interested, at least.
Thanks for watching, your interest and suggestion. Please see a related circuit example ua-cam.com/video/C4tghZ-q6Zs/v-deo.html about an Instrumentation Amplifier with Electronic Gain Control. I will post more Gain-Controlled Amplifier examples in my Op Amp & Analog Circuit playlist ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these Circuit design and analysis videos are helpful. 🙋♂
Very interesting 👍
Thanks for watching. Glad that you liked this Amplifier Circuit with electronic gain control. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
I hope these additional Circuit design & analysis examples are also interesting.🙋♂️
OK, from a first look - JFET resistance is equal to Vref / (-Vcontrol/R1). So voltage gain of second opamp is R2/RJfet + 1.
This is because inverting input of opamp 1 is at virtual ground, so the opamp output will set Vgs of both JFETs in a way so that JFET1 will source current equal to Vcontrol/R1, as JFET2 is matched it will have identical resistance.
Wonder if I'm right 😂
Thanks for watching and sharing your thoughts. Glad that this video is interesting. You summarized it well. I'd also add the following: As one of practical design choices we set -3.5
Nice example of an Op-Amp + FET based Variable gain amplifier, but you completely lost yourself in the explanation of the first half of the circuit.
The idea being very simple, that is, to linearize the Vgs to Rds (on the first half), by inserting the 1st FET in the feedback loop of the 1st Op-Amp and, by doing so, generating a control voltage to the 2nd FET, that is compensated for the non-linear Vgs to Rds relationship of the FET, thus linearizing the -Vc to Gain relationship, one such a thing that would not be the case if one would apply -Vc to directly control the Rds of the 2nd FET.
Thanks for watching and sharing your thoughts & feedback. I am glad that this gain-controlled amplifier is interesting resulting in these good comments. I agree that there is always a better way to describe the operation of the circuit. I will post another example and will try to do a better job at explaining and analyzing the circuit. For more Circuit examples please see ua-cam.com/play/PLrwXF7N522y4c7c-8KBjrwd7IyaZfWxyt.html
Thanks again.🙋♂️
Please put some kind of highlight around your cursor. With all the "this here" and "that there" commentary I constantly lose where you're writing and it makes it harder to follow. I have to back up and find it as you move it around, which is not helped by all the text in small font on the screen. Please take it constructively. Thank you! Otherwise good presentation.
Thank you for your feedback, and I appreciate your constructive comments! I'm glad to hear that you found the presentation useful otherwise. Your input is valuable for making the content easier to follow. I understand how it can be challenging to follow along when the cursor isn't highlighted, and the text is small. I'll take this into account for future videos and see how I can improve the experience by highlighting the cursor and adjusting the text size for clarity. Here are a few related videos: Instrumentation Amplifier with Electronic Gain Control ua-cam.com/video/C4tghZ-q6Zs/v-deo.html
Voltage-Controlled Attenuator Overview ua-cam.com/video/cFzYZsPEtP0/v-deo.html
Thanks again.