NXP CAMPUS CONNECT 1 Feb 2022 Process Design Kit in VLSI Design Flow

Design enablement group is continuously working to enable best in class tools,
methodologies, design environments, PDK’s and foundation IPs while working with all R&D
Organizations and BLs for NXP’s target markets.
This video provides overview of following :
1. Need for process design kit
2. What is process design kit:
components of PDK and overview of each components
PDK way of working in general
Speaker:
Indu Bala is working with NXP since 2008 and has 16+ years of experience in
Semiconductor Industry. Currently she is working as Integral Project Manager for DE
Operations team, NXP. She has around 14 years of experience with PDK development in
NXP. He has managed PDK from different nodes ranging from 180nm to 14nm as PDK
Integration lead along with front end development. He has also supported multiple
IP migration across technologies for different PDK over the years.
Academically she hold M.Tech in Microelectronics from BITS PILANI and PMP certified.
Vandana Narula is working as PDK deck developer having expertise in LVS, extraction and
EMIR domain. Academics include M.Sc. Physics from Delhi University and M.Tech in
Material Science from IIT Delhi. Also worked for Micron Technology in USA and
Peregrine Semiconductor ( Australia ) as Yield Enhancement Engineer.
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