How to code Verilog for a servo! Using the basys2 FPGA board.

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  • Опубліковано 15 гру 2024

КОМЕНТАРІ • 3

  • @jathinvankadari3505
    @jathinvankadari3505 10 місяців тому

    is this works for Basys 3 also

  • @sepsmusic
    @sepsmusic 4 роки тому

    Hi, thanks so much for the video! When looking at the constraint file, I was confused as to why you named the port "servo_reg", and not "servo", which was the name of your module's output. Clearly, it seems like it worked, but I'm just wondering if either name would have worked?

  • @cuevalabs
    @cuevalabs 4 роки тому

    Thanks for sharing this, I have a question, is this working with Basys 3 ??