Basics of Digital Low-Dropout (LDO) Integrated Voltage Regulators - Presented by Mingoo Seok

Abstract: System-on-chip processors integrate low-dropout (LDO) voltage regulators (VRs) to improve energy efficiency by allowing each core on a shared input voltage rail to operate at a unique voltage. LDOs enable compact size, low cost, and relatively simple integration while avoiding large inductors or capacitors. This tutorial introduces the key trade-offs between analog and digital LDOs. Then, the presentation focuses on the basics of digital LDO designs while covering the primary specifications of transient response, load regulation, current efficiency, load-current range, and dropout voltage. Finally, this tutorial presents a wide range of state-of-the-art LDOs while highlighting the key design trade-offs.
Bio: Mingoo Seok is an Associate Professor of Electrical Engineering at Columbia University. His research interests are in ultra-low-power, adaptive, and intelligent VLSI hardware design. He has received several awards including the NSF CAREER award. He obtained his Ph.D. in Electrical Engineering from the University of Michigan in Ann Arbor in 2011. He is the senior member of IEEE.

[@dlsodadl]

If the PSRR is worse than the analog version which already is having hard time meeting PSRR specs, can digital LDO be actually practical? Where would we use digital LDO if the LDO's main job is to have good PSRR?

[@congtao4200]

so the trend is all digital

[@mukundmurali3720]

if something can be done in digital achieving the required specs and power consumption , it will be done in digital to avoid using bulky capacitors and have good process scaling.

[@congtao4200]

@@mukundmurali3720 hh, get! Thank you professor!