No, that's not the only reason! The main issue isn't ESR but rather ESL. When a component (like a CPU) switches rapidly, the parasitic inductance in the capacitor can limit the inrush current that the capacitor would otherwise supply. This means that if the component demands a large amount of current very quickly, the inductance can prevent the current flow, effectively making the capacitor invisible to the load - it’s as if the capacitor isn’t there at all! To address this, we use multiple capacitors in parallel, which reduces the total ESL because parallel inductances combine to lower the overall inductance. Additionally, smaller-value capacitors like 1uF, 0.56uF, and 0.1uF are often used together instead of a single large capacitor because lower-valued capacitors generally have less inductance. So their combination ensures better performance across a wide range of frequencies!
Very clear explanation. I might have missed you mentioning it, but it's worth noting that, in general, esr is inversely related to capacitance. So even though using two smaller capacitors in parallel reduces total esr because they are in parallel, the esr of each of the smaller capacitors, other things being equal, will be larger than the esr of a single cap with the same total capacitance.
Hi, from a practical point of view, the video is very good, the ideas are correct. But you missed the correct way to add those impedances. You can't add the capacitive impedance and the resistive impedance. Impedance is a complex value, so the correct value is Z = sqrt(Z_c^2 + R^2).
No, that's not the only reason!
The main issue isn't ESR but rather ESL. When a component (like a CPU) switches rapidly, the parasitic inductance in the capacitor can limit the inrush current that the capacitor would otherwise supply. This means that if the component demands a large amount of current very quickly, the inductance can prevent the current flow, effectively making the capacitor invisible to the load - it’s as if the capacitor isn’t there at all! To address this, we use multiple capacitors in parallel, which reduces the total ESL because parallel inductances combine to lower the overall inductance.
Additionally, smaller-value capacitors like 1uF, 0.56uF, and 0.1uF are often used together instead of a single large capacitor because lower-valued capacitors generally have less inductance. So their combination ensures better performance across a wide range of frequencies!
Very helpful additions :)
Very clear explanation. I might have missed you mentioning it, but it's worth noting that, in general, esr is inversely related to capacitance. So even though using two smaller capacitors in parallel reduces total esr because they are in parallel, the esr of each of the smaller capacitors, other things being equal, will be larger than the esr of a single cap with the same total capacitance.
Thanks for sharing!
Thank You^^
Glad it was helpful :)
Great Video!
Glad you enjoyed it
My favorite phrase, I use it regularly: "Not Exactly"....
mine too :)
I vaguely remember something about the capacitor obsorbing ripple peaks as it charges, then filling ripple troughs as it discharges! 🤔
You are correct - the capacitor smooths out the ripple by charging during the peaks and discharging during the troughs.
Nice explanation ,😊
Thanks! Glad you liked it.
Yep!!!!@@RGBEngineering
Thanks for digi alarm clock by rgb
Hi, from a practical point of view, the video is very good, the ideas are correct. But you missed the correct way to add those impedances. You can't add the capacitive impedance and the resistive impedance. Impedance is a complex value, so the correct value is Z = sqrt(Z_c^2 + R^2).
thank you for that additional info!