I love how you always solve the problems that appear during the video, rather than just making a video showing the final product. You show the entire process of the thing that you're making. Brilliant video as always!
Editing is a wonderful way to do this. Not taking anything away from him, but editing allows him to get his ducks in a row before he adds the sound to his video. I do think this series is great though, as I design fpga's and I do what he's doing in a somewhat sw environment, but seeing it in hw in bread board format really gives a physical visual of what I have to map in my head.
You'll also notice all of his wires are pre-shaped and cut to the perfect lengths. That is because these videos require an absolutely ABSURD amount of planning. And not only pre-planning, but the voice over is added after recording the footage, meaning he can edit out errors and tailor his commentary around whatever unexpected outcomes occur during filming.
43:25 so glad you showed us the comparison in processing time without that extra blanking interval being used or it would have left a big hole in my life 😂
The BBC Micro had a cunning strategy of running the memory at twice the speed of the CPU so that the video and CPU accessed the memory on alternate cycles. This allows its CPU to work at full 2 MHz.
The Dragon 32/64 computers certainly did that. I believe the memory access was controlled by the SAM chip so the CPU wasn't directly connected to the RAM.
@Hans J Another fav technique was for the video card to only access memory once or twice every 8 pixels, hence the weird restrictions on number of colours in a small block of screen area.
Commodore64 works like that, the VIC-II was created from scratch to be the master bus controller it even refreshes the cheaper dram in between cycles. 6510 is only locked out every 8th line when the VIC-II needs to fetch next block of background/foreground color data.
I absolutely love how cleanly he does these. I've been prototyping stuff recently and I'm trying to get them even a quarter as clean as he's doing. And I'm cheating and using an ESP32 so I've got about 1% the complexity of those two boards he's doing....
@@AftercastGames You can! Not bent, but you can buy precut wires for breadboards, I have a box of those. Just search for them on Aliexpress or similar.
@@DingleFlop when I was doing telecommunications at school it was strictly forbidden to bend like this the cables because the teacher was dumb and hated them even if it makes the breadboard cleaner I wish i had Ben as teacher
An awesome series, thank you very much! For anyone interested: This scheme for only processing in the blanking intervals is what you might call the standard "retro" method for sharing RAM access between CPU and "GPU". Commonly used in early home computers because the implementation is reasonably straightforward and not too costly in parts. As Ben alluded to there are others ways. A few of the more common alternate options to consider: -Costly: Use dual-ported RAM then the video and CPU can have their own RAM bus and won't clash - great for speed - old-school workstations -Custom: Give the "video processor" it's own RAM - no clashes and more system RAM but communication is more complicated - eg Ti9918 -Fast RAM: Clock the RAM twice as fast as the CPU and "GPU" and give each access on alternate cycles - eg BBC Micro Most "classic" micros used either a variant of Ben's approach or one of the schemes I've mentioned. These days as SRAM is cheap and fast if I were smart enough to make a VGA board such as Ben's I'd use the last option and run everything off one crystal for easy synchronisation... ...or if i were interested in something more "retro", especially if hacking colour GFX in to a Z80 system, I'd absolutely use a Ti9918 or one of it's variants. P.S. I particularly like using Ti's chips to augment B/W CP/M systems as all you need to do is make a Ti-based GFX board, choose some appropriate ports to accesses it, and run the machine's native output through the Ti chip's built-in mixing feature. The normal output becomes a layer in the Ti chip's output and you can use the Ti chip to add further colour GFX and sprites as you wish - I never understood why a Ti GFX board wasn't an option for many such machines, I have kind-of done the reverse with my COLECO ADAM to give it 80 col CP/M functionality.
Through this series, I was initially surprised how relatively uncomplicated it was to get the video card running with the ROM image. Now I'm even more surprised that having it use the RAM was so much extra complication.
I love the "Some assembly required" on the box, makes it sound like there is just a bit of assembly needed, you know some cable here and some cable there...
I love how you in a way arrived at one of the workarounds they used in Sonic the Hedgehog on the Genesis. I think transparency effects in that game were done with some clever palette swapping during the VBI, and on a monitor with a small enough amount of overscan you can see some colored dots towards the bottom of the screen that are framebuffer artifacts of that palette swap. This was the coolest 2-3 hour detour I've ever taken on UA-cam.
This is such a great series! When you feel done, you should design your own PCB, with this setup, and talk us through some design decisions :) Order it and solder it together! It'd be really cool if you later published those PCB schematics as well!
The ending with you using the extra processor time was a really cool visual representation of how much slower your processor runs with that less time. Very cool!
@@dan_loup you won't even need timing, when it done drawing, then draw the next move, maybe with some optimization so it only writes to places which change it would be faster, but like this it would be playable
@@user-me7hx8zf9y well people have built computers that are legitimately stronger than this one using redstone in minecraft Which is actually really amazing
I can already imagine how it could work. There could be a circular buffer holding the coordinates of each pixel of the snake, and each move the back pixel would be erased and removed and a new front pixel added and drawn. Then it could check for collisions by reading the video buffer back, lol.
3 роки тому+12
After a workday doing stuff in much higher languages, cloud and basically nothing which feels hand crafted anymore, this is so relaxing to watch. Thank you! I've seen a cable stripper machine built with an Arduino the other day. Now I have an appreciation for why it's a cool thing to have. So many tiny wires with exact lengths.
There have been a lot of sound card designs based on R2R networks connected to a parallel port. That would be an easy hack to control. Although timing would become difficult. An autonomous sound card that works similar to the videocard would be relatively easy as it would be the same as this videocard but with a clock at 10kHz and without all the pixel counting. The output stage would be very similar and it should read only a single byte of memory. Maybe set a flag in memory that the sample has been read. A 'sample and hold'-circuit will set and keep the poormans DAC at a value for the length of a sample. Feasibility: doable.
@@ReneKnuvers74rk that’s a lot of hardware overhead for nothing because the cpu still has to keep that memory location populated and you somehow have to time it. You simply need a timer periodically interrupt the cpu 8000 times per second (or whatever sample rate you want) and the cpu writes the next sound byte to a parallel port and you use a resistor ladder to drive an audio amp. Easy.
Build an RTR network mapped to an output port. With a D2A converter you can synthesise multi part audio in software. I did something very similar on my TRS-80 many years ago based on a design from my father. Granted the Z80 was running at 1.77MHz but the original implementation was done on an 8080 running around 1MHz so it should be totally doable on a 6502 with this design. As long as the processor isn’t paused so often :-)
Hi Ben, this is an interesting series, as I learned 6502 assembler on an Apple ][+ way back in ‘78/‘79, so the 6502 has a special place in my heart. Some alternate strategies for this: 1) use a dedicated “video/CRT-controller” chip to do the heavy lifting (ex: the Vic II (Commodore Vic 20/C64), TMS9918 (TI 99/4A), Propellor (PE6502 kit), PPU (Nintendo NES), or 2) interleaved frames so only every other line gets drawn, giving the 6502 more processing time.) (used by the Gigatron) 3) a separate RAM chip that shares the same address bus, but it’s data bus is used solely by the video circuitry. This would require some sort of video synchronization buffer that would take write requests from the 6502 in the range $2000-$3FFF and stuff the data into a FIFO buffer, then - in the time interval currently used by the current design - the bytes would be taken out of the FIFO buffer and stuffed into the video RAM while the video circuitry isn’t drawing anything (end of each horizontal line.) This way, the 6502 can) run at full speed; a problem with the current design as it’s questionable what would happen if an interrupt (NMI or IRQ) were to happen while DMA-bar was asserted, halting the 6502. 4) bite the bullet and use dynamic RAM instead of static RAM; then the video counters could be used to generate the RAS/CAS lines needed by dynamic RAM, and you could interleave memory access between the 6502 (clock phase 0), and the dynamic RAM refresh/video circuitry (clock phase 1). On a related note, you could use a 74LS90 decade counter to divide the video clock by 10 to get the CPU clock! This would eliminate the 1 MHz crystal oscillator, and synchronize the two clock signals.
How about RC on reset? charging capacitor holds reset low long enough after power is applied. Pressing reset button isn't difficult, I find the RC reset more elegant.
43:00 I am glad you switched the configuration to show the cleaner but slower processing method. I was really wanting to see that. Fantastic video series, thank you.
You have secured yourself a seat in the doomsday bunker. If there's an apocalyptical event and humanity needs to restart with a handful of people that have in-depth knowledge about everyday things, you sir are needed!
Ben... I started out my career in Electronics and Engineering building a lot of circuits like you demonstrate here... a lot of the time just for my own learning, so I'm very familiar with how most of this works that you're doing. But, the way you present this information makes it so interesting to watch even when I know what you're doing and how you're doing it, it's captivating the way you present it. Thank you for making these videos... brings back so many memories. I may even get one of your kits just to play around with and remind myself how much fun it is to build something so rudimentary and see it work.
Your videos are always inspiring, Ben! I am really impressed about how you make it simple to comprehend the very inner concepts of what happens inside a modern computer. I really love your linking from a logic diagram to the physical logical chips in the breadboards. Congratulations!
It's amazing seeing the issues you ran into building this and realizing how much work went into the computer I'm typing this comment on. Also really cool seeing the CPU bottleneck here and an explanation of how/why that happens.
Thanks Ben. Your videos on building an 8 bit pc were really helpful in diving into understanding how a computer functions from the ground up. This is another great video that is sure to have inspired many others to learn!
I was only generally interested in this, but it proved to be very informative, explaining a lot of things I knew about from my old computers, but not the express reasons. There's obviously a lot that can be done to improve it, but better people than me have already done the hard work! ;)
I didnt think you could instantly silence a 6502 like that Ben, the c64 has a bunch of logic around it (for sprite DMA that occurs on the first half of the cycle, and also reading the character pointers) because the 6502 will only pause on the next *read* cycle.... if it is writing, it will continue. In fact, the writes may be 1-3 cycles, depending on the instruction that is completing, which would kinda match what you're seeing on the left hand side of the screen? Also, might be easier to divide down the video clock to run the CPU??? Awesome series man, loving it.
FPGAs are now affordable to any hobbyist.. next: cheap ASICs, you just "order" 100x faster clocked ASIC of your design for $50 (still expensive per chip, but incredibly cheap per chip also.. paradox..) Then 10 years later you can print the ASIC at home with Samsung Print-A-Chip that costs $220 .. that'll be cool, and I'll be dead by then but at least someone will have fun...
@@jamesparker8529 We were just having thought-play what it'll be like 20-30 years from now... ASIC is more like 100 grands and up.. and if you need more than 1 round, well, better have deep pockets.. cya in Rev.B, mate..
Old video cards always struggled with full memory re-writes. That's why they used things like sprites, tiles, and palette effects. You should add in a colour palette then do some fun animations with colour cycling.
Thanks! Love the content! I'd love to see a follow-up video that updates the output protocol from VGA to DVI, just to show the evolution of electronic standards. Might be annoyingly difficult, but then again, so is building a computer and video card using breadboards!
Thank you for this interesting and enjoyable series, much appreciated. If you happen to develop this theme further might I suggest a version where the RAM is driven twice as fast as the VGA logic and CPU, the two synchronised to the same clock? CPU and VGA can then alternate access to RAM so simplifying the logic and allowing the CPU to run at full speed... -Current design a method for sharing access where RAM/ROM is slow (typical of more basic retro systems) -Suggested scheme being one method to simplify / gain efficiency where RAM is fast enough (BBC Micro an example) -It might then be a "fun" jumping-off point for what to do if RAM is fast enough but ROM isn't Thanks again.
@@Gamer-uf1kl Actually neurons don't reproduce. However you can always create new synapses, which are the connections between neurons and most likely where all the magic happens.
@@Roxor128 You can do it without double buffering. Back in the 80's, I wrote a quite efficient version in Motorola 68000 assembly that avoided the need for double buffering by only redrawing the cells that had changed.
Seeing this system go from "ultra basic" to "dynamically drawing onto a screen" has been quite a journey! It really makes me feel like I'm in the pioneering age of computers again.
Could using the “back porch” signal for getting control of the bus rather than using the vertical blanking signal be a better way of dealing with the artifacting at the start of each scan line, or would that be too impractical?
Seems like you could divide the graphics clock down to drive the CPU. That way you can decode the pixel counter and halt the CPU when the graphics card is about to grab the bus.
Love the project! Just watched from start to here, I feel like this is a better format to learn basics than any school lol, I appreciate the recapping of everything I needed it. Keep up the good work!
It sounds a lot like an IBM Model M, but it could be a keyboard with blue switches. I'm sure someone more knowledgeable than me about mechanical keyboards could tell you exactly what it is
I love that you’re sharing this skill set that will too easily become a lost art. I particularly like how you work through the problem solving, showing the problem, proposing a solution and testing. These skills are so vital even in today’s modern development teams. Thanks for your efforts!
the next upgrade would be to make the video memory separate. Still part of the address bus, but separate, so that execution can keep going inside the frame, even if it's not display instruction
This blows my mind. So awesome. I’ve learned so much from your videos, and every time I re watch I learn more. Could you ever run basic on this, and output a Commodore 64 style user interface?
Hi Ben! Greetings from Germany! I just want to say thank you for your high quality content! I'm a cs student from TU Dresden. The courses are generally pretty good, but nothing compared to the kind of videos you make. So thanks! :)
A CS student who voluntarily exposes his identity on the internet. Maybe change your field into Applied Arts and develop the next Fontus, why don't you?
I absolutely love this video series. I find It is so easy to follow your electronic explanations but I fall behind a bit with the software side, I understand eventually but I find "8-Bit Show And Tell" easier to understand which I think is due to the pace rather that the different architecture. But I still love your work. Thumbs up.
That comb effect is common, when you write Atari 2600 games, that do just a little too much, per scanline. The most well-known game with that artifact, is Atari's own Pac Man.
Absolutely loving these series. Getting the video bit I'd not of thought how to do so, whereas I'd probably of used a different approach using 2 banks of RAM memory mapped to a byte for controlling what bank is to be written to, or made a DMA circuit as you did and add to the circuit a quick way to mirror the current memory into the current bank as a kinda local cache (Kinda how oldskool VGA used to with the bank flipping and bank scrolling modes with their onboard RAM mirroring system RAM at location 0x0000000Ah of the main memory map). . Also in theory, your VGA+CPU could be combined as one GPU processing unit to allow an independent CPU to do more independent processing, i.e. fill GPU RAM banks, then recall individual banks when needed thus leaving the main CPU to not need to do all the rendering. Can't wait to see where you take this next :)
That is of course a better approach and closer to what modern video cards are doing. But I think Ben here is trying to make something that is similar to early computers and is as simple as possible.
@@toto123456ish Maybe, but has he used the approach Commodore and many, many other manufacturers 40+ years ago did? I think it would be great to see the 6502 syncing with that circuit without flaws. He has already done the most challenging part which is the video system itself. For this reason I still don't understand why wouldn't he improve the interface just a little more. It could also be useful as an example of shared memory.
@lass kinn The contest was lost before he started building this. Later PETs can destroy the monitor (killer poke) and I heard the Sinclair QL video system can be destroyed by just unplugging the video connector while the computer is running (I have a couple of them but don't prettend I'm going to try 😁). So, nothing worse than those. His series about the video circuit are inspiring, it's just I feel this could be improved greatly without being that expensive on the component side. As a remark, this can't be called a GPU (too primitive). Video system (or subsystem) is a better term.
Awesome!! Tnx. I built an house computer 1990-ish with an 8 bit microcontroller for controlling temperatures in a house. This have been an great memory trip back in time. Back then we wrote all code direct as assembler code but it worked.
something interesting you could try, is having a system similar to the c64 where every clock cycle the video ram and cpu take it in turns to read or write to ram, so the clock would be 20 mhz and the video and cpu would be 10 mhz
@@SkyCharger001 I disagree. The c64 has a 14.32Mhz crystal (17.73 for PAL) that is divided by the 8701 chip into a 8.18Mhz (7.88 for PAL) which gets fed into the VIC-II chip on pin 22. This is often called the Dot Clock or Pixel Clock. The VIC-II chip then divides this by 8 to provide a 1.02Mhz signal (0.98 for PAL) from pin 17 to the rest of the system. This 1MHz signal is the ø2 clock the processor and I/O chips run from. The 1Mhz clock signal ratio is 50:50, in that it is 5volts half the time and 0volts the other half. A complete transition from High-Low-High is 1Mhz. Fortunately, the VIC-II chip is designed to use the half of the cycle that the 6510 (6502) can not use. So the c64 as a whole can do twice the "work" per 1Mhz clock cycle, because there are two chips alternating with the two halves of the clock signal. You could point at the RAM (or even the address & data buses) in the c64 can call them Double Data Rate (DDR) as they're capable of being accessed twice per clock cycle, once by the VIC-II and once by the 6510. This, however, does not make it a 2Mhz machine. The 6510 can still only run at 1MHz.
@@ownpj The VIC-II is capable of using both phases when it needs to (and it does once per row under normal operations), which would be impossible were the base clock truly at 1MHz
Yes, The VIC-II can use both the high and low phases of the 1Mhz clock. The 6510 processor and all the I/O chips are still 1MHz clocked devices. Every clock signal has two phases, not all systems utilize both phases. Using both phases doesn't mean the clock is magically twice as fast, but twice as efficient.
Every time you post a video there's a little bit of joy that bubbles up in me. As ever - great video. The waiting time between each is really worth it. I wonder if you will ever couple this to your 8-bit breadboard computer.
To fix the visual issues and improve performance, could you have two display buffers, have one you're displaying and another you're updating, and switch between these buffers at the end of the display cycle?
Exactly what I was thinking, would actually be pretty easy to implement too, and less coordination required between CPU and Vid, just a simple memory "swap" clock cycle.
Your videos have kinda everrything: production value (preparing everything needed beforehand, including the cables already ready to be plugged always), educative purposes, crazy shenanigans, it's cool, it's crazy, it's great.
Indeed. I was wondering why he didn't just use the 2's place on the horizontal counter as the clock for the computer part. Since the computer is running at 10 MHz and the video card at 40 MHz, and the horizontal counter is running continuously and its max count (264) is divisible by 2, that pin is running at a perfect 10 MHz already and is also synced with the video card's clock. So, in theory, he could have avoided all that clock sync logic by simply using that pin from the counter as the computer's clock. However, I suppose that the video would have been less edifying and fun without all the clock sync troubleshooting, though. EDIT: Whoops, I made a boo-boo: The video card is actually running at 10 MHz and the computer at 1 MHz. So, no, those won't divide evenly as a power of two, although they do divide evenly in general. So, you could solve this by setting up a little decade counter circuit, or just run the CPU at 1.25 MHz via the 4's place in the horizontal counter (since 264 is also divisible by 4). I would have given the latter a try, assuming there isn't anything particular about the 6502 that requires it to run at exactly 1 MHz. Indeed, according to a quick Google search, the 6502 can run at any clock speed between 1 MHz and 3 MHz, so you could even run it at 2.5 MHz using the same 2's place pin as I had originally suggested, and get a 2.5x boost in processing speed to boot!
I love all your videos. They're so retro. I designed weird video cards in the past and decided I'd need to delay various signals to fix artefact issues with 2 stage FIFOs implemented as a pair of D type flip flops per signal. 5 cycles sounds a bit high of course but then your dot clock and CPU clock are largely mismatched. And anyone who thinks your design is a bit iffy should remember the original IBM mono cards which gave the CPU priority over the video thus giving video dropout when refreshing video RAM at high rates (evidently IBM thought word processors and spreadsheets wouldn't do this much).
Hey Ben! I really love watching your videos, since you go through every detail and most importantly you read data sheets, that can be very tricky to decipher sometimes. I am not supporting you on Patreon or anything, since I am still a student, but I would like to kindly ask you, if you can make one video or more about Op Amps, for instance the non-inverting or integrator and go through some data sheets and tell us how to pick the right resistors wisely and cascade or even use them as Analog Controllers! Nobody is stressing this subject anymore, since we have nowadays all the digital controllers, which take all the fun in building one on our own! :) Maybe just taking that into consideration.
I've been thinking about the timing and the issue we have with memory contention between the CPU and VGA for the first several VGA clock cycles. We could make use of the end of hoerizontal the sync pulse to lower the RDY line on the CPU. That leaves 2.2 CPU cycles before the VGA begins writing to the display from the RAM. That's plenty of time for the CPU to fully relinquish the address/data lines. We may even be able to eliminate the extra complex circuitry we are using to prevent corrupting RAM data. Like we did to generate the sync and blanking signals, we can use SR flip-flops to raise RDY at HCLOCK count 200, and lower RDY at HCLOCK 242, when we also end the sync pulse and begin back porch. After all, that's the whole point of the back porch, so that the monitor/TV circuits had time to settle before the next scan line. I'm still trying to figure out to make use of the horizontal start of back porch timing on the last vertical line. If I instead use start of vertical back porch to desert RDY, we deprive the CPU of 607.2 CPU cycles. I am also troubled about tying RDY with OE on the CPU. The datasheet says that OE is asynchronous, which I interpret to mean the moment you assert OE, CPU is cut off from the bus, even though it may have another clock cycle to process when RDY is deserted. With my above idea to desert RDY early, we can assert OE when we normally did which gives the CPU at least 2 clock cycles to finish up what it was doing. What I am not sure of though is if when RDY is de-serted but OE not asserted, if when the CPU is done it releases WR.
I just recently found your channel and I love your content. It also makes me really appreciate that we used Logisim instead of breadboards when I took computer organization and architecture!
if you put two ram buffers on the graphics card. Buffer A and B. give the CPU 100% time running and let the CPU send a command to the GPU to switch the active graphics ram. Then the CPU could have it's own ram and then with a command to write to the free GPU ram and then when finished the CPU could tell the GPU to swap its ram active GPU ram becomes inactive and inactive GPU ram becomes active.
@@phirenz You could but I think that circuitry would be more complicated than the synchronization circuitry used here. It would defeat the goal of simplification but on the other hand it would make the computer much faster. Maybe some sort of shadow ROM system would work. You could start in low-performance mode, copy the slow ROM to fast RAM, then switch to high performance mode. This would also let you load large programs dynamically by overwriting parts of the burned-in code.
@@renakunisaki Indeed this is why PAL Amiga computers and NTSC Amiga computers had slightly different CPU speeds because everything was tied to the video clock with dividers.
I think I missed a few episode of Primitive Technology.
Hahahahahahahaha omg!
@@user-ug9nn seems like you missed the reference to another youtube channel called "Primitive Technology"... I guess the "dump" is not necessary 😉
@@CAME18471 Ok sorry, I deleted my shitty comment...
He has invented speech at some point apparently :p
The secret is to bang the rocks together.
i really love the "some assembly required" on the box.
Ha, yes! In both senses of the word 'assembly'.
@@ianwyrdness1380x86 and building
@@object-official its not x86, its 6502 assembly
@@object-official bro its almost 100% RAW assembly. About as raw as it gets.
All graphic cards are out of stock.
Ben: Sorry what
I like how his video card costs similarly to some GTX cards
@@techleontius9161 lol
I thought the crazy hype about block-chain mining was over, but I guess Ben might be onto something here...
Ben: Fine. I'll do it myself
@@techleontius9161 The VGA Kit or a Quadro P400. Sorry, Nvidia, my 6502 doesn't support PCI. Yet.
I love how you always solve the problems that appear during the video, rather than just making a video showing the final product. You show the entire process of the thing that you're making. Brilliant video as always!
Not done with the episode yet, but I'm eager to see you running doom on this soon.
World's worst sound card first?
@@sadmac356 Just a DAC
@@sadmac356 just a counter, memory, 8 KHz clock, 8 resistors, a bunch of logic to control it and you're good to go.
How about crysis?
@@jorenheit nah, doom is cooler
he talks like he knows EXACTLY whats going on 100% of the time. a true master, a legend
and explains each step to the last detail
Editing is a wonderful way to do this. Not taking anything away from him, but editing allows him to get his ducks in a row before he adds the sound to his video. I do think this series is great though, as I design fpga's and I do what he's doing in a somewhat sw environment, but seeing it in hw in bread board format really gives a physical visual of what I have to map in my head.
Man speaking full enchanting table
You'll also notice all of his wires are pre-shaped and cut to the perfect lengths. That is because these videos require an absolutely ABSURD amount of planning. And not only pre-planning, but the voice over is added after recording the footage, meaning he can edit out errors and tailor his commentary around whatever unexpected outcomes occur during filming.
43:25 so glad you showed us the comparison in processing time without that extra blanking interval being used or it would have left a big hole in my life 😂
Definitely thinking the same! I was really hoping for it, and it made me very happy that it happened.
Me too ahahahah
Me too! I was getting anxious until he did it. Thank you!
Another way to do the video signal is to put the VGA Hsync and Vsync on the least significant bit's and the rest for the color on the address bus.
The BBC Micro had a cunning strategy of running the memory at twice the speed of the CPU so that the video and CPU accessed the memory on alternate cycles. This allows its CPU to work at full 2 MHz.
The Dragon 32/64 computers certainly did that. I believe the memory access was controlled by the SAM chip so the CPU wasn't directly connected to the RAM.
@Hans J Another fav technique was for the video card to only access memory once or twice every 8 pixels, hence the weird restrictions on number of colours in a small block of screen area.
The Apple ][ had this "cunning strategy" already, 5 years before the BBC Micro was introduced.
8 bit commodores did this as well I think?
Commodore64 works like that, the VIC-II was created from scratch to be the master bus controller it even refreshes the cheaper dram in between cycles.
6510 is only locked out every 8th line when the VIC-II needs to fetch next block of background/foreground color data.
You know that a breadboard is populated when eater doesn't neatly bend his wires
I absolutely love how cleanly he does these. I've been prototyping stuff recently and I'm trying to get them even a quarter as clean as he's doing. And I'm cheating and using an ESP32 so I've got about 1% the complexity of those two boards he's doing....
Yeah. Forget about selling the kits... I’d pay to just have my wires pre-cut to length and bent at perfect 90 degree angles. :)
@@AftercastGames You can! Not bent, but you can buy precut wires for breadboards, I have a box of those. Just search for them on Aliexpress or similar.
I liked how he tried to put his hands over the cables in an intent to make them tidier but then realized that was not possible.
@@DingleFlop when I was doing telecommunications at school it was strictly forbidden to bend like this the cables because the teacher was dumb and hated them even if it makes the breadboard cleaner
I wish i had Ben as teacher
An awesome series, thank you very much!
For anyone interested:
This scheme for only processing in the blanking intervals is what you might call the standard "retro" method for sharing RAM access between CPU and "GPU". Commonly used in early home computers because the implementation is reasonably straightforward and not too costly in parts. As Ben alluded to there are others ways. A few of the more common alternate options to consider:
-Costly: Use dual-ported RAM then the video and CPU can have their own RAM bus and won't clash - great for speed - old-school workstations
-Custom: Give the "video processor" it's own RAM - no clashes and more system RAM but communication is more complicated - eg Ti9918
-Fast RAM: Clock the RAM twice as fast as the CPU and "GPU" and give each access on alternate cycles - eg BBC Micro
Most "classic" micros used either a variant of Ben's approach or one of the schemes I've mentioned. These days as SRAM is cheap and fast if I were smart enough to make a VGA board such as Ben's I'd use the last option and run everything off one crystal for easy synchronisation...
...or if i were interested in something more "retro", especially if hacking colour GFX in to a Z80 system, I'd absolutely use a Ti9918 or one of it's variants.
P.S.
I particularly like using Ti's chips to augment B/W CP/M systems as all you need to do is make a Ti-based GFX board, choose some appropriate ports to accesses it, and run the machine's native output through the Ti chip's built-in mixing feature. The normal output becomes a layer in the Ti chip's output and you can use the Ti chip to add further colour GFX and sprites as you wish - I never understood why a Ti GFX board wasn't an option for many such machines, I have kind-of done the reverse with my COLECO ADAM to give it 80 col CP/M functionality.
The TI chip won't allow you to draw pixels directly though...
It was very common in Arcade machines.
Next couple of videos:
- writing a C compiler for my CPU
- running DOOM
- porting Linux kernel
- intro to quantum computation
Quantum computer on a breadboard :-)
@@ReneSchickbauer A breadboard at nearly 0 Kelvin lol
cc65 should work as a c compiler. A assume a library could be made with functions and resources for this computer.
@@d.6325 the java virtual machine runs on C++ which is based on C, so no, and also, the java virtual machine is unoptimized and slow, relatively
HolyC is all you need.
Through this series, I was initially surprised how relatively uncomplicated it was to get the video card running with the ROM image.
Now I'm even more surprised that having it use the RAM was so much extra complication.
Ben's getting some real Bob Ross vibes in this one
“and here we'll just use a happy little nand gate...”
@@genjii931 there are no such things as bugs, Just happy little circuts
It's not a bug, it's a happy little feature
@@kuhljager2429 Just happy little interferences
I love the "Some assembly required" on the box, makes it sound like there is just a bit of assembly needed, you know some cable here and some cable there...
Some assembly language required.
This phrase reminded me of Portal 2.
maybe some x86
Every time he jiggles the bus jumpers, I panic a little bit...
He uses good quality breadboard, they hold the pins well.
This might be one of the most interesting video series I've ever seen on UA-cam. Hope you'll keep them coming for a long time!
Check out Sabastian Lague as he explores computers. Interesting since he's a programmer. ua-cam.com/video/QZwneRb-zqA/v-deo.html
Nand gates, when they go low we go high.
underrated
I will buy this t-shirt
*YOU*
[QR_CODE_LINKING_TO_SUPPLIER]
*HIGH_IQ*
Address(bool):
push rbp
mov rbp, rsp
mov eax, edi
mov BYTE PTR [rbp-20], al
cmp BYTE PTR [rbp-20], 0
je .L2
mov BYTE PTR [rbp-1], 1
movzx eax, BYTE PTR [rbp-1]
jmp .L1
.L2:
.L1:
pop rbp
ret
*MID_IQ*
bool Address(bool high) {
if (high){
bool flying = true;
return flying;
}
}
*LOW_IQ*
Dope!
@@_c_e_ 😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂😂
you can make a computer with *only* nand gates
25:05 I recognize this pattern. This is what my screen looked like when my video card died. But it was this pattern overlaid on the regular image
My ATI 4850 died that way. Actual video playing but green spots all over the screen.
Alternate title: "How to get two independent computers to share the same set of system resources without fighting over them.
"....Too much..."
nice profile picture
CPU offloading..... Ngpu Vgpu AGPU APU. Offloading is the key.
It's certainly much easier to do with computers than with people.
What I don't get is why he doesn't just remove the CPU clock and use the 10Mhz clock and a counter to clock the CPU.
I love how you in a way arrived at one of the workarounds they used in Sonic the Hedgehog on the Genesis. I think transparency effects in that game were done with some clever palette swapping during the VBI, and on a monitor with a small enough amount of overscan you can see some colored dots towards the bottom of the screen that are framebuffer artifacts of that palette swap. This was the coolest 2-3 hour detour I've ever taken on UA-cam.
I thought the transparency was just dithering 😅
This is such a great series! When you feel done, you should design your own PCB, with this setup, and talk us through some design decisions :) Order it and solder it together! It'd be really cool if you later published those PCB schematics as well!
yeah i think this would make a great computer kit, sort of like the Gigatron.
I would love that. Especially if he walks through the design process (Fusion 360 or similar). Would be cool to see how he'd approach it!
@@xentropian6341 would probably be done in Eagle or Kicad
@@Rx7man I thought Fusion360 has Eagle now built-in? Could be wrong!
@@xentropian6341 I hadn't heard of it, but possibly..
I just say Eagle because his current schematics look like they're done in Eagle
The ending with you using the extra processor time was a really cool visual representation of how much slower your processor runs with that less time. Very cool!
When seeing a 100x64 pixel screen, I think everybody just screems "SNAKE"! :) . Absolutely wonderful to follow this series. Thank you!
I bet it is already fast enough for snake/tetris
@@dan_loup you won't even need timing, when it done drawing, then draw the next move, maybe with some optimization so it only writes to places which change it would be faster, but like this it would be playable
@@jonnypista52 some people have even built minecraft redstone snake machines :)
@@user-me7hx8zf9y well people have built computers that are legitimately stronger than this one using redstone in minecraft
Which is actually really amazing
I can already imagine how it could work. There could be a circular buffer holding the coordinates of each pixel of the snake, and each move the back pixel would be erased and removed and a new front pixel added and drawn. Then it could check for collisions by reading the video buffer back, lol.
After a workday doing stuff in much higher languages, cloud and basically nothing which feels hand crafted anymore, this is so relaxing to watch.
Thank you! I've seen a cable stripper machine built with an Arduino the other day. Now I have an appreciation for why it's a cool thing to have. So many tiny wires with exact lengths.
YES! I'm so excited for this, I just got myself the VGA kit!
Haha was thinking of getting it too!
@@ReidCaptain quick word of advice for the coilgun: a high current relay might be good for a power switch, but I'm not sure.
The best part of my IT graduation is that I can watch and enjoy this master piece of a video. Amazing work, keep it up!
once video card is done, he should build a soundcard next
The via chip he uses for the lcd has a square wave output
There have been a lot of sound card designs based on R2R networks connected to a parallel port. That would be an easy hack to control. Although timing would become difficult.
An autonomous sound card that works similar to the videocard would be relatively easy as it would be the same as this videocard but with a clock at 10kHz and without all the pixel counting. The output stage would be very similar and it should read only a single byte of memory. Maybe set a flag in memory that the sample has been read. A 'sample and hold'-circuit will set and keep the poormans DAC at a value for the length of a sample.
Feasibility: doable.
@@ReneKnuvers74rk that’s a lot of hardware overhead for nothing because the cpu still has to keep that memory location populated and you somehow have to time it. You simply need a timer periodically interrupt the cpu 8000 times per second (or whatever sample rate you want) and the cpu writes the next sound byte to a parallel port and you use a resistor ladder to drive an audio amp. Easy.
Build an RTR network mapped to an output port. With a D2A converter you can synthesise multi part audio in software. I did something very similar on my TRS-80 many years ago based on a design from my father. Granted the Z80 was running at 1.77MHz but the original implementation was done on an 8080 running around 1MHz so it should be totally doable on a 6502 with this design. As long as the processor isn’t paused so often :-)
I did sound card on ATtiny 85 and stm32 ua-cam.com/video/vfcCpQyBtAc/v-deo.html
Hi Ben, this is an interesting series, as I learned 6502 assembler on an Apple ][+ way back in ‘78/‘79, so the 6502 has a special place in my heart. Some alternate strategies for this:
1) use a dedicated “video/CRT-controller” chip to do the heavy lifting (ex: the Vic II (Commodore Vic 20/C64), TMS9918 (TI 99/4A), Propellor (PE6502 kit), PPU (Nintendo NES), or
2) interleaved frames so only every other line gets drawn, giving the 6502 more processing time.) (used by the Gigatron)
3) a separate RAM chip that shares the same address bus, but it’s data bus is used solely by the video circuitry. This would require some sort of video synchronization buffer that would take write requests from the 6502 in the range $2000-$3FFF and stuff the data into a FIFO buffer, then - in the time interval currently used by the current design - the bytes would be taken out of the FIFO buffer and stuffed into the video RAM while the video circuitry isn’t drawing anything (end of each horizontal line.) This way, the 6502 can) run at full speed; a problem with the current design as it’s questionable what would happen if an interrupt (NMI or IRQ) were to happen while DMA-bar was asserted, halting the 6502.
4) bite the bullet and use dynamic RAM instead of static RAM; then the video counters could be used to generate the RAS/CAS lines needed by dynamic RAM, and you could interleave memory access between the 6502 (clock phase 0), and the dynamic RAM refresh/video circuitry (clock phase 1).
On a related note, you could use a 74LS90 decade counter to divide the video clock by 10 to get the CPU clock! This would eliminate the 1 MHz crystal oscillator, and synchronize the two clock signals.
This is extraordinarily good content, both entertaining and informative. There’s no equivalent out there. Thank you for taking the time to do this.
Ben: Insightful process demonstration on creating a computer-controlled graphics device from components
Army of commenters: D O O M
First Doom, then Crysis
How about RC on reset? charging capacitor holds reset low long enough after power is applied. Pressing reset button isn't difficult, I find the RC reset more elegant.
43:00 I am glad you switched the configuration to show the cleaner but slower processing method. I was really wanting to see that.
Fantastic video series, thank you.
Please consider using the VIA timer for a buzzer or something. This absolute unit is ready for a videogame.
I can't wait for "World's worst video card gets raytracing support"
"World's worst video card surpasses all other video cards"
Ben: and you see now that the reflections are kind of slow, but if I move this jumper over to the output of the RTX enabled NAND gate...
Ascii ray tracing is a thing.
Dude don't go that high yet, I'm gonna be blown out if he can make a "smooth" 12fps animation @640x480p with this kind of thing
If he adds raytracing support I'm buying this for my pc
You have secured yourself a seat in the doomsday bunker. If there's an apocalyptical event and humanity needs to restart with a handful of people that have in-depth knowledge about everyday things, you sir are needed!
Ben... I started out my career in Electronics and Engineering building a lot of circuits like you demonstrate here... a lot of the time just for my own learning, so I'm very familiar with how most of this works that you're doing. But, the way you present this information makes it so interesting to watch even when I know what you're doing and how you're doing it, it's captivating the way you present it. Thank you for making these videos... brings back so many memories. I may even get one of your kits just to play around with and remind myself how much fun it is to build something so rudimentary and see it work.
Your videos are always inspiring, Ben! I am really impressed about how you make it simple to comprehend the very inner concepts of what happens inside a modern computer. I really love your linking from a logic diagram to the physical logical chips in the breadboards. Congratulations!
It's amazing seeing the issues you ran into building this and realizing how much work went into the computer I'm typing this comment on.
Also really cool seeing the CPU bottleneck here and an explanation of how/why that happens.
Nice channel description
This is awesome Ben! as a embedded system developer, I am amazed with what you achieved! Please program pong in it :)
I am glad you took the challenge to connect the projects. Very wonderful to see you solve the issues
This man troubleshoots his invigilator during exams
Thanks Ben. Your videos on building an 8 bit pc were really helpful in diving into understanding how a computer functions from the ground up.
This is another great video that is sure to have inspired many others to learn!
Pressing play on this video invoked the same feeling as opening a Christmas present when I was 8 years old
I was only generally interested in this, but it proved to be very informative, explaining a lot of things I knew about from my old computers, but not the express reasons.
There's obviously a lot that can be done to improve it, but better people than me have already done the hard work! ;)
I didnt think you could instantly silence a 6502 like that Ben, the c64 has a bunch of logic around it (for sprite DMA that occurs on the first half of the cycle, and also reading the character pointers) because the 6502 will only pause on the next *read* cycle.... if it is writing, it will continue. In fact, the writes may be 1-3 cycles, depending on the instruction that is completing, which would kinda match what you're seeing on the left hand side of the screen?
Also, might be easier to divide down the video clock to run the CPU???
Awesome series man, loving it.
BROKE: getting a widescreen monitor
WOKE: chopping off the bottom 11 pixel to make your aspectratio wide
WOKE: chopping off the bottom 11 pixel to make your *black pixels matter*
What is a woke? Woke up?
@@_c_e_ sh
@Abstractism my tablet's gpu 24/7 be like
@@donosudono1597 oh the good days before everyone was using woke like a bad word
In 20 years in the future
How to build a gaming pc from eprom chips
FPGAs are now affordable to any hobbyist.. next: cheap ASICs, you just "order" 100x faster clocked ASIC of your design for $50 (still expensive per chip, but incredibly cheap per chip also.. paradox..) Then 10 years later you can print the ASIC at home with Samsung Print-A-Chip that costs $220 .. that'll be cool, and I'll be dead by then but at least someone will have fun...
@@n00blamer wait, you can get ASICs that inexpensively? From which company?
@@jamesparker8529 We were just having thought-play what it'll be like 20-30 years from now... ASIC is more like 100 grands and up.. and if you need more than 1 round, well, better have deep pockets.. cya in Rev.B, mate..
@@n00blamer ah, I thought you were saying that you could get custom asics at that price now.
Old video cards always struggled with full memory re-writes. That's why they used things like sprites, tiles, and palette effects. You should add in a colour palette then do some fun animations with colour cycling.
I have been watching for years now and i think i finally need to get one of these amazing kits this christmas!
Thanks! Love the content! I'd love to see a follow-up video that updates the output protocol from VGA to DVI, just to show the evolution of electronic standards. Might be annoyingly difficult, but then again, so is building a computer and video card using breadboards!
my guess is it will have much faster timings than 6502
I think Ben is just short for "beding all these cables".
Nice video!
AMD showing their smart memory access in 2020 while this 6502 supports direct memory access
Ik one is gpu to cpu vs cpu to gpu
The output at 25:03 is such an aesthetic
would love to have a high resolution screenshot of it, but then I remembered we're working with this breadplate pc
Thank you for this interesting and enjoyable series, much appreciated.
If you happen to develop this theme further might I suggest a version where the RAM is driven twice as fast as the VGA logic and CPU, the two synchronised to the same clock? CPU and VGA can then alternate access to RAM so simplifying the logic and allowing the CPU to run at full speed...
-Current design a method for sharing access where RAM/ROM is slow (typical of more basic retro systems)
-Suggested scheme being one method to simplify / gain efficiency where RAM is fast enough (BBC Micro an example)
-It might then be a "fun" jumping-off point for what to do if RAM is fast enough but ROM isn't
Thanks again.
After watching his complete video without skipping, I feel like I have grown new brain cells 😂
Wait thats illegal
@@dan2800 wait thats an outdated meme
and it doesnt even fit, good job fam
I think you are always "growing" them. They die and reproduce all the time.
@@Gamer-uf1kl Actually neurons don't reproduce.
However you can always create new synapses, which are the connections between neurons and most likely where all the magic happens.
@@sin42170 bs check it out, things have evolved
I would love to see the "game of life" on here.
The required double-buffering might be a bit tricky to implement, though.
Conway would weep.
@@Roxor128 You can do it without double buffering. Back in the 80's, I wrote a quite efficient version in Motorola 68000 assembly that avoided the need for double buffering by only redrawing the cells that had changed.
I could listen to him for hours, and every time an episode ends I panic and want more ;)
same
Seeing this system go from "ultra basic" to "dynamically drawing onto a screen" has been quite a journey! It really makes me feel like I'm in the pioneering age of computers again.
Could using the “back porch” signal for getting control of the bus rather than using the vertical blanking signal be a better way of dealing with the artifacting at the start of each scan line, or would that be too impractical?
Yeah that is what I was thinking.
Seems like you could divide the graphics clock down to drive the CPU. That way you can decode the pixel counter and halt the CPU when the graphics card is about to grab the bus.
@@josugambee3701 Would it be appropriate then to call this a CPU with integrated video card, or rather a video card with integrated CPU?
@@cezarydudek6156 It becomes one system with integrated CPU and graphics card.
@@cezarydudek6156 2020: integrated graphics card
2030: integrated CPU
Love the project! Just watched from start to here, I feel like this is a better format to learn basics than any school lol, I appreciate the recapping of everything I needed it. Keep up the good work!
Ben: what kind of keyboard are you using? Sounds like a good programmer keyboard.
It sounds a lot like an IBM Model M, but it could be a keyboard with blue switches. I'm sure someone more knowledgeable than me about mechanical keyboards could tell you exactly what it is
I have a Model M replica, but this doesn't sound like a Model M. The sound is too high and clicky
It definitely sounds like a keyboard with blue switches. I find browns a bit nicer for typing, but that's mostly personal preference.
I think it's definitely an IBM Model M. I have an original Model M from 1987 (gray badge) and it sounds EXACTLY like his in the video.
42:57 If the CPU is halted 70% of the time, you'd be getting 30% efficiency, not 70%, right?
man built an entire computer, he's tired so he stumbled on his words
70% inefficiency.
@@tonysofla that
Ben must have seen the stock on other graphics cards, pooped himself, then proceeded to make his own. Neatly.
I love that you’re sharing this skill set that will too easily become a lost art. I particularly like how you work through the problem solving, showing the problem, proposing a solution and testing. These skills are so vital even in today’s modern development teams. Thanks for your efforts!
Well, that was one hell of a hack. Even the wires got messy.
Well worth the watch. Diagnostic section in particular. Thank you
the next upgrade would be to make the video memory separate. Still part of the address bus, but separate, so that execution can keep going inside the frame, even if it's not display instruction
This blows my mind. So awesome. I’ve learned so much from your videos, and every time I re watch I learn more.
Could you ever run basic on this, and output a
Commodore 64 style user interface?
Hi Ben! Greetings from Germany! I just want to say thank you for your high quality content! I'm a cs student from TU Dresden. The courses are generally pretty good, but nothing compared to the kind of videos you make. So thanks! :)
A CS student who voluntarily exposes his identity on the internet. Maybe change your field into Applied Arts and develop the next Fontus, why don't you?
@@Anvilshock thank you for your good proposal. I definitely going to think about it ;)
finally a normal commenter
@@user-ld7vl9sk4s me
I absolutely love this video series. I find It is so easy to follow your electronic explanations but I fall behind a bit with the software side, I understand eventually but I find "8-Bit Show And Tell" easier to understand which I think is due to the pace rather that the different architecture. But I still love your work. Thumbs up.
That comb effect is common, when you write Atari 2600 games, that do just a little too much, per scanline.
The most well-known game with that artifact, is Atari's own Pac Man.
Good point! It's odd no-one else brought that up.
@@eekee6034 one year late
@@Yehor-v7y And you're 2 years late, according to UA-cam, today. Let's make a late replies club! 😆
@@eekee6034 nah lets make it later
@@Yehor-v7y Yeah, later XD
Absolutely loving these series. Getting the video bit I'd not of thought how to do so, whereas I'd probably of used a different approach using 2 banks of RAM memory mapped to a byte for controlling what bank is to be written to, or made a DMA circuit as you did and add to the circuit a quick way to mirror the current memory into the current bank as a kinda local cache (Kinda how oldskool VGA used to with the bank flipping and bank scrolling modes with their onboard RAM mirroring system RAM at location 0x0000000Ah of the main memory map).
.
Also in theory, your VGA+CPU could be combined as one GPU processing unit to allow an independent CPU to do more independent processing, i.e. fill GPU RAM banks, then recall individual banks when needed thus leaving the main CPU to not need to do all the rendering.
Can't wait to see where you take this next :)
Fantastically explained! Loved the step by step discussion of how how to investigate and solve the problems.
What about having isolated VRAM and using 74157 to select what address/control signals are going in? That would solve the problem.
That is of course a better approach and closer to what modern video cards are doing. But I think Ben here is trying to make something that is similar to early computers and is as simple as possible.
@@aydna3317 As modern as a Commodore PET... 😁
@@retroand Doesn't he mention this possibility in the previous video?
@@toto123456ish Maybe, but has he used the approach Commodore and many, many other manufacturers 40+ years ago did?
I think it would be great to see the 6502 syncing with that circuit without flaws. He has already done the most challenging part which is the video system itself. For this reason I still don't understand why wouldn't he improve the interface just a little more. It could also be useful as an example of shared memory.
@lass kinn The contest was lost before he started building this. Later PETs can destroy the monitor (killer poke) and I heard the Sinclair QL video system can be destroyed by just unplugging the video connector while the computer is running (I have a couple of them but don't prettend I'm going to try 😁). So, nothing worse than those.
His series about the video circuit are inspiring, it's just I feel this could be improved greatly without being that expensive on the component side.
As a remark, this can't be called a GPU (too primitive). Video system (or subsystem) is a better term.
Awesome!! Tnx. I built an house computer 1990-ish with an 8 bit microcontroller for controlling temperatures in a house. This have been an great memory trip back in time. Back then we wrote all code direct as assembler code but it worked.
something interesting you could try, is having a system similar to the c64 where every clock cycle the video ram and cpu take it in turns to read or write to ram, so the clock would be 20 mhz and the video and cpu would be 10 mhz
The VIC chip uses the other half of the 1MHz clock.
@@ownpj FYI the C64's base clock is 2MHz
@@SkyCharger001 I disagree.
The c64 has a 14.32Mhz crystal (17.73 for PAL) that is divided by the 8701 chip into a 8.18Mhz (7.88 for PAL) which gets fed into the VIC-II chip on pin 22. This is often called the Dot Clock or Pixel Clock. The VIC-II chip then divides this by 8 to provide a 1.02Mhz signal (0.98 for PAL) from pin 17 to the rest of the system. This 1MHz signal is the ø2 clock the processor and I/O chips run from.
The 1Mhz clock signal ratio is 50:50, in that it is 5volts half the time and 0volts the other half. A complete transition from High-Low-High is 1Mhz. Fortunately, the VIC-II chip is designed to use the half of the cycle that the 6510 (6502) can not use. So the c64 as a whole can do twice the "work" per 1Mhz clock cycle, because there are two chips alternating with the two halves of the clock signal.
You could point at the RAM (or even the address & data buses) in the c64 can call them Double Data Rate (DDR) as they're capable of being accessed twice per clock cycle, once by the VIC-II and once by the 6510. This, however, does not make it a 2Mhz machine. The 6510 can still only run at 1MHz.
@@ownpj The VIC-II is capable of using both phases when it needs to (and it does once per row under normal operations), which would be impossible were the base clock truly at 1MHz
Yes, The VIC-II can use both the high and low phases of the 1Mhz clock. The 6510 processor and all the I/O chips are still 1MHz clocked devices.
Every clock signal has two phases, not all systems utilize both phases. Using both phases doesn't mean the clock is magically twice as fast, but twice as efficient.
Every time you post a video there's a little bit of joy that bubbles up in me. As ever - great video. The waiting time between each is really worth it. I wonder if you will ever couple this to your 8-bit breadboard computer.
To fix the visual issues and improve performance, could you have two display buffers, have one you're displaying and another you're updating, and switch between these buffers at the end of the display cycle?
Exactly what I was thinking, would actually be pretty easy to implement too, and less coordination required between CPU and Vid, just a simple memory "swap" clock cycle.
Your videos have kinda everrything: production value (preparing everything needed beforehand, including the cables already ready to be plugged always), educative purposes, crazy shenanigans, it's cool, it's crazy, it's great.
Now I know why old computers never used separate clocks for the video and the CPU. It's a quick way to make small problems that are hard to solve.
Indeed. I was wondering why he didn't just use the 2's place on the horizontal counter as the clock for the computer part. Since the computer is running at 10 MHz and the video card at 40 MHz, and the horizontal counter is running continuously and its max count (264) is divisible by 2, that pin is running at a perfect 10 MHz already and is also synced with the video card's clock. So, in theory, he could have avoided all that clock sync logic by simply using that pin from the counter as the computer's clock.
However, I suppose that the video would have been less edifying and fun without all the clock sync troubleshooting, though.
EDIT: Whoops, I made a boo-boo: The video card is actually running at 10 MHz and the computer at 1 MHz. So, no, those won't divide evenly as a power of two, although they do divide evenly in general. So, you could solve this by setting up a little decade counter circuit, or just run the CPU at 1.25 MHz via the 4's place in the horizontal counter (since 264 is also divisible by 4). I would have given the latter a try, assuming there isn't anything particular about the 6502 that requires it to run at exactly 1 MHz. Indeed, according to a quick Google search, the 6502 can run at any clock speed between 1 MHz and 3 MHz, so you could even run it at 2.5 MHz using the same 2's place pin as I had originally suggested, and get a 2.5x boost in processing speed to boot!
Thank you so much for making a kit for this! I love technology that has old graphics!
When you invert the clock signal, why not use the phase 1 out clock pin on the 6502?
The 1MHz oscillator can also has an inverted pin on its opposite corner
@@krallja That pin is nc. At least on the ones I have.
I love all your videos. They're so retro. I designed weird video cards in the past and decided I'd need to delay various signals to fix artefact issues with 2 stage FIFOs implemented as a pair of D type flip flops per signal. 5 cycles sounds a bit high of course but then your dot clock and CPU clock are largely mismatched. And anyone who thinks your design is a bit iffy should remember the original IBM mono cards which gave the CPU priority over the video thus giving video dropout when refreshing video RAM at high rates (evidently IBM thought word processors and spreadsheets wouldn't do this much).
Listening to you makes me believe I actually understand what's going on here.
Hey Ben! I really love watching your videos, since you go through every detail and most importantly you read data sheets, that can be very tricky to decipher sometimes. I am not supporting you on Patreon or anything, since I am still a student, but I would like to kindly ask you, if you can make one video or more about Op Amps, for instance the non-inverting or integrator and go through some data sheets and tell us how to pick the right resistors wisely and cascade or even use them as Analog Controllers!
Nobody is stressing this subject anymore, since we have nowadays all the digital controllers, which take all the fun in building one on our own! :) Maybe just taking that into consideration.
Already know this is gonna be fire
I've been thinking about the timing and the issue we have with memory contention between the CPU and VGA for the first several VGA clock cycles. We could make use of the end of hoerizontal the sync pulse to lower the RDY line on the CPU. That leaves 2.2 CPU cycles before the VGA begins writing to the display from the RAM. That's plenty of time for the CPU to fully relinquish the address/data lines. We may even be able to eliminate the extra complex circuitry we are using to prevent corrupting RAM data.
Like we did to generate the sync and blanking signals, we can use SR flip-flops to raise RDY at HCLOCK count 200, and lower RDY at HCLOCK 242, when we also end the sync pulse and begin back porch. After all, that's the whole point of the back porch, so that the monitor/TV circuits had time to settle before the next scan line.
I'm still trying to figure out to make use of the horizontal start of back porch timing on the last vertical line. If I instead use start of vertical back porch to desert RDY, we deprive the CPU of 607.2 CPU cycles.
I am also troubled about tying RDY with OE on the CPU. The datasheet says that OE is asynchronous, which I interpret to mean the moment you assert OE, CPU is cut off from the bus, even though it may have another clock cycle to process when RDY is deserted.
With my above idea to desert RDY early, we can assert OE when we normally did which gives the CPU at least 2 clock cycles to finish up what it was doing. What I am not sure of though is if when RDY is de-serted but OE not asserted, if when the CPU is done it releases WR.
95% of this is going over my head but it’s still so damn cool.
I just recently found your channel and I love your content. It also makes me really appreciate that we used Logisim instead of breadboards when I took computer organization and architecture!
make it render the Mandelbrot set.... needs to happen :D
Love this video stuff, thanks for the nice descriptive tour! Hmmm, I don’t see enough decoupling capacitors though; there should be one at every chip.
I've been checking your channel so much recently to see when this video comes out, and it's finally here!!!
if you put two ram buffers on the graphics card. Buffer A and B. give the CPU 100% time running and let the CPU send a command to the GPU to switch the active graphics ram. Then the CPU could have it's own ram and then with a command to write to the free GPU ram and then when finished the CPU could tell the GPU to swap its ram active GPU ram becomes inactive and inactive GPU ram becomes active.
I guess it's confusion time for me
Loving this series!
Please add dedicated video memory and buffer it in so the cpu and vpu can work (mostly) simultaneously
covid 19: *starts*
ben: “time to build a computer and graphics card from scratch”
I've always wanted to understand in depth how these things work, thank you for giving us that. Greetings from Brazil
Wondering if the synchronization logic could be removed if you ran the CPU and Video off the same 10mhz clock
Yes it could be removed then. The problem is I don't think the code EEPROM is fast enough for that.
You can work around this with a circuit that pulls RDY low and pauses the 65c02 for a few cycles whenever the ROM is selected for reading.
@@phirenz You could but I think that circuitry would be more complicated than the synchronization circuitry used here. It would defeat the goal of simplification but on the other hand it would make the computer much faster.
Maybe some sort of shadow ROM system would work. You could start in low-performance mode, copy the slow ROM to fast RAM, then switch to high performance mode. This would also let you load large programs dynamically by overwriting parts of the burned-in code.
Or use a clock divider...
@@renakunisaki Indeed this is why PAL Amiga computers and NTSC Amiga computers had slightly different CPU speeds because everything was tied to the video clock with dividers.
You could add an extra bit to Red and Green while keeping the blue on 2 bits ;)
I am waiting for the first demoscene release for this hardware.