Excuse my ignorance but I was initially confused why Line 88 sets IM2 then at 04:10 there is no explanation of how using the 'four registers' to set the 'Interrupt mode' works. Is this an alternative use of the DR/DDR registers or just another way of presenting them? I assume they aren't changing how the CPU responds to interrupts but are just setting the conditions for when an I/O port creates an interrupt. Does changing the I/O-IM apply to the whole port or can you set a different mode for each of the 8 pins? (btw - the commentary talks of 7 bits instead of 8.) As a result, the comment on line 163 doesn't seem to make sense. (and it apparently covers another unexplained function/purpose). Line 154 claims to only affect 1 pin then Line 155 lists them both :D Although you only discuss the PC0 interrupt handler, the code contains an isr for each of the two input pins. How does the CPU know which one to use until start_GPIO_interrupts is executed? Should interrupts remain disabled until these vectors have been assigned? setup_GPIO_ports, disables interrupts while it configures the port but since no handlers have been defined at this point, is that strictly necessary or will the CPU just ignore any spurious interrupts? Line 248 sets 'a' to acknowledge two interrupts even though only one may have occurred. Is that intended? I've also just realised that you are using the 'in0' & 'out0' instructions. Forgive me if you've mentioned this elsewhere but what is the significance of the 0 suffix? Thanks for another helpful video. Sorry if my comments seem pedantic but asking is easier than setting up my own test hardware and your answers could help someone other than me.
Hey Mike, thanks for the detailed feedback. You spotted some great errors in my very quickly produced video, and I will try to clarify anything else, to the best of my newly acquired knowledge. Q) Excuse my ignorance but I was initially confused why Line 88 sets IM2 A) In order to do vectored interrupts, we must be in IM2. The Agon should be in IM2 normally, but just in the unlikely case a previous program changed it, we set it to make sure. Does no harm. Q) then at 04:10 there is no explanation of how using the 'four registers' to set the 'Interrupt mode' works. Is this an alternative use of the DR/DDR registers or just another way of presenting them? I assume they aren't changing how the CPU responds to interrupts but are just setting the conditions for when an I/O port creates an interrupt. Does changing the I/O-IM apply to the whole port or can you set a different mode for each of the 8 pins? A) maybe a conflict of using IM2 (interrupt 'mode' 2, which is universal across the machine) and the use of the word 'mode' for the operation of each io port, which has 9 different 'modes'. The chart at 4:30 gives an summary of the 9 gpio port modes of operation, but there is a big section in the ez80 spec sheet which goes into much more detail on each mode, so have a read through to see if it aligns with what the code is doing, or if there is another mode you might use for your purpose. I have put a copy on my github. Q) btw - the commentary talks of 7 bits instead of 8. A) Voiceover error! Q) As a result, the comment on line 163 doesn't seem to make sense. (and it apparently covers another unexplained function/purpose). Line 154 claims to only affect 1 pin then Line 155 lists them both :D A) typos. Fixed. At first I was only going to do 1 gpio pin, but later changed it to do 2. Q) Although you only discuss the PC0 interrupt handler, the code contains an isr for each of the two input pins. A) They are both almost identical, so I only talked through one of them. The video was getting too long as it was! Q) How does the CPU know which one to use until start_GPIO_interrupts is executed? Should interrupts remain disabled until these vectors have been assigned? A) If a vector hasn't been assigned it won't go anywhere I believe. However, the time between them being set and the vector being defined is just a few milliseconds, so the chance of us changing the pins in that time is slim. However, maybe it would be good practice to keep interrupts disabled until all config is completed. Q) setup_GPIO_ports, disables interrupts while it configures the port but since no handlers have been defined at this point, is that strictly necessary or will the CPU just ignore any spurious interrupts? A) there are other system interrupts (eg, from vdp), not just ours which may happen. I thought it safe to stop those while defining them. Q) Line 248 sets 'a' to acknowledge two interrupts even though only one may have occurred. Is that intended? A) yes, when I tried to set only the one we had an interrupt on, I found it didn't always work, so made sure and set both. That seems to work with all 6 io pins for the joystick too. Q) I've also just realised that you are using the 'in0' & 'out0' instructions. Forgive me if you've mentioned this elsewhere but what is the significance of the 0 suffix? A) This is the command which is used to read or write from our port registers. The A register is placed on the lower byte of the address bus, while the High byte of the address bus, is forced to 0. See the ez80 User Guide for details of all op code commands. Again, I have put a copy of that on my github.
Excuse my ignorance but I was initially confused why Line 88 sets IM2 then at 04:10 there is no explanation of how using the 'four registers' to set the 'Interrupt mode' works. Is this an alternative use of the DR/DDR registers or just another way of presenting them? I assume they aren't changing how the CPU responds to interrupts but are just setting the conditions for when an I/O port creates an interrupt. Does changing the I/O-IM apply to the whole port or can you set a different mode for each of the 8 pins? (btw - the commentary talks of 7 bits instead of 8.)
As a result, the comment on line 163 doesn't seem to make sense. (and it apparently covers another unexplained function/purpose).
Line 154 claims to only affect 1 pin then Line 155 lists them both :D
Although you only discuss the PC0 interrupt handler, the code contains an isr for each of the two input pins. How does the CPU know which one to use until start_GPIO_interrupts is executed? Should interrupts remain disabled until these vectors have been assigned?
setup_GPIO_ports, disables interrupts while it configures the port but since no handlers have been defined at this point, is that strictly necessary or will the CPU just ignore any spurious interrupts?
Line 248 sets 'a' to acknowledge two interrupts even though only one may have occurred. Is that intended?
I've also just realised that you are using the 'in0' & 'out0' instructions. Forgive me if you've mentioned this elsewhere but what is the significance of the 0 suffix?
Thanks for another helpful video. Sorry if my comments seem pedantic but asking is easier than setting up my own test hardware and your answers could help someone other than me.
Hey Mike, thanks for the detailed feedback. You spotted some great errors in my very quickly produced video, and I will try to clarify anything else, to the best of my newly acquired knowledge.
Q) Excuse my ignorance but I was initially confused why Line 88 sets IM2
A) In order to do vectored interrupts, we must be in IM2. The Agon should be in IM2 normally, but just in the unlikely case a previous program changed it, we set it to make sure. Does no harm.
Q) then at 04:10 there is no explanation of how using the 'four registers' to set the 'Interrupt mode' works. Is this an alternative use of the DR/DDR registers or just another way of presenting them? I assume they aren't changing how the CPU responds to interrupts but are just setting the conditions for when an I/O port creates an interrupt. Does changing the I/O-IM apply to the whole port or can you set a different mode for each of the 8 pins?
A) maybe a conflict of using IM2 (interrupt 'mode' 2, which is universal across the machine) and the use of the word 'mode' for the operation of each io port, which has 9 different 'modes'.
The chart at 4:30 gives an summary of the 9 gpio port modes of operation, but there is a big section in the ez80 spec sheet which goes into much more detail on each mode, so have a read through to see if it aligns with what the code is doing, or if there is another mode you might use for your purpose. I have put a copy on my github.
Q) btw - the commentary talks of 7 bits instead of 8.
A) Voiceover error!
Q) As a result, the comment on line 163 doesn't seem to make sense. (and it apparently covers another unexplained function/purpose). Line 154 claims to only affect 1 pin then Line 155 lists them both :D
A) typos. Fixed. At first I was only going to do 1 gpio pin, but later changed it to do 2.
Q) Although you only discuss the PC0 interrupt handler, the code contains an isr for each of the two input pins.
A) They are both almost identical, so I only talked through one of them. The video was getting too long as it was!
Q) How does the CPU know which one to use until start_GPIO_interrupts is executed? Should interrupts remain disabled until these vectors have been assigned?
A) If a vector hasn't been assigned it won't go anywhere I believe. However, the time between them being set and the vector being defined is just a few milliseconds, so the chance of us changing the pins in that time is slim. However, maybe it would be good practice to keep interrupts disabled until all config is completed.
Q) setup_GPIO_ports, disables interrupts while it configures the port but since no handlers have been defined at this point, is that strictly necessary or will the CPU just ignore any spurious interrupts?
A) there are other system interrupts (eg, from vdp), not just ours which may happen. I thought it safe to stop those while defining them.
Q) Line 248 sets 'a' to acknowledge two interrupts even though only one may have occurred. Is that intended?
A) yes, when I tried to set only the one we had an interrupt on, I found it didn't always work, so made sure and set both. That seems to work with all 6 io pins for the joystick too.
Q) I've also just realised that you are using the 'in0' & 'out0' instructions. Forgive me if you've mentioned this elsewhere but what is the significance of the 0 suffix?
A) This is the command which is used to read or write from our port registers. The A register is placed on the lower byte of the address bus, while the High byte of the address bus, is forced to 0. See the ez80 User Guide for details of all op code commands. Again, I have put a copy of that on my github.
@ Thanks for such a quick and comprehensive reply. I’ll check the docs when I get a chance.