Thank you so much, you are a lifesaver. My professor decide to do last minute exam about this JK flip flop timing and I stumble upon this vid and it helped me so much.
Ok thank you so much! Just to clarify sorry for so many questions I just really want to make sure I’m on the right track xD If the synchronous reset is active on the rising edge of the clock does the Q pin go immediately low?
wtf dude u fucking serious i am literally like an idiot wasting 8 hour studying on these still cant understand, and you use 6 minutes to let me understand, fucking god lifesavier, i wish you can acheieve everything u want to in ur life, love from malaysia
@Joe Haas .. I"M I the only one who noticed the mistake with the second example? or please correct me if i"m wrong. With the active low, our output will be activated when the input is "0" . But he went on seting and resenting, using the active high format. Please correct me if i"m wrong, but i"m pretty sure he made a mistake there.
Thanks so much for the comment. I am pretty sure that I did the second example correct. With the active low, I am setting or resetting when the clock goes edge goes from 1 to 0.
Clk yazan clock yerinin önünde yuvarlak top varsa negatif edge demek aşağıya doğru olan 1 den 0 a gidenler. Ama yoksa top falan yukarı doğru giden 0 dan bire bakıyorsun
@Acss47 bahsedeyim ama pek bi bilgim yok açıkçası eğer üniversitede ve benim gibi digital dersinde görüyorsan bunları zaten senkron olarak görüyosun hep asenkron bize göstermediler maalesef
I've been wasting my time reading about it for days and you just explained so beautifully in 6 minutes. thanks so much Joe!
Thanks so much for the comment! Glad to help!
right! This video is very very helpful. I understand how it work immediately after watching this video. Thanks
Thank you so fucking much. Best video on this site. No bs, just exactly what I needed
video just saved me 30 min of reading a slideshow, thanks m8!
Glad to help!
Basically taught me in a few minutes what its taken my lecturer 5 lessons to attempt to explain!! 🎉
Thanks so much for the nice comment!
Thank you so much, you are a lifesaver. My professor decide to do last minute exam about this JK flip flop timing and I stumble upon this vid and it helped me so much.
Thanks so much - glad to help!
This video is the best, I wish he spoke Spanish, but it doesn't matter.
Greetings from Peru
Thanks so much!
omg tq so much. i just completed a whole chap from your 6 minute video .
Thanks so much for watching!
Thanks sir, this video help me so much
Thanks a lot champ
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very helpful, thank you
great video!
Thanks so much!
Te iubesc, mersi
Esti bine venit. Mulțumesc!
Thank youuuuuuu. omg
You are welcome! Thanks for the comment!
Thank you ❤
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excellent - so glad it helped!!
nice work 🙌
Blessed be, a good explanation 🙏
Thanks!
Thanks so much!
you could be the only one on youtube that could explain that
Thanks so much for the nice comment!
Thank you 🙏🏼🙏🏼🙏🏼
Thank you for this
glad it helped!
you explained in 6 minutes what my lecturer couldnt in 30 slides
Thanks so much for the great comment!
This is positive
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Thanks so much for watching!
If I had educators like this, maybe i wouldn't be so garbage and stupid at electrical engineering
Thanks for watching.
Hi! What about if reset is synchronous?
A synchronous reset would "reset" the flip-flop on the next clock pulse.
So if it is deasserted at the rising edge of a clock it won’t take immediate effect on the Q pin until the next rising edge?
yes - synchronous inputs will only change the output Q on a rising edge (assuming positive edge triggered flip-flop)
Ok thank you so much! Just to clarify sorry for so many questions I just really want to make sure I’m on the right track xD If the synchronous reset is active on the rising edge of the clock does the Q pin go immediately low?
yes - the synchronous reset will make Q go low on the rising edge of the clock (assuming positive edge triggered clock)
wtf dude u fucking serious i am literally like an idiot wasting 8 hour studying on these still cant understand, and you use 6 minutes to let me understand, fucking god lifesavier, i wish you can acheieve everything u want to in ur life, love from malaysia
Thanks so much for the great comment!
This video was created to save my life from the digital class.
Thanks so much!
**positive edge triggered JK master slave flip flop with preset and clr and thankss
THANK YOU!!
Thank you 🙏🏼🙏🏼🙏🏼
Glad it helped!
Thanks man all the best
Awesome thank you!💕💥💥💥💥
Thanks so much!
@Joe Haas .. I"M I the only one who noticed the mistake with the second example? or please correct me if i"m wrong.
With the active low, our output will be activated when the input is "0" . But he went on seting and resenting, using the active high format. Please correct me if i"m wrong, but i"m pretty sure he made a mistake there.
Thanks so much for the comment. I am pretty sure that I did the second example correct. With the active low, I am setting or resetting when the clock goes edge goes from 1 to 0.
@@joehaas0 Ok thank you for the review. i will watch it again. Theres something i should be missing.
Keep going sir
So what's the difference between 'Active hi' & 'Active lo' if they both toggle switch @ J=1; K=1 & memory only @ J=0; K=0?
for anyone who needs this, it just clock triggers when the clock signal goes to '0', instead of the active high that goes to '1' @4:30
there is maybe a mistake in the last seconds of this video when the teacher has set the output at 1 despite of the set and reset are 1 anyway thank u
You're correct. The very last negative edge would take Q low due to a synchronous reset...
thank you wow
Clk yazan clock yerinin önünde yuvarlak top varsa negatif edge demek aşağıya doğru olan 1 den 0 a gidenler. Ama yoksa top falan yukarı doğru giden 0 dan bire bakıyorsun
@Acss47 bahsedeyim ama pek bi bilgim yok açıkçası eğer üniversitede ve benim gibi digital dersinde görüyorsan bunları zaten senkron olarak görüyosun hep asenkron bize göstermediler maalesef
lenyatsa batho o ntela ka dio tsedi helelediwang ke eng osa itshimololele o mae