Two-Stage Amplifier and Spectre Simulation - ECE x321 EDA Tutorial 2

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  • Опубліковано 8 жов 2024
  • In this video, we will design a two-stage differential amplifier schematic and symbol, then design a test bench to simulate the design. We will discuss DC simulations, as well as AC, stability, and transfer function simulations to find the loop gain, closed-loop gain, and closed-loop output resistance for a unity-gain buffer.
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КОМЕНТАРІ • 22

  • @Renmosheraza
    @Renmosheraza 18 днів тому +1

    Thank You so much for such a nice tutorial. I completed this video in 6 hours by implementing the design and learning Virtuoso both simultaneously. Thanks again

  • @shreyasb9047
    @shreyasb9047 4 місяці тому +3

    bro u literally saved my life...!!! A very good explanation and thanks a lot

  • @Gruftgrabbler
    @Gruftgrabbler Рік тому +2

    Thank you for doing this video. This is easily the best explanation for this simulation setup on the internet :)

  • @indrashispowali
    @indrashispowali Рік тому +1

    Thanks, Man!!! A fantastic presentation 👍

  • @oddweird1234
    @oddweird1234 9 місяців тому +1

    Very Helpful.. thank you so much..

  • @majorcookie
    @majorcookie 24 дні тому

    Hi. Could you please tell me how to install Virtuoso the way you have - on Windows (judging by the fact that the software uses the Windows interface)? Or are you using a virtual machine?
    Sometimes it is not always convenient to use the Linux version. Thanks!

  • @gopisureshchowdary
    @gopisureshchowdary 3 місяці тому

    Thank you for your video .Why power gnd connected through inductor .Is it avoid noise coupling? or else any other reason bro.Could you please revert us?

    • @aaroncarman
      @aaroncarman  3 місяці тому +1

      The power and GND connections are connected through an inductor to simulate the inductance of the bond-wires used to bond the chip to a package. For lower frequencies this may not have a major issue, but at higher frequencies the inductance can have a more profound impact on the operation of the circuit and should be considered.

  • @pravinmane4408
    @pravinmane4408 Рік тому

    Thank you for this video. One query is : Should the ibias terminal in testbench be connected to Vdd and not ground?

    • @aaroncarman
      @aaroncarman  Рік тому

      It shouldn't matter since you are still imposing a constant current draw (i.e., the source will draw the same current whether you have the other side connected to VDD or ground). The primary purpose of Ibias is to measure the small-signal impact of injecting a current, which translates to the output impedance using the transimpedance xf analysis.

  • @khabylameyt5018
    @khabylameyt5018 9 місяців тому

    Can you tell my what kind of simulator that you use on cadence
    Is it spectre or what ??
    Thats is a interview Q??

    • @aaroncarman
      @aaroncarman  9 місяців тому +1

      Yes, this is Cadence Spectre, with the NCSU analog PDK.

    • @khabylameyt5018
      @khabylameyt5018 9 місяців тому

      @@aaroncarman thank you

  • @LaLisaSLAAAAY
    @LaLisaSLAAAAY Рік тому +1

    hi, do you have a tutorial for ldo using this op amp?

    • @aaroncarman
      @aaroncarman  Рік тому

      Unfortunately I don’t have any LDO tutorials at the moment. You may be able to find good information in LDO chip application notes!

  • @舒豪毅
    @舒豪毅 9 місяців тому +1

    hello! can you share your PDF for me? please!

  • @b1tofbinary
    @b1tofbinary 8 місяців тому

    what is the tech node for this?

  • @siddhantIITDh
    @siddhantIITDh Рік тому

    Hi, can you share the document ?!

  • @cliftonrenken-dey7409
    @cliftonrenken-dey7409 2 роки тому +1

    Ablsoutelt Terrible. How can you Be so helpful? Its just selfish for you to be so nice to those of us who are so damn grateful. 0/10

  • @SuccessPointForEngineers
    @SuccessPointForEngineers 11 місяців тому

    This is soooooo long... Be a little faster.. thanks..