41:52 you can keep on with port C if add 4NAND (or 4NOR, depends of logic) gate to access fifth row not to waste whole both 8 bit ports A and B. 47:21 decoder is obvious solution, and no alternative if you want 16 rows, but if you want only 5 rows, the decoder usage costs you whole chip, whilst NAND/NOR gate is still capable with the task and costs you ½ or⅓ of chip, having 1 or 2 spare gates for other tasks.
41:52 you can keep on with port C if add 4NAND (or 4NOR, depends of logic) gate to access fifth row not to waste whole both 8 bit ports A and B. 47:21 decoder is obvious solution, and no alternative if you want 16 rows, but if you want only 5 rows, the decoder usage costs you whole chip, whilst NAND/NOR gate is still capable with the task and costs you ½ or⅓ of chip, having 1 or 2 spare gates for other tasks.
Thank you sir,
your lectures Helps a Lot ..
thanks a lot sir! it was very helpful.
thanks..