VLSI Design Styles (Part 2)

[@umeshprasad7741]

Correct me plz if i am wrong
So a gate array is an IP?

[@deepakmusuwathi4749]

I don't think so. The way I see, FPGA and GA are similar and used for high level design. An IP will be individual block that can be later connected to other IPs to form a more complex system.

[@shaun1165]

@@deepakmusuwathi4749 So would an IP be similar to a standard cell, or would it be used as a part of full custom design similar to a design reuse with customizable dimensions?

[@abhishekpandya283]

@@shaun1165 I am not an expert on this topic, but what I can comment about this is IPs are designed for specific purposes and it is optimized for that particular function. Inside of that, there may be some full or semi-custom blocks, but its overall design is not available in the market like other standard cells.

[@deepakmusuwathi4749]

@@shaun1165 @abhisek Pandya has the correct response. For eg., An Analog to Digital Convertor is an IP. An Ethernet block is an IP. They are designed specifically for that particular function. You can integrate an ADC and an Ethernet to build a comms block

[@jyotichhichhollia2492]

What book sir is referring for this course

[@rishavkumar9288]

Thanks sir

[@shrikanthramanagara2382]

❤