Hey guys a dope analogy for y'all, assume the critical section as washroom and people wanting to get in as the process. When you want to get in you check if it's locked if so you wait, else you get in, lock it and do the thing and get out unlocking the lock.
I needed to watch it again to understand it very well. It's amazing how this code works and how someone managed to create it from scratch. Great content btw
Thanks a lot Sr, for these videos......, they are like another form of Galvin book but in a very simpler way, u saved me from reading the long long chapters of galvin at the exam time !!🙏
For the people who are wondering why the same problem of concurrency wouldn't take place with the atomic operation (because saying that it just won't interrupt is not sufficient and wouldn't oblige one process calling the Test-And-Set at the same time to wait for another one to make the same Test-And-Set call) is just because the definition of an atomic operation is not only it being uninterruptible, but also (since this is a hardware based solution; and this is the part that the video doesn't cover) the fact that atomic operations translate to CPU hardware bus locks so that other CPU physical/logical cores won't be able to do the same operations. Think of it as a smart CPU who wouldn't allow its cores to do the same task (as in: that same tagged operation in the assembly level; which is the atomic operations 'Op') in a concurrent manner, and instead would let them wait for the bus #LOCK to be clear again to allow such execution of 'Op'. (From Intel: Intel processors provide a LOCK# signal that is asserted automatically during certain critical memory operations to lock the system bus or equivalent link)
So in extremely simplified terms, while the atomic operation TestAndSet() is called and executing, it sets the #LOCK signal on the physical bus connecting physical/logical cores of the CPU, effectively banning them from executing the same operation?
For those who don't know how we need hardware support: The atomicity is not done using the provided C code, but it is done using special Assembly instructions and the provided C code is for educational purposes only (The C code here is considered pseudocode). (Not sure if my comment is correct but it seems logically to me after doing some research)
You mentioned SetAndTest function has to be atomic in order to implement this solution, but does not cover how this function is going to be atomic. It would be better if you add the atomic functionality code too in this video.
Sir please make a video on THIS pointer and and also chaining of functions...I've gone through many yt videos and Google articles....but I couldn't find through which I could understand it
i have followed a few couse of neso academy which were full free and i appriciate them and also share with my friends. but i shocked when i saw this paid course. making them paid cause lost your community, since there many people (like stutdent etc) can not afford. you can think over alternative revenue models like adding advertisment etc. i hope you publish whole serias as free soon.
99 rupees per month is not costly brother and they provide all other courses as well, they are teaching this concepts from Galvin so quality of resources is also best :p
thank u sir！ But I got a question, is test and set a privileged instruction? I check a lot of paper still can't get the answer.thanks for your sharing!
What if there are two processes and first one gets preempted after storing rv, the same for second one, now both will return false and will enter the critical section?
There is some bug in the code.In the parameter of the setAndTest() method the type of *target will be of int, because address will always be an integer value.
It is actually passing by reference. So the thing means that target is passed by reference. Infact target itself is an address and *target is value at that address which is boolean here.
test and set is provided by the hardware as an atomic instruction i.e., multiple processes cannot concurrently perform test and set. This ensures test and set works perfectly which was the drawback of peterson's solution
I'm not sure but I think it is because for the test and set instructions to be atomic ibm addes it to their instruction set which required to add some new control logic in the processor which is a hardware modification...
Lack design is embedded to processor i.e definition of the lock ,and the calling is done from your application ,I e being an app developer of you want to use the hardware lock ,you can do it by declaring and initialising a Boolean vareable 'lock' to false ,and pass it as a parameter to the test and set function ,hope it clears your doubt
Hey guys a dope analogy for y'all, assume the critical section as washroom and people wanting to get in as the process. When you want to get in you check if it's locked if so you wait, else you get in, lock it and do the thing and get out unlocking the lock.
I was just thinking the samething lol
I needed to watch it again to understand it very well. It's amazing how this code works and how someone managed to create it from scratch. Great content btw
Thanks a lot Sr, for these videos......, they are like another form of Galvin book but in a very simpler way, u saved me from reading the long long chapters of galvin at the exam time !!🙏
For the people who are wondering why the same problem of concurrency wouldn't take place with the atomic operation (because saying that it just won't interrupt is not sufficient and wouldn't oblige one process calling the Test-And-Set at the same time to wait for another one to make the same Test-And-Set call) is just because the definition of an atomic operation is not only it being uninterruptible, but also (since this is a hardware based solution; and this is the part that the video doesn't cover) the fact that atomic operations translate to CPU hardware bus locks so that other CPU physical/logical cores won't be able to do the same operations. Think of it as a smart CPU who wouldn't allow its cores to do the same task (as in: that same tagged operation in the assembly level; which is the atomic operations 'Op') in a concurrent manner, and instead would let them wait for the bus #LOCK to be clear again to allow such execution of 'Op'. (From Intel: Intel processors provide a LOCK# signal that is asserted automatically during certain critical memory operations to lock the system bus or equivalent link)
what makes a solution hardware solution and software solution?
So in extremely simplified terms, while the atomic operation TestAndSet() is called and executing, it sets the #LOCK signal on the physical bus connecting physical/logical cores of the CPU, effectively banning them from executing the same operation?
From Egypt, You Are A Great Person
I can say one thing your real teacher and genius
Thump up. You explain in just wonderful way. Keep going
Great video!! i have an exam tomorrow and this is so helpful. Greetings from Argentina!
I have my OS exam Tomorrow,thank you so much , l❤️ from Pakistan🇵🇰
Best video. Thank you very much.
Ur videos must be getting a lot of traffic now, as it is time of our mid term exams :)
Thanks for starting Operating Systems Again ♥️
thanks for uploading at freely even they are paid courses
Thanku so much sir for making such simply understandable video... It's very helpful to all student.. 😊
thank you sir, please we need a video about SWAP instruction please !!
Amazing explanation
For those who don't know how we need hardware support:
The atomicity is not done using the provided C code, but it is done using special Assembly instructions and the provided C code is for educational purposes only (The C code here is considered pseudocode).
(Not sure if my comment is correct but it seems logically to me after doing some research)
owesome explanation. Many thanks
3:27 understood everything under 30 second
You are awesome! Thank you so much
You mentioned SetAndTest function has to be atomic in order to implement this solution, but does not cover how this function is going to be atomic. It would be better if you add the atomic functionality code too in this video.
Sir please make a video on THIS pointer and and also chaining of functions...I've gone through many yt videos and Google articles....but I couldn't find through which I could understand it
Best Explained
i have followed a few couse of neso academy which were full free and i appriciate them and also share with my friends. but i shocked when i saw this paid course. making them paid cause lost your community, since there many people (like stutdent etc) can not afford. you can think over alternative revenue models like adding advertisment etc. i hope you publish whole serias as free soon.
99 rupees per month is not costly brother and they provide all other courses as well, they are teaching this concepts from Galvin so quality of resources is also best :p
Please upload all videos of chapter 6,7,8 quickly i have papers next week
They’re already available on our app and website. Please access them there.
first of all Thanks for your efforts.and please I need the subtitle of the video
best explanation
thank u sir！ But I got a question, is test and set a privileged instruction? I check a lot of paper still can't get the answer.thanks for your sharing!
It would be very helpful if you provide link for all your slides to download
Great work. Well done
God Bless You sir, you are awesome!
Thanks
wonderful
Thank you
Thanks !! when you say Process P1 & P2, do you means two threads ? because else how the lock variable would be shared among them.
Ya
What if there are two processes and first one gets preempted after storing rv, the same for second one, now both will return false and will enter the critical section?
clearly expained
There is some bug in the code.In the parameter of the setAndTest() method the type of *target will be of int, because address will always be an integer value.
It is actually passing by reference. So the thing means that target is passed by reference. Infact target itself is an address and *target is value at that address which is boolean here.
How is this h/w based solution. I mean how can we tell whether a solution is h/w based or s/w based ?
test and set is provided by the hardware as an atomic instruction i.e., multiple processes cannot concurrently perform test and set. This ensures test and set works perfectly which was the drawback of peterson's solution
super explanatiion
Is this also called Mutex?
While (0) means it will not enter critical section right? @11.10
No
If while ( 0 ) loop becomes false,it breaks loop and enters critical section
Instead of Room sir you should take example of ATM Machine
Why is it called a hardware based solution when we are writing a program to solve it?
because atomic operation requires special hardware support
I'm not sure but I think it is because for the test and set instructions to be atomic ibm addes it to their instruction set which required to add some new control logic in the processor which is a hardware modification...
Lack design is embedded to processor i.e definition of the lock ,and the calling is done from your application ,I e being an app developer of you want to use the hardware lock ,you can do it by declaring and initialising a Boolean vareable 'lock' to false ,and pass it as a parameter to the test and set function ,hope it clears your doubt
Exactly
what makes a solution hardware solution and software solution?
did you find an answer
How is it a hardware-based solution?
I cant understand how lock value is changhed by 1 by target variable ?
I think passing by reference
feeling bad for P2 who never got the chance to get executed. RIP
Can I get slides of the lecture
❤❤❤
sir please upload videos on c++ 🙏it is very important
There also exist solution to the this problem that satisfies all the three required conditions, you have not uploaded that solution.
Best
I. Love. You
where's the english subtitle ?
🙏🙏🙏
😍
Can you check your neso app, I can't make a payment until now :(((
We checked, and the app is working fine. Please update the app or try using our website www.nesoacademy.org
@@nesoacademy I updated and when I pay with visa card it didn't send me OTP and if i retype my card it will show payment failed
You may also try PayPal as the payment option.
@@angphamminh6247 same with me i tried many time also notify nesso at app
*A toilet: Mutual Exclusion.*
6:10
Why is this called a Hard Ware solution when it is only a program ? Even Peterson's solution is also a program.
you should be a Tamilian cuz your accent is same as Abdul Kalam's accent
I love you sir❤
Will you marry me
Thanks a lot! It's much clearer now.