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James it is we who are blessed to have a gentlemanly person as yourself here explaining to us the intricacies and the pitfalls of the design process in such a succinct way. You have become a baseline of the art and community you so well represent. Thanks for your contribution. You are a star!
Part way through the production of this video (while waiting for the pcb to be manufactured) by coincidence Ben Eater released his video on Flow control (the supporters on discord I discussed the situation with put it down to “Great minds think alike, but fools seldom differ”). I put off watching Ben’s video until I was finished so I’m commenting here fresh catching up. As expected it’s a great video ua-cam.com/video/LuKMVXWD7FY/v-deo.html, there is less overlap than I feared since both our videos are mostly focused on the specifics of implementation in very different systems. One immediate comment, about 30 seconds into Ben’s video his graphics to show the input fifo overwriting it’s tail is really clear, wish I had done something like that!
DTR/DSR has (had?) it's place when we actually had datasets (modems) and data terminals (think teletype level of functionality). DSR means the modem is ready at a higher level than char by char. Of course we abuse CTS/RTS these days because we cross them over, essentially both ends are DTE. But when modems were a thing, we direct connected them. RTS was an input on the modem and an output on the terminal. And vice versa for CTS. There was no way (or need) for the terminal to hold off the modem (the carriage could handle the 10 characters per second that the modem could produce 😂). Ironically that's where James ended up on his design, using flow control in one direction only. Until he digs out a 300baud modem ... 🤣🤣
I love all the technical instricasies involved in the design and watching the full system, blinkenlights and all, really gives me the warm and fuzzies. 🤣
LEDs have an electrical polarity... resistors have a psychological polarity (well, at least for some of us) ;) I liked watching you bodge the header onto the original UART to test it. I like to think that soldering stuff where it's supposed to go is easy enough but the real skill comes from soldering things where they're not designed to go. :) Watching components magically solder themselves on a hotplate never gets old! Any mention of hardware flow control takes me back to when I was younger when my boss and I went all round our building upgrading some of the serial lines back to the computer room so that they had hardware flow control and could support printers instead of terminals. I was supposedly a programmer and he was supposedly an administrator but we both had a deep longing for soldering irons and had a couple of days of great fun testing that RTS/CTS wires worked.
For whatever reason as a kid I started pointing the % line of a resistor towards the positive voltage rail and it stuck. To this day if I see that line facing negative I start icking.
@@c1ph3rpunk for me it WAS all about reading the numbers or the bands left to right, top to bottom... i never thought about literal polarity... I might now though. ;)
Great video and good timing for me because I currently wiring up a serial port and UART on a home brew M68K project but the old chip i am using doesn't have FIFO and I am going to have to do a lot of interrupt and bit banging. Anyway your explanation was very clear.
It is very likely the 4 MHz machine just can't overrun the 64 to 128 byte buffer common in USB FTDI chips. Not to mention the PC polling way faster and with larger chunks of data. While a outgoing signal would have been nice for completeness, it is just busy work at this point. I do wonder if a Keyboard interface wouldn't remove much of the incentive for using the serial connection at all. You already have NV storage and a graphics subsystem, you are just missing a keyboard for a fully autonomous computer. But I recognize the workflow you have and the upsides of having a quick and permanent connection between your modern computer and the JAM-1. Also thanks to JLCPCB for supporting James.
I commented before that it looks like you would benefit from a reduction in the solder paste mask apertures. Because you hand paste you get a lot of paste and this is going to short on even 50mil parts, let alone anything tighter (resistor packs for example). Jlc quality is exceptional for the price.
Yes, I was immediately reminded of Ben's Video - which I have seen a few days ago - when you started explaining RS232 signals. Well worth the time, as your videos are. I am afraid this knowledge gets lost somehow, since people do not use RS232 that often as it was 30 years ago. A generation thing, when I think about my younger colleagues ... good to have the knowledge around in such wikipedia-style videos.
Excellent addition. And a great video. Would be nice to have an LED for these two new lines, but would would probably need some buffers, and there is not enough ICs without a bigger redesign. But for version 2.0, some LEDs, and maybe some ESD protection on the external pins would be useful. I guess TTL logic is not too fussy most of the time tho.
Thanks! My use of 4 layer boards is pretty limited, I just add power and ground internal planes. That makes both routing and power management a lot easier.
For the hobbyist using JLC or similar service you might as well use 4 layers. The cost difference is negligible. I would actually use both inner layers as GND but it makes no difference to any design that would work on a breadboard with wires and that doesn't care about EMC/ESD. If you want to find out more search for Rick Hartley's videos on PCB design.
I feel I have seen this video before. The RTS/Ready to recieve aruments definitely. MAybe that was Ben Eaters serial interface though. Your explanation seemed much mor succinct.
I have a question. How about the time between bit transitions of the counter? All bit's don't transition at once. Doesn't that cause spikes RTS line? I would expect the counter to use Gray code.....
Wouldn't it be more efficient if the RTS signal only became active again when the buffer level was, for example, 3, since then the host would not be slowed down so often?
Interesting question. That's likely to depend on how it's implemented but I would expect it's fairly low level logic like I proposed here so it wouldn't have much impact. How the sender responds to it's own buffer full case might have more impact.
If both ends were similar then likely this is true because the interrupt load of filling the FIFO is amortized over 4 or 6 bytes instead of just one. When one end is a 5GHz monster and the other end a MHz 8 bit machine, it won't make any measurable difference to anything I suspect.
ENIG (Gold) finish produces a flatter surface and is critical for parts where coplanarity matters, e.g. BGAs and QFNs. You will use these on your next project I bet ... You must have exhausted your desire to use 74 series logic gates by now 😂
Join us on Discord: discord.gg/jmf6M3z7XS
Follow me on Twitter: twitter.com/WeirdBoyJim
Support the channel on Patreon: www.patreon.com/JamesSharman
Get your own PCB’s like this from the Video Sponsor: jlcpcb.com/?from=weirdboyjim
James it is we who are blessed to have a gentlemanly person as yourself here explaining to us the intricacies and the pitfalls of the design process in such a succinct way. You have become a baseline of the art and community you so well represent. Thanks for your contribution. You are a star!
Yesssss!!!! A new vid from James. Always a delight. 👍
Congratulations to JLCPCB for their continued support of this great project.
Hopefully that will continue!
Part way through the production of this video (while waiting for the pcb to be manufactured) by coincidence Ben Eater released his video on Flow control (the supporters on discord I discussed the situation with put it down to “Great minds think alike, but fools seldom differ”). I put off watching Ben’s video until I was finished so I’m commenting here fresh catching up. As expected it’s a great video ua-cam.com/video/LuKMVXWD7FY/v-deo.html, there is less overlap than I feared since both our videos are mostly focused on the specifics of implementation in very different systems. One immediate comment, about 30 seconds into Ben’s video his graphics to show the input fifo overwriting it’s tail is really clear, wish I had done something like that!
Two greats in a week, on a similar subject! 🎉
As long as you're talking to a modern PC leaving out TX flow control is perfectly fine, but what happens when you want to have JAM-1 talk to JAM-2? 🙂
I love how the silkscreen is basically the main problem and everything else is almost an excuse to fix that. Totally understand!
Nice work as usual James.
Love JLCPCB and EASYEDA... made my prototype life so much better ! 😎
Ah an RTS/CTS man. Not one of those evil DTR/DSR people!
DTR/DSR has (had?) it's place when we actually had datasets (modems) and data terminals (think teletype level of functionality). DSR means the modem is ready at a higher level than char by char.
Of course we abuse CTS/RTS these days because we cross them over, essentially both ends are DTE. But when modems were a thing, we direct connected them. RTS was an input on the modem and an output on the terminal. And vice versa for CTS. There was no way (or need) for the terminal to hold off the modem (the carriage could handle the 10 characters per second that the modem could produce 😂). Ironically that's where James ended up on his design, using flow control in one direction only. Until he digs out a 300baud modem ... 🤣🤣
@@robiniddon7582 And DCD!
Congrats on the sponsorship!
That was a great watch James, nice work!
I was trying to get my own flow control sorted and I think I got few hints from your video. Thank you.
exceptional work as usual, well done!
I love all the technical instricasies involved in the design and watching the full system, blinkenlights and all, really gives me the warm and fuzzies. 🤣
Glad you are enjoying it! I get to spend chunks of my day next to it!
LEDs have an electrical polarity... resistors have a psychological polarity (well, at least for some of us) ;)
I liked watching you bodge the header onto the original UART to test it. I like to think that soldering stuff where it's supposed to go is easy enough but the real skill comes from soldering things where they're not designed to go. :)
Watching components magically solder themselves on a hotplate never gets old!
Any mention of hardware flow control takes me back to when I was younger when my boss and I went all round our building upgrading some of the serial lines back to the computer room so that they had hardware flow control and could support printers instead of terminals. I was supposedly a programmer and he was supposedly an administrator but we both had a deep longing for soldering irons and had a couple of days of great fun testing that RTS/CTS wires worked.
For whatever reason as a kid I started pointing the % line of a resistor towards the positive voltage rail and it stuck. To this day if I see that line facing negative I start icking.
Thanks for sharing edgeeffect! I really should have added this ages ago, I had convinced myself there was a bit more too it.
@@c1ph3rpunk for me it WAS all about reading the numbers or the bands left to right, top to bottom... i never thought about literal polarity... I might now though. ;)
Great work ! Another great bit of progression :3
Glad you think so!
Very nice, James! I must go back and recap how the FIFO works!
Thanks George!
Great video and good timing for me because I currently wiring up a serial port and UART on a home brew M68K project but the old chip i am using doesn't have FIFO and I am going to have to do a lot of interrupt and bit banging. Anyway your explanation was very clear.
It is very likely the 4 MHz machine just can't overrun the 64 to 128 byte buffer common in USB FTDI chips. Not to mention the PC polling way faster and with larger chunks of data. While a outgoing signal would have been nice for completeness, it is just busy work at this point. I do wonder if a Keyboard interface wouldn't remove much of the incentive for using the serial connection at all. You already have NV storage and a graphics subsystem, you are just missing a keyboard for a fully autonomous computer. But I recognize the workflow you have and the upsides of having a quick and permanent connection between your modern computer and the JAM-1. Also thanks to JLCPCB for supporting James.
I commented before that it looks like you would benefit from a reduction in the solder paste mask apertures. Because you hand paste you get a lot of paste and this is going to short on even 50mil parts, let alone anything tighter (resistor packs for example).
Jlc quality is exceptional for the price.
Yes, I was immediately reminded of Ben's Video - which I have seen a few days ago - when you started explaining RS232 signals. Well worth the time, as your videos are. I am afraid this knowledge gets lost somehow, since people do not use RS232 that often as it was 30 years ago. A generation thing, when I think about my younger colleagues ... good to have the knowledge around in such wikipedia-style videos.
It was a bit unfortunate having his video and Ben’s so close but the content is very different.
Same as 422/423...
Excellent addition. And a great video. Would be nice to have an LED for these two new lines, but would would probably need some buffers, and there is not enough ICs without a bigger redesign. But for version 2.0, some LEDs, and maybe some ESD protection on the external pins would be useful. I guess TTL logic is not too fussy most of the time tho.
Nice! Both RTS and CTS might be needed if you connect two jam-1s together in the future!
Another job well done!
I'm curious: have you ever spoken on your reasons and methods for designing 4-layer boards?
Thanks! My use of 4 layer boards is pretty limited, I just add power and ground internal planes. That makes both routing and power management a lot easier.
For the hobbyist using JLC or similar service you might as well use 4 layers. The cost difference is negligible. I would actually use both inner layers as GND but it makes no difference to any design that would work on a breadboard with wires and that doesn't care about EMC/ESD. If you want to find out more search for Rick Hartley's videos on PCB design.
Nice work!
Great Job!
I enjoy the board graveyard picture
Oh noes! We could have had another LED!
BTW is that a new microscope arm?
I feel I have seen this video before. The RTS/Ready to recieve aruments definitely. MAybe that was Ben Eaters serial interface though. Your explanation seemed much mor succinct.
I have a question. How about the time between bit transitions of the counter? All bit's don't transition at once. Doesn't that cause spikes RTS line? I would expect the counter to use Gray code.....
Wouldn't it be more efficient if the RTS signal only became active again when the buffer level was, for example, 3, since then the host would not be slowed down so often?
Interesting question. That's likely to depend on how it's implemented but I would expect it's fairly low level logic like I proposed here so it wouldn't have much impact. How the sender responds to it's own buffer full case might have more impact.
If both ends were similar then likely this is true because the interrupt load of filling the FIFO is amortized over 4 or 6 bytes instead of just one.
When one end is a 5GHz monster and the other end a MHz 8 bit machine, it won't make any measurable difference to anything I suspect.
ENIG (Gold) finish produces a flatter surface and is critical for parts where coplanarity matters, e.g. BGAs and QFNs.
You will use these on your next project I bet ... You must have exhausted your desire to use 74 series logic gates by now 😂
I hope you won’t need a bigger frame for the boards of shame James, it’s getting full 😂
I still need to get the first version of the SNES controller in there, but I need to desolder the connector before it will fit!
o/
o\